merry
1672f907af
github: Add build-and-test workflow
2021-05-31 12:51:47 +01:00
Jeremy Van de woestyne
b4ee976a6f
unit tests & various fixes
2021-05-28 18:49:31 +01:00
Wunkolo
e8c266d0d3
tests/A64: Add VQADD/VQSUB unit tests
2021-05-28 14:13:11 +01:00
Wunkolo
dc7fb1f3ed
cpu_info: Add CPU Name, Family, compact output
...
Compacts and formats the output a bit to be much more
concise. Sorts CPU features by alphabetical order. Mostly
to speed up `HostFeature` testing.
2021-05-24 12:25:01 -07:00
Wunkolo
3c693f2576
emit_x64_vector: AVX512VBMI implementation of EmitVectorTableLookup128
...
Also adds AVX512VBMI detection to host_feature
2021-05-22 22:48:31 +01:00
Wunkolo
9ba5e8e52d
tests/A64: Add TBL/TBX instruction unit tests
...
Tests the TBL instruction with implementation with {1-4} register
lookups and the handling of out-of-bound indices.
Intended to target the implementation of VectorTableLookup128
2021-05-22 22:47:21 +01:00
MerryMage
53493b2024
Add .clang-format file
...
Using clang-format version 12.0.0
2021-05-22 15:07:02 +01:00
MerryMage
51b155df92
A32: Introduce PreCodeTranslationHook
2021-05-22 14:16:10 +01:00
Merry
714216fd0e
Consolidate all source files into src/ directory
2021-05-19 17:41:59 +01:00
MerryMage
d93145bd04
decoder_tests: Only run ASIMD decoder test explicitly
...
The test is a 2 minute test whose result only really matters if the ASIMD decoder is modified.
2021-05-16 21:48:25 +01:00
Wunkolo
2c0be5e18c
emit_x64_vector: AVX512 Implementation of EmitVectorNarrow{32,64}
...
Includes a new test case with the XTN instruction to verify
the implementation
2021-05-16 10:02:49 +01:00
MerryMage
b93ae62acf
thumb32: Add coprocessor instructions
2021-05-13 18:15:35 +01:00
MerryMage
62ecc2537e
print_info: Add thumb mode
2021-05-07 08:24:51 +01:00
MerryMage
61333917a4
thumb32: Implement MRS (register)
2021-05-04 12:43:38 +01:00
MerryMage
a5a210a9a5
T32: Add ASIMD instructions
2021-05-04 00:09:55 +01:00
MerryMage
d1e62b9993
T32: Add VFP instructions
2021-05-04 00:09:55 +01:00
MerryMage
cd837c5b37
A32: Merge ArmTranslateVistor and ThumbTranslateVisitor
2021-05-04 00:09:55 +01:00
MerryMage
6404f58d23
rsqrt_test: Fix on GCC
2021-05-01 20:33:14 +01:00
MerryMage
f35d98c923
fuzz_with_unicorn: Widen scope of floating point fuzzing
2021-04-26 00:26:28 +01:00
MerryMage
7bc9e36ed7
emit_x64_floating_point: Optimize 32-bit EmitFPRSqrtEstimate
2021-04-26 00:26:28 +01:00
MerryMage
e19f898aa2
ir: Reorganize to new top level folder
2021-04-21 22:22:07 +01:00
Lioncash
f5263cc196
thumb32: Implement exclusive loads
...
Implements the remaining loads for ARMv7
2021-04-19 19:46:19 +01:00
Lioncash
6241ff6be2
thumb32: Implement STREX variants
...
Implements the exclusive store instructions. Now all that remains for
ARMv7 load/stores to be done is the exclusive loads.
2021-04-10 17:15:19 +01:00
emuplz
6d4333c78e
fixed data + instruction cache callbacks (w/ tests)
2021-02-17 20:38:08 +00:00
rufi
77621a8448
implemented other ic instructions
2021-02-17 20:38:08 +00:00
emuplz
8728444af8
added support for instruction ic ivau
2021-02-17 20:38:06 +00:00
MerryMage
f77b0e2fbe
A32/thumb16: Implement IT instruction
2021-02-07 20:41:48 +00:00
MerryMage
68bd9547c5
fuzz_arm: Correctly print thumb instruction listing
2021-02-07 20:41:48 +00:00
MerryMage
a599c29d9e
testenv: Ignore warning C4309
2021-02-07 09:57:17 +00:00
MerryMage
b252636dc3
a32_unicorn: Halt when PC leaves code_mem
2021-02-06 22:15:02 +00:00
MerryMage
331a02e02e
fuzz_arm: Add fuzzing for thumb instructions
2021-02-06 21:41:01 +00:00
Lioncash
23619c8c6a
thumb32: Implement SHSUB8/UHSUB8
2021-02-01 17:50:46 -05:00
Lioncash
9d2570470e
thumb32: Implement SHADD8/UHADD8
2021-02-01 17:50:46 -05:00
Lioncash
afad76078d
thumb32: Implement SHSUB16/UHSUB16
2021-02-01 17:50:46 -05:00
Lioncash
51b7c32d02
thumb32: Implement SHSAX/UHSAX
2021-02-01 17:50:46 -05:00
Lioncash
f0a219fcd0
thumb32: Implement SHASX/UHASX
2021-02-01 17:50:46 -05:00
Lioncash
94f8efbb03
thumb32: Implement SHADD16/UHADD16
2021-02-01 17:50:46 -05:00
Lioncash
aa49b0db89
thumb32: Implement QSUB8/UQSUB8
2021-02-01 17:50:46 -05:00
Lioncash
874ab6a7b6
thumb32: Implement QADD8/UQADD8
2021-02-01 17:50:46 -05:00
Lioncash
d923fb24c6
thumb32: Implement QSUB16/UQSUB16
2021-02-01 17:50:46 -05:00
Lioncash
416fe26df0
thumb32: Implement QSAX/UQSAX
2021-02-01 17:50:14 -05:00
Lioncash
ad7c8bd042
thumb32: Implement QASX/UQASX
2021-02-01 17:31:30 -05:00
Lioncash
f52b8f924c
thumb32: Implement QADD16/UQADD16
2021-02-01 17:31:30 -05:00
Lioncash
6f593da41b
thumb32: Implement SSUB8/USUB8
2021-02-01 17:31:27 -05:00
Lioncash
271354ee95
thumb32: Implement SADD8/UADD8
2021-02-01 16:44:11 -05:00
Lioncash
8f42fd5c0e
thumb32: Implement SSUB16/USUB16
2021-02-01 16:41:02 -05:00
Lioncash
0e28c63456
thumb32: Implement SSAX/USAX
2021-02-01 16:36:18 -05:00
Lioncash
21e404d3ab
thumb32: Implement SASX/UASX
2021-02-01 16:31:25 -05:00
Lioncash
d529417875
thumb32: Implement SADD16/UADD16
2021-02-01 16:19:33 -05:00
Lioncash
36fc596a51
thumb32: Implement QADD
2021-02-01 15:44:09 -05:00
Lioncash
cd6e4c7afd
thumb32: Implement QSUB
2021-02-01 15:42:14 -05:00
Lioncash
65365ad2a3
thumb32: Implement QDADD
2021-02-01 15:39:39 -05:00
Lioncash
c60cf921ee
thumb32: Implement REV
2021-02-01 15:30:40 -05:00
Lioncash
0304dc7ce4
thumb32: Implement REV16
2021-02-01 15:27:31 -05:00
Lioncash
cee31c5274
thumb32: Implement RBIT
2021-02-01 15:20:24 -05:00
Lioncash
e2bc7eeb93
thumb32: Implement REVSH
2021-02-01 15:16:53 -05:00
Lioncash
95dabcf48e
fuzz_thumb: Allow running only Thumb-16 tests
2021-02-01 15:04:29 -05:00
Lioncash
1ad99bb9b5
thumb32: Implement SEL
2021-02-01 15:01:21 -05:00
Lioncash
8d53048750
thumb32: Implement CLZ
...
Also fleshes out the generator to allow for generating thumb32
instructions as well.
2021-02-01 14:54:04 -05:00
MerryMage
80adb289d0
print_info: Use std::nullopt instead of {}
2020-09-22 18:40:00 +01:00
MerryMage
82868034d3
A32/ASIMD: Ensure decoder table is correct
...
* Raise a DecoderError instead of ASSERT-ing on a decode error
* Correct ASIMD decode table
* Write a test which verifies every possible ASIMD instruction
2020-07-05 18:45:42 +01:00
MerryMage
4ba1f8b9e7
Add optimization flags to disable specific optimizations
2020-07-04 11:04:10 +01:00
MerryMage
3eed024caf
asimd_three_same: Ignore Q=1 for VPADD (floating-point)
2020-07-04 11:04:10 +01:00
MerryMage
2008fda88b
emit_x64_floating_point: Correct error in s16 rounding in EmitFPToFixed
2020-06-22 22:54:38 +01:00
MerryMage
3ea49fc6d6
A32: Implement VFPv3 VCT (between floating-point and fixed-point)
2020-06-22 22:08:58 +01:00
MerryMage
fa145ae401
a32_unicorn: Print code on unicorn error
2020-06-21 16:23:01 +01:00
MerryMage
69a1d58a2b
A32: Implement ASIMD VMULL
2020-06-21 10:00:24 +01:00
MerryMage
70d071e6ab
fuzz_arm: Test large random blocks
2020-06-21 00:41:54 +01:00
MerryMage
214c1d6002
fuzz_arm: Test testable parts of ASIMD VRECPE and VRSQRTE
2020-06-20 15:17:39 +01:00
MerryMage
92cb4a5a34
A32: Implement ASIMD VRSQRTE
2020-06-20 15:13:22 +01:00
MerryMage
8912496206
fuzz_arm: Unicorn has incorrect VRSQRTS implementation
2020-06-20 15:07:50 +01:00
MerryMage
6f59c2cd8e
A32: Implement ASIMD VRECPE
2020-06-20 15:07:06 +01:00
MerryMage
d3dc50d718
A32: Implement ASIMD VRSQRTS
2020-06-20 15:06:06 +01:00
MerryMage
f58e247ef3
A32: Implement ASIMD VPADD (floating-point)
2020-06-20 14:25:04 +01:00
Lioncash
ed6ca58058
A32: Implement ASIMD VCEQ, VCGE, VCGT, VCLE, VCLT with zero
...
Fairly self-explanatory, we can leverage the existing IR functions for
the purpose of these instructions.
In the integer case, we can just insert function pointers
into an array and index it, given all comparison primitives exist
already for the integer side of things.
2020-06-20 00:50:40 +01:00
MerryMage
7402d38675
test_arm_instructions: Add vclt.f32 (zero) test
2020-06-18 17:59:44 +01:00
MerryMage
9f3277540a
Merge A32 and A64 exclusive monitors
2020-06-17 10:33:09 +01:00
Lioncash
9b06a938a9
fuzz_arm: Ignore endian bit
...
A recent change from Qemu (268b1b3dfbb92a9348406f728a33f39e3d8dcd8)
allows user space modification of the E bit.
2020-06-16 01:53:21 +01:00
MerryMage
2796a85096
interface/a32: Remove descriptor argument from Disassemble
2020-06-12 15:27:42 +01:00
MerryMage
e953f67201
emit_x64_packed: PackedAbsDiffSumS8: Fix case when bits above the lower 32 bits are not zero
2020-06-12 15:24:09 +01:00
MerryMage
d0d50c4824
print_info: Use VFP and ASIMD decoders to get dynarmic name for instruction
2020-05-17 22:48:14 +01:00
MerryMage
d0075f4ea6
print_info: Use LLVM to disassemble A32
2020-05-17 22:30:46 +01:00
MerryMage
1a0bc5ba91
A32/ASIMD: ARMv8: Implement VLD{1-4} (multiple)
2020-05-16 14:11:23 +01:00
MerryMage
e7f1a0d408
A32: ARMv8: Implement LDA{,EX}{,B,D,H} and STL{,EX}{,B,D,H}
2020-05-15 21:07:36 +01:00
Lioncash
8808b8c479
cpu_info: Make test non-allocating
...
Same behavior, but makes it non-allocating by using a constexpr
std::array instead of a std::vector.
2020-05-12 09:52:55 +01:00
MerryMage
7f77a04900
fuzz_arm: Do not test vfp_VMRS
...
This may emit a vmrs *, fpscr instruction.
This results in fuzz failures due to slight inaccuracies in fpscr emulation.
2020-05-10 14:47:21 +01:00
MerryMage
6df660c889
fuzz_arm: Ensure all instructions are fuzzed
...
* VFP instructions were not getting fuzzed due to matching coprocessor instructions (as invalid instructions)
* Fix VPOP writeback for doubles when (imm8 & 1) == 1
* Do not accidentally fuzz unimplemented unconditional instructions
2020-05-10 13:57:39 +01:00
Fernando Sahmkow
97b9d3e058
Exclusive Monitor: Rework exclusive monitor interface.
2020-05-03 01:40:37 +01:00
MerryMage
d86a6f2211
print_info: Print IR for A32 instructions
2020-04-29 15:33:56 +01:00
MerryMage
8498ac34d5
fuzz_with_unicorn: Print IR
2020-04-29 15:33:38 +01:00
MerryMage
24229ab899
constant_propagation_pass: Don't fold add if we nee flags
...
Results in incorrect flags
2020-04-29 15:33:12 +01:00
MerryMage
94d0d33e02
Fix single stepping for certain instructions
...
Several issues:
1. Several terminal instructions did not stop at the end of a single-step block
2. x64 backend for the A32 frontend sometimes polluted upper_location_descriptor with the single-stepping flag
We also introduce the enable_optimizations parameter to the A32 frontend.
2020-04-24 11:44:38 +01:00
MerryMage
0d041696f5
tests/a64: Reminder about hidden infinite loops
2020-04-23 18:11:45 +01:00
MerryMage
a8a712c801
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
MerryMage
976edaf2d2
print_info: Add optimized IR output for A64
2020-04-22 21:06:18 +01:00
MerryMage
7c917f1c12
CMakeLists: Add DYNARMIC_FRONTENDS option
...
Allows library user to select which frontends to enable
2020-04-22 21:06:18 +01:00
MerryMage
668a43f815
A32: Detect unpredictable LDM/STM instructions
2020-04-22 21:06:18 +01:00
MerryMage
5ea3fe58c6
fuzz_with_unicorn: Add large random block testing
2020-04-22 21:06:18 +01:00
MerryMage
81fcb4e537
mp: Migrate to shared version of mp library
2020-04-22 21:06:17 +01:00
MerryMage
5d93e6e580
print_info: Add -exec parameter to test execution
2020-04-22 21:04:24 +01:00
MerryMage
a59c335b05
A64: Add options for detecting misaligned loads and stores
2020-04-22 21:04:23 +01:00
MerryMage
cb971d3280
test_arm_instruction: Revive some old tests
2020-04-22 21:04:23 +01:00
MerryMage
39bd2c034d
constant_propagation_pass: Handle GetCarryFromOp for MostSignificantWord
2020-04-22 21:04:23 +01:00
MerryMage
1aa7b62e92
A32/Thumb: Correct behaviour for UDF and Unpredictable instructions
...
Raise an exception instead of calling the interpreter and ASSERT-ing respectively.
2020-04-22 21:04:23 +01:00
MerryMage
c7d20f3f2f
fuzz_arm: Test MSR and MRS instructions against unicorn
...
* Add always_little_endian option to mach unicorn behavior.
* Correct CPSR.Mode = Usermode
2020-04-22 21:04:23 +01:00
MerryMage
39ab7cb643
print_info: Add support for printing A32 instructions
2020-04-22 21:04:23 +01:00
Lioncash
b50114ae70
A64/fuzz_with_unicorn: Avoid repeated unnecessary library calls in RunTestInstance()
...
Repeatedly retrieving the vectors and registers from unicorn involves
copying the entire set of registers and vectors by value instead of
simply retrieving a reference to them. Instead, we can just do the work
once and print out the values.
While we're at it, also make our bracing consistent.
2020-04-22 21:04:22 +01:00
MerryMage
3513ed1c60
CMakeLists: Define FMT_USE_USER_DEFINED_LITERALS=0
...
This disable a fmtlib feature that depends on a non-standard feature
for its implementation.
2020-04-22 21:04:22 +01:00
Merry
fd6222f0a1
Merge pull request #500 from lioncash/cbz
...
A32: Implement Thumb-1's CBZ/CBNZ instructions
2020-04-22 21:04:21 +01:00
MerryMage
0495b2c779
tests: Fix Windows build when DYNARMIC_TESTS_USE_UNICORN is enabled
2020-04-22 21:04:21 +01:00
Lioncash
03e6899fd7
A32: Implement Thumb-1's CBZ/CBNZ instructions
...
Introduced in ARMv6T2, this allows for short forward branches.
2020-04-22 21:02:47 +01:00
Lioncash
0fa0bca22a
A32: Handle different variants of PLD
2020-04-22 21:02:47 +01:00
Lioncash
aba4d8a59f
dynarmic_tests: Use variable template equivalents of type traits where applicable
...
Same thing, same readability, less writing.
2020-04-22 21:02:47 +01:00
MerryMage
99b284b1b5
fuzz_thumb: Disable fuzzing longer blocks
2020-04-22 21:02:47 +01:00
Merry
30d28029a8
Merge pull request #492 from lioncash/vfp
...
A32: Rename vfp2-related files to vfp
2020-04-22 21:02:47 +01:00
Lioncash
97277c598b
A32: Rename vfp2-related files to vfp
...
Now that we fuzz against Unicorn, we aren't just restricted to VFPv2.
VFPv3 and VFPv4 facilities can now be implemented. This renames
constructs mentioning VFPv2 to just refer to VFP.
2020-04-22 21:02:46 +01:00
Lioncash
c098ade2e7
dynarmic_tests: Resolve CPSR discrepancies in tests
...
Unicorn internally checks if the LSB is set in order to determine
whether or not it should assume thumb mode internally. Clearing this
ourselves will always result in the incorrect PSR between runs.
2020-04-22 21:02:46 +01:00
Lioncash
0b15fc9755
a32/fuzz_arm: Use same fuzzing mechanism as AArch64
...
Introduces the same fuzzing mechanism used by the AArch64 code for
fuzzing instruction implementations, getting rid of the need to
manually specify the instruction generator sequences--replacing it with
an instruction blacklist instead.
Much of this change originates from a previous patch made by Mary. This
just makes it interact nicely with the alterations made to get Unicorn
to cooperate properly.
2020-04-22 21:02:46 +01:00
Lioncash
7fc3bd689d
A32: Implement ARM-mode MLS
2020-04-22 21:02:46 +01:00
Lioncash
8b338b7def
A32: Implement ARM-mode MOVT
2020-04-22 21:02:46 +01:00
Lioncash
877fa0f8c3
A32: Implement ARM-mode SBFX
2020-04-22 21:02:46 +01:00
Lioncash
47218ee65d
A32: Implement ARM-mode UBFX
2020-04-22 21:02:46 +01:00
Lioncash
2970b34e3c
A32: Implement ARM-mode BFI
2020-04-22 21:02:46 +01:00
Lioncash
fab3a59e05
A32: Implement ARM-mode BFC
2020-04-22 21:02:46 +01:00
Lioncash
7305d13221
A32: Implement ARM-mode RBIT
2020-04-22 21:02:46 +01:00
Lioncash
b2f7a0e7ba
A32: Implement ARM-mode SDIV/UDIV
...
Now that we have Unicorn in place, we can freely implement instructions
introduced in newer versions of the ARM architecture.
2020-04-22 21:02:46 +01:00
Lioncash
2acfee66ed
a32_unicorn: Silence PC value assertions
...
Ensure the PC is properly masked off after a run.
2020-04-22 21:02:46 +01:00
Lioncash
57be160524
fuzz_arm: Tidy up existing tests
...
Now that we utilize C++17, we can use std::array's deduction guides to
avoid the need to explicitly specify the template arguments.
While we're at it, also use const where applicable.
2020-04-22 21:02:46 +01:00
Lioncash
4f2b60c8e7
dynarmic_tests: Remove skyeye interpreter
...
This is quite a messy interpreter and would require a large amount of
work to bring it up to speed to begin implementing newer portions of the
AArch32 instruction set into Dynarmic.
Given we already have fuzzing with Unicorn set up for
AArch64/AArch32, we can get rid of this and unify our testing
infrastructure.
This will also make building the tests much faster, given a whole
interpreter doesn't need to be built anymore as part of the project.
2020-04-22 21:02:45 +01:00
Lioncash
d29582a0e1
A32: Fuzz instructions using unicorn
...
While skyeye was OK previously, now that we have an AArch64 backend,
this also means that we eventually have to support the AArch32
counterpart to it. Unfortunately, SkyEye is only compatible up to
ARMv6K, so we woud need to do a lot of work to bring the interpreter up
to speed with things to even begin testing new instruction
implementations.
For the AArch64 side of things, we already use Unicorn, so we can toss
out SkyEye in favor of it instead.
2020-04-22 21:02:45 +01:00
Lioncash
9faed40a34
tests/a32/testenv: Make A32TestEnv's code_mem member a std::vector
...
Makes the data member consistent with the A64 test environment.
2020-04-22 20:58:10 +01:00
Lioncash
2e2176e1c5
tests/unicorn_emu: Add getters and setters for PC/SP
...
Makes the interface consistent with the A64Unicorn class.
2020-04-22 20:58:09 +01:00
Lioncash
da5dd3ff66
tests/A32/fuzz_arm: Remove unused Unix-specific include
...
This was introduced within 6f6f60c61b
2020-04-22 20:57:38 +01:00
Merry
07759af694
Merge pull request #422 from lioncash/truncate
...
a32_unicorn: Silence a truncation warning within UnmappedMemoryHook()
2020-04-22 20:57:38 +01:00
Lioncash
eadc07e269
a32_unicorn: Silence a truncation warning within UnmappedMemoryHook()
...
MemoryRead8() takes a u32, but we were passing the result of a
u32 + size_t operation, which is 64-bit on 64-bit platforms. This
results in a truncation warning
2020-04-22 20:57:38 +01:00
Lioncash
586dffb356
tests/.../vfp_helper: Amend use of the comma operator
...
Makes the lines of code slightly nicer to read
2020-04-22 20:57:38 +01:00
Merry
ad14a33672
Merge pull request #417 from lioncash/swap
...
common: Move byte swapping functions to bit_utils.h
2020-04-22 20:57:37 +01:00
Merry
a3d640b0c1
Merge pull request #416 from lioncash/space
...
dynarmic_tests: Remove inconsistent spacing
2020-04-22 20:57:37 +01:00
Lioncash
7139942976
common: Move byte swapping functions to bit_utils.h
...
These are quite general functions, so they can just be moved into common
instead of recreating a namespace here.
2020-04-22 20:57:37 +01:00
Lioncash
2ce7e579d2
dynarmic_tests: Remove inconsistent spacing
...
Makes the changed code more consistent with the surrounding code.
2020-04-22 20:57:37 +01:00
Lioncash
2e62cfc89d
fuzz_util: Simplify result return in InstructionGenerator's Generate() function
...
This can just be a simple direct return without a separated declaration
and assignment.
2020-04-22 20:57:37 +01:00
V.Kalyuzhny
764a93bf5a
Switch boost::optional to std::optional
2020-04-22 20:57:37 +01:00
MerryMage
06b31448aa
emit_x64_vector: Changes to VectorSignedSaturatedDoublingMultiply
...
* Return both the upper and lower parts of the multiply if required
* SSE2 does not support the pmuldq instruction, do sign correction to an unsigned result instead
* Improve port utilisation where possible (punpck instructions were a bottleneck)
2020-04-22 20:55:06 +01:00
MerryMage
3caeb62ef1
emit_x64_floating_point: Hardware FMA implementation of FPRSqrtStepFused
2020-04-22 20:55:06 +01:00
MerryMage
b8daa4feac
simd_two_register_misc: FNEG (vector) with Q == 0 had dirty upper
2020-04-22 20:55:05 +01:00
Lioncash
134bb02e19
ir/value: Replace includes with forward declarations
...
enum classes are still considered complete types when forward declared
(as the compiler knows the exact size of the type from the declaration
alone). The only difference in this case being that the members of the
enum class aren't visible. Given we don't use the members within this
header in any way, we can simply forward declare them here and remove
the inclusions.
2020-04-22 20:55:05 +01:00
MerryMage
9b65100660
A64: Implement FastDispatchHint
2020-04-22 20:53:46 +01:00
MerryMage
f96c43d422
A32: Implement FastDispatchHint
2020-04-22 20:53:46 +01:00
MerryMage
a12854857b
A32: Add define_unpredictable_behaviour option
2020-04-22 20:53:46 +01:00
MerryMage
f73104633b
a32_emit_x64: Fix incorrect BMI2 implementation for SetCpsr
...
* The MSB for each byte in cpsr_ge were not being appropriately set.
* We also expand test coverage to test this case.
* We fix the disassembly of the MSR (imm) and MSR (reg) instructions as well.
2020-04-22 20:53:46 +01:00
