ir: Reorganize to new top level folder

src/CMakeLists.txt

@@ -80,29 +80,29 @@ add_library(dynarmic
     frontend/decoder/matcher.h
     frontend/imm.cpp
     frontend/imm.h
-    frontend/ir/basic_block.cpp
-    frontend/ir/basic_block.h
-    frontend/ir/cond.h
-    frontend/ir/ir_emitter.cpp
-    frontend/ir/ir_emitter.h
-    frontend/ir/location_descriptor.cpp
-    frontend/ir/location_descriptor.h
-    frontend/ir/microinstruction.cpp
-    frontend/ir/microinstruction.h
-    frontend/ir/opcodes.cpp
-    frontend/ir/opcodes.h
-    frontend/ir/opcodes.inc
-    frontend/ir/terminal.h
-    frontend/ir/type.cpp
-    frontend/ir/type.h
-    frontend/ir/value.cpp
-    frontend/ir/value.h
-    ir_opt/constant_propagation_pass.cpp
-    ir_opt/dead_code_elimination_pass.cpp
-    ir_opt/identity_removal_pass.cpp
-    ir_opt/ir_matcher.h
-    ir_opt/passes.h
-    ir_opt/verification_pass.cpp
+    ir/basic_block.cpp
+    ir/basic_block.h
+    ir/cond.h
+    ir/ir_emitter.cpp
+    ir/ir_emitter.h
+    ir/location_descriptor.cpp
+    ir/location_descriptor.h
+    ir/microinstruction.cpp
+    ir/microinstruction.h
+    ir/opcodes.cpp
+    ir/opcodes.h
+    ir/opcodes.inc
+    ir/opt/constant_propagation_pass.cpp
+    ir/opt/dead_code_elimination_pass.cpp
+    ir/opt/identity_removal_pass.cpp
+    ir/opt/ir_matcher.h
+    ir/opt/passes.h
+    ir/opt/verification_pass.cpp
+    ir/terminal.h
+    ir/type.cpp
+    ir/type.h
+    ir/value.cpp
+    ir/value.h
 )
 
 if ("A32" IN_LIST DYNARMIC_FRONTENDS)
@@ -178,8 +178,8 @@ if ("A32" IN_LIST DYNARMIC_FRONTENDS)
         frontend/A32/translate/translate.h
         frontend/A32/translate/translate_arm.cpp
         frontend/A32/translate/translate_thumb.cpp
-        ir_opt/a32_constant_memory_reads_pass.cpp
-        ir_opt/a32_get_set_elimination_pass.cpp
+        ir/opt/a32_constant_memory_reads_pass.cpp
+        ir/opt/a32_get_set_elimination_pass.cpp
     )
 endif()
 
@@ -252,9 +252,9 @@ if ("A64" IN_LIST DYNARMIC_FRONTENDS)
         frontend/A64/translate/impl/system_flag_manipulation.cpp
         frontend/A64/translate/translate.cpp
         frontend/A64/translate/translate.h
-        ir_opt/a64_callback_config_pass.cpp
-        ir_opt/a64_get_set_elimination_pass.cpp
-        ir_opt/a64_merge_interpret_blocks.cpp
+        ir/opt/a64_callback_config_pass.cpp
+        ir/opt/a64_get_set_elimination_pass.cpp
+        ir/opt/a64_merge_interpret_blocks.cpp
     )
 endif()
 

src/backend/x64/a32_emit_x64.cpp

@@ -29,9 +29,9 @@
 #include "common/variant_util.h"
 #include "frontend/A32/location_descriptor.h"
 #include "frontend/A32/types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/basic_block.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
 
 // TODO: Have ARM flags in host flags and not have them use up GPR registers unless necessary.
 // TODO: Actually implement that proper instruction selector you've always wanted to sweetheart.
@@ -136,7 +136,7 @@ A32EmitX64::BlockDescriptor A32EmitX64::Emit(IR::Block& block) {
             A32EmitX64::EmitA32##name(ctx, inst);  \
             break;
 #define A64OPC(...)
-#include "frontend/ir/opcodes.inc"
+#include "ir/opcodes.inc"
 #undef OPCODE
 #undef A32OPC
 #undef A64OPC

src/backend/x64/a32_emit_x64.h

@@ -19,7 +19,7 @@
 #include "backend/x64/block_range_information.h"
 #include "backend/x64/emit_x64.h"
 #include "frontend/A32/location_descriptor.h"
-#include "frontend/ir/terminal.h"
+#include "ir/terminal.h"
 
 namespace Dynarmic::Backend::X64 {
 
@@ -89,7 +89,7 @@ protected:
 #define OPCODE(...)
 #define A32OPC(name, type, ...) void EmitA32##name(A32EmitContext& ctx, IR::Inst* inst);
 #define A64OPC(...)
-#include "frontend/ir/opcodes.inc"
+#include "ir/opcodes.inc"
 #undef OPCODE
 #undef A32OPC
 #undef A64OPC

src/backend/x64/a32_interface.cpp

@@ -24,9 +24,9 @@
 #include "common/llvm_disassemble.h"
 #include "common/scope_exit.h"
 #include "frontend/A32/translate/translate.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/location_descriptor.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/location_descriptor.h"
+#include "ir/opt/passes.h"
 
 namespace Dynarmic::A32 {
 

src/backend/x64/a64_emit_x64.cpp

@@ -25,10 +25,10 @@
 #include "common/scope_exit.h"
 #include "frontend/A64/location_descriptor.h"
 #include "frontend/A64/types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/cond.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/basic_block.h"
+#include "ir/cond.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
 
 // TODO: Have ARM flags in host flags and not have them use up GPR registers unless necessary.
 // TODO: Actually implement that proper instruction selector you've always wanted to sweetheart.
@@ -102,7 +102,7 @@ A64EmitX64::BlockDescriptor A64EmitX64::Emit(IR::Block& block) {
         case IR::Opcode::A64##name:                \
             A64EmitX64::EmitA64##name(ctx, inst);  \
             break;
-#include "frontend/ir/opcodes.inc"
+#include "ir/opcodes.inc"
 #undef OPCODE
 #undef A32OPC
 #undef A64OPC

src/backend/x64/a64_emit_x64.h

@@ -16,7 +16,7 @@
 #include "backend/x64/block_range_information.h"
 #include "backend/x64/emit_x64.h"
 #include "frontend/A64/location_descriptor.h"
-#include "frontend/ir/terminal.h"
+#include "ir/terminal.h"
 
 namespace Dynarmic::Backend::X64 {
 
@@ -97,7 +97,7 @@ protected:
 #define OPCODE(...)
 #define A32OPC(...)
 #define A64OPC(name, type, ...) void EmitA64##name(A64EmitContext& ctx, IR::Inst* inst);
-#include "frontend/ir/opcodes.inc"
+#include "ir/opcodes.inc"
 #undef OPCODE
 #undef A32OPC
 #undef A64OPC

src/backend/x64/a64_interface.cpp

@@ -18,8 +18,8 @@
 #include "common/llvm_disassemble.h"
 #include "common/scope_exit.h"
 #include "frontend/A64/translate/translate.h"
-#include "frontend/ir/basic_block.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/opt/passes.h"
 
 namespace Dynarmic::A64 {
 

src/backend/x64/abi.h

@@ -6,8 +6,8 @@
 
 #include <array>
 
-#include "common/common_types.h"
 #include "backend/x64/hostloc.h"
+#include "common/common_types.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/block_range_information.h

@@ -11,7 +11,7 @@
 #include <boost/icl/interval_set.hpp>
 #include <tsl/robin_set.h>
 
-#include "frontend/ir/location_descriptor.h"
+#include "ir/location_descriptor.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/emit_x64.cpp

@@ -16,9 +16,9 @@
 #include "common/common_types.h"
 #include "common/scope_exit.h"
 #include "common/variant_util.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/basic_block.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
 
 // TODO: Have ARM flags in host flags and not have them use up GPR registers unless necessary.
 // TODO: Actually implement that proper instruction selector you've always wanted to sweetheart.

src/backend/x64/emit_x64.h

@@ -20,8 +20,8 @@
 #include "backend/x64/reg_alloc.h"
 #include "common/bit_util.h"
 #include "common/fp/fpcr.h"
-#include "frontend/ir/location_descriptor.h"
-#include "frontend/ir/terminal.h"
+#include "ir/location_descriptor.h"
+#include "ir/terminal.h"
 
 namespace Dynarmic::IR {
 class Block;
@@ -85,7 +85,7 @@ protected:
 #define OPCODE(name, type, ...) void Emit##name(EmitContext& ctx, IR::Inst* inst);
 #define A32OPC(...)
 #define A64OPC(...)
-#include "frontend/ir/opcodes.inc"
+#include "ir/opcodes.inc"
 #undef OPCODE
 #undef A32OPC
 #undef A64OPC

src/backend/x64/emit_x64_aes.cpp

@@ -8,7 +8,7 @@
 #include "backend/x64/emit_x64.h"
 #include "common/common_types.h"
 #include "common/crypto/aes.h"
-#include "frontend/ir/microinstruction.h"
+#include "ir/microinstruction.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/emit_x64_crc32.cpp

@@ -9,7 +9,7 @@
 #include "backend/x64/block_of_code.h"
 #include "backend/x64/emit_x64.h"
 #include "common/crypto/crc32.h"
-#include "frontend/ir/microinstruction.h"
+#include "ir/microinstruction.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/emit_x64_data_processing.cpp

@@ -10,9 +10,9 @@
 #include "backend/x64/emit_x64.h"
 #include "common/assert.h"
 #include "common/common_types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/basic_block.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/emit_x64_floating_point.cpp

@@ -28,8 +28,8 @@
 #include "common/fp/op.h"
 #include "common/fp/rounding_mode.h"
 #include "common/lut_from_list.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/microinstruction.h"
+#include "ir/basic_block.h"
+#include "ir/microinstruction.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/emit_x64_packed.cpp

@@ -5,8 +5,8 @@
 
 #include "backend/x64/block_of_code.h"
 #include "backend/x64/emit_x64.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/emit_x64_saturation.cpp

@@ -12,9 +12,9 @@
 #include "common/assert.h"
 #include "common/bit_util.h"
 #include "common/common_types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/basic_block.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/emit_x64_sm4.cpp

@@ -6,7 +6,7 @@
 #include "backend/x64/block_of_code.h"
 #include "backend/x64/emit_x64.h"
 #include "common/crypto/sm4.h"
-#include "frontend/ir/microinstruction.h"
+#include "ir/microinstruction.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/emit_x64_vector.cpp

@@ -17,9 +17,9 @@
 #include "common/bit_util.h"
 #include "common/common_types.h"
 #include "common/math_util.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/basic_block.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/emit_x64_vector_floating_point.cpp

@@ -28,8 +28,8 @@
 #include "common/fp/op.h"
 #include "common/fp/util.h"
 #include "common/lut_from_list.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/microinstruction.h"
+#include "ir/basic_block.h"
+#include "ir/microinstruction.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/emit_x64_vector_saturation.cpp

@@ -6,8 +6,8 @@
 #include "backend/x64/block_of_code.h"
 #include "backend/x64/emit_x64.h"
 #include "common/common_types.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/backend/x64/reg_alloc.h

@@ -17,9 +17,9 @@
 #include "backend/x64/hostloc.h"
 #include "backend/x64/oparg.h"
 #include "common/common_types.h"
-#include "frontend/ir/cond.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/value.h"
+#include "ir/cond.h"
+#include "ir/microinstruction.h"
+#include "ir/value.h"
 
 namespace Dynarmic::Backend::X64 {
 

src/frontend/A32/ITState.h

@@ -7,7 +7,7 @@
 
 #include "common/common_types.h"
 #include "common/bit_util.h"
-#include "frontend/ir/cond.h"
+#include "ir/cond.h"
 
 namespace Dynarmic::A32 {
 

src/frontend/A32/ir_emitter.cpp

@@ -6,7 +6,7 @@
 #include "common/assert.h"
 #include "frontend/A32/ir_emitter.h"
 #include "frontend/A32/types.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/opcodes.h"
 
 #include <dynarmic/A32/arch_version.h>
 

src/frontend/A32/ir_emitter.h

@@ -9,8 +9,8 @@
 
 #include "common/common_types.h"
 #include "frontend/A32/location_descriptor.h"
-#include "frontend/ir/ir_emitter.h"
-#include "frontend/ir/value.h"
+#include "ir/ir_emitter.h"
+#include "ir/value.h"
 
 namespace Dynarmic::A32 {
 

src/frontend/A32/location_descriptor.h

@@ -12,7 +12,7 @@
 #include "frontend/A32/FPSCR.h"
 #include "frontend/A32/PSR.h"
 #include "frontend/A32/ITState.h"
-#include "frontend/ir/location_descriptor.h"
+#include "ir/location_descriptor.h"
 
 namespace Dynarmic::A32 {
 

src/frontend/A32/translate/conditional_state.cpp

@@ -11,7 +11,7 @@
 #include "common/common_types.h"
 #include "frontend/A32/ir_emitter.h"
 #include "frontend/A32/translate/conditional_state.h"
-#include "frontend/ir/cond.h"
+#include "ir/cond.h"
 
 namespace Dynarmic::A32 {
 

src/frontend/A32/translate/translate.cpp

@@ -5,7 +5,7 @@
 
 #include "frontend/A32/location_descriptor.h"
 #include "frontend/A32/translate/translate.h"
-#include "frontend/ir/basic_block.h"
+#include "ir/basic_block.h"
 
 namespace Dynarmic::A32 {
 

src/frontend/A32/translate/translate_arm.cpp

@@ -14,7 +14,7 @@
 #include "frontend/A32/translate/impl/translate_arm.h"
 #include "frontend/A32/translate/translate.h"
 #include "frontend/A32/types.h"
-#include "frontend/ir/basic_block.h"
+#include "ir/basic_block.h"
 
 namespace Dynarmic::A32 {
 

src/frontend/A32/types.h

@@ -13,7 +13,7 @@
 
 #include "common/assert.h"
 #include "common/common_types.h"
-#include "frontend/ir/cond.h"
+#include "ir/cond.h"
 
 namespace Dynarmic::A32 {
 

src/frontend/A64/ir_emitter.cpp

@@ -5,7 +5,7 @@
 
 #include "common/assert.h"
 #include "frontend/A64/ir_emitter.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/opcodes.h"
 
 namespace Dynarmic::A64 {
 

src/frontend/A64/ir_emitter.h

@@ -12,8 +12,8 @@
 #include "common/common_types.h"
 #include "frontend/A64/location_descriptor.h"
 #include "frontend/A64/types.h"
-#include "frontend/ir/ir_emitter.h"
-#include "frontend/ir/value.h"
+#include "ir/ir_emitter.h"
+#include "ir/value.h"
 
 namespace Dynarmic::A64 {
 

src/frontend/A64/location_descriptor.h

@@ -12,7 +12,7 @@
 #include "common/bit_util.h"
 #include "common/common_types.h"
 #include "common/fp/fpcr.h"
-#include "frontend/ir/location_descriptor.h"
+#include "ir/location_descriptor.h"
 
 namespace Dynarmic::A64 {
 

src/frontend/A64/translate/impl/impl.cpp

@@ -4,8 +4,8 @@
  */
 
 #include "common/bit_util.h"
-#include "frontend/ir/terminal.h"
 #include "frontend/A64/translate/impl/impl.h"
+#include "ir/terminal.h"
 
 namespace Dynarmic::A64 {
 

src/frontend/A64/translate/translate.cpp

@@ -7,8 +7,8 @@
 #include "frontend/A64/location_descriptor.h"
 #include "frontend/A64/translate/impl/impl.h"
 #include "frontend/A64/translate/translate.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/terminal.h"
+#include "ir/basic_block.h"
+#include "ir/terminal.h"
 
 namespace Dynarmic::A64 {
 

src/frontend/A64/types.h

@@ -10,7 +10,7 @@
 
 #include "common/assert.h"
 #include "common/common_types.h"
-#include "frontend/ir/cond.h"
+#include "ir/cond.h"
 
 namespace Dynarmic::A64 {
 

src/ir/basic_block.cpp

@@ -15,9 +15,9 @@
 #include "common/memory_pool.h"
 #include "frontend/A32/types.h"
 #include "frontend/A64/types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/cond.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/basic_block.h"
+#include "ir/cond.h"
+#include "ir/opcodes.h"
 
 namespace Dynarmic::IR {
 

src/ir/basic_block.h

@@ -12,10 +12,10 @@
 
 #include "common/common_types.h"
 #include "common/intrusive_list.h"
-#include "frontend/ir/location_descriptor.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/terminal.h"
-#include "frontend/ir/value.h"
+#include "ir/location_descriptor.h"
+#include "ir/microinstruction.h"
+#include "ir/terminal.h"
+#include "ir/value.h"
 
 namespace Dynarmic::Common {
 class Pool;

src/ir/ir_emitter.cpp

@@ -4,8 +4,8 @@
  */
 
 #include "common/assert.h"
-#include "frontend/ir/ir_emitter.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/ir_emitter.h"
+#include "ir/opcodes.h"
 
 namespace Dynarmic::IR {
 

src/ir/ir_emitter.h

@@ -6,10 +6,10 @@
 #pragma once
 
 #include "common/common_types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/location_descriptor.h"
-#include "frontend/ir/terminal.h"
-#include "frontend/ir/value.h"
+#include "ir/basic_block.h"
+#include "ir/location_descriptor.h"
+#include "ir/terminal.h"
+#include "ir/value.h"
 
 namespace Dynarmic::FP {
 enum class RoundingMode;

src/ir/location_descriptor.cpp

@@ -6,7 +6,7 @@
 #include <ostream>
 #include <fmt/format.h>
 
-#include "frontend/ir/location_descriptor.h"
+#include "ir/location_descriptor.h"
 
 namespace Dynarmic::IR {
 

src/ir/microinstruction.cpp

@@ -8,9 +8,9 @@
 #include <fmt/ostream.h>
 
 #include "common/assert.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
-#include "frontend/ir/type.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
+#include "ir/type.h"
 
 namespace Dynarmic::IR {
 

src/ir/microinstruction.h

@@ -9,7 +9,7 @@
 
 #include "common/common_types.h"
 #include "common/intrusive_list.h"
-#include "frontend/ir/value.h"
+#include "ir/value.h"
 
 namespace Dynarmic::IR {
 

src/ir/opcodes.cpp

@@ -11,8 +11,8 @@
 #include <fmt/format.h>
 #include <fmt/ostream.h>
 
-#include "frontend/ir/opcodes.h"
-#include "frontend/ir/type.h"
+#include "ir/opcodes.h"
+#include "ir/type.h"
 
 namespace Dynarmic::IR {
 

src/ir/opt/a32_constant_memory_reads_pass.cpp

@@ -5,9 +5,9 @@
 
 #include <dynarmic/A32/config.h>
 
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/opcodes.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/opcodes.h"
+#include "ir/opt/passes.h"
 
 namespace Dynarmic::Optimization {
 

src/ir/opt/a32_get_set_elimination_pass.cpp

@@ -8,10 +8,10 @@
 #include "common/assert.h"
 #include "common/common_types.h"
 #include "frontend/A32/types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/opcodes.h"
-#include "frontend/ir/value.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/opcodes.h"
+#include "ir/opt/passes.h"
+#include "ir/value.h"
 
 namespace Dynarmic::Optimization {
 

src/ir/opt/a64_callback_config_pass.cpp

@@ -6,10 +6,10 @@
 #include <dynarmic/A64/config.h>
 
 #include "frontend/A64/ir_emitter.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
+#include "ir/opt/passes.h"
 
 namespace Dynarmic::Optimization {
 

src/ir/opt/a64_get_set_elimination_pass.cpp

@@ -7,10 +7,10 @@
 
 #include "common/common_types.h"
 #include "frontend/A64/types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/opcodes.h"
-#include "frontend/ir/value.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/opcodes.h"
+#include "ir/opt/passes.h"
+#include "ir/value.h"
 
 namespace Dynarmic::Optimization {
 

src/ir/opt/a64_merge_interpret_blocks.cpp

@@ -9,8 +9,8 @@
 #include "common/common_types.h"
 #include "frontend/A64/location_descriptor.h"
 #include "frontend/A64/translate/translate.h"
-#include "frontend/ir/basic_block.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/opt/passes.h"
 
 namespace Dynarmic::Optimization {
 

src/ir/opt/constant_propagation_pass.cpp

@@ -7,12 +7,12 @@
 
 #include "common/assert.h"
 #include "common/bit_util.h"
-#include "common/safe_ops.h"
 #include "common/common_types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/ir_emitter.h"
-#include "frontend/ir/opcodes.h"
-#include "ir_opt/passes.h"
+#include "common/safe_ops.h"
+#include "ir/basic_block.h"
+#include "ir/ir_emitter.h"
+#include "ir/opcodes.h"
+#include "ir/opt/passes.h"
 
 namespace Dynarmic::Optimization {
 

src/ir/opt/dead_code_elimination_pass.cpp

@@ -4,8 +4,8 @@
  */
 
 #include "common/iterator_util.h"
-#include "frontend/ir/basic_block.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/opt/passes.h"
 
 namespace Dynarmic::Optimization {
 

src/ir/opt/identity_removal_pass.cpp

@@ -6,9 +6,9 @@
 #include <vector>
 
 #include "common/iterator_util.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/opcodes.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/opcodes.h"
+#include "ir/opt/passes.h"
 
 namespace Dynarmic::Optimization {
 

src/ir/opt/ir_matcher.h

@@ -16,9 +16,9 @@
 #include <mp/typelist/list.h>
 #include <mp/typelist/prepend.h>
 
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
-#include "frontend/ir/value.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
+#include "ir/value.h"
 
 namespace Dynarmic::Optimization::IRMatcher {
 

src/ir/opt/verification_pass.cpp

@@ -8,11 +8,11 @@
 
 #include "common/assert.h"
 #include "common/common_types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
-#include "frontend/ir/type.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
+#include "ir/opt/passes.h"
+#include "ir/type.h"
 
 namespace Dynarmic::Optimization {
 

src/ir/terminal.h

@@ -8,8 +8,8 @@
 #include <boost/variant.hpp>
 
 #include "common/common_types.h"
-#include "frontend/ir/cond.h"
-#include "frontend/ir/location_descriptor.h"
+#include "ir/cond.h"
+#include "ir/location_descriptor.h"
 
 namespace Dynarmic::IR {
 namespace Term {

src/ir/type.cpp

@@ -7,7 +7,7 @@
 #include <ostream>
 #include <string>
 
-#include "frontend/ir/type.h"
+#include "ir/type.h"
 
 namespace Dynarmic::IR {
 

src/ir/value.cpp

@@ -5,10 +5,10 @@
 
 #include "common/assert.h"
 #include "common/bit_util.h"
-#include "frontend/ir/microinstruction.h"
-#include "frontend/ir/opcodes.h"
-#include "frontend/ir/type.h"
-#include "frontend/ir/value.h"
+#include "ir/microinstruction.h"
+#include "ir/opcodes.h"
+#include "ir/type.h"
+#include "ir/value.h"
 
 namespace Dynarmic::IR {
 

src/ir/value.h

@@ -9,7 +9,7 @@
 
 #include "common/assert.h"
 #include "common/common_types.h"
-#include "frontend/ir/type.h"
+#include "ir/type.h"
 
 namespace Dynarmic::A32 {
 enum class ExtReg;

tests/A32/fuzz_arm.cpp

@@ -22,10 +22,10 @@
 #include "frontend/A32/location_descriptor.h"
 #include "frontend/A32/translate/translate.h"
 #include "frontend/A32/types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/location_descriptor.h"
-#include "frontend/ir/opcodes.h"
 #include "fuzz_util.h"
+#include "ir/basic_block.h"
+#include "ir/location_descriptor.h"
+#include "ir/opcodes.h"
 #include "rand_int.h"
 #include "testenv.h"
 #include "unicorn_emu/a32_unicorn.h"

tests/A32/fuzz_thumb.cpp

@@ -23,8 +23,8 @@
 #include "frontend/A32/location_descriptor.h"
 #include "frontend/A32/PSR.h"
 #include "frontend/A32/translate/translate.h"
-#include "frontend/ir/basic_block.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/opt/passes.h"
 #include "rand_int.h"
 #include "testenv.h"
 #include "unicorn_emu/a32_unicorn.h"

tests/A64/fuzz_with_unicorn.cpp

@@ -19,10 +19,10 @@
 #include "frontend/A64/location_descriptor.h"
 #include "frontend/A64/translate/translate.h"
 #include "frontend/A64/types.h"
-#include "frontend/ir/basic_block.h"
-#include "frontend/ir/opcodes.h"
 #include "fuzz_util.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/opcodes.h"
+#include "ir/opt/passes.h"
 #include "rand_int.h"
 #include "testenv.h"
 #include "unicorn_emu/a64_unicorn.h"

tests/decoder_tests.cpp

@@ -13,7 +13,7 @@
 #include "common/assert.h"
 #include "frontend/A32/decoder/asimd.h"
 #include "frontend/A32/translate/impl/translate_arm.h"
-#include "frontend/ir/opcodes.h"
+#include "ir/opcodes.h"
 
 using namespace Dynarmic;
 

tests/print_info.cpp

@@ -27,8 +27,8 @@
 #include "frontend/A64/location_descriptor.h"
 #include "frontend/A64/translate/impl/impl.h"
 #include "frontend/A64/translate/translate.h"
-#include "frontend/ir/basic_block.h"
-#include "ir_opt/passes.h"
+#include "ir/basic_block.h"
+#include "ir/opt/passes.h"
 
 #include <fmt/format.h>
 #include <fmt/ostream.h>