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thumb32: Implement QSUB16/UQSUB16

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This commit is contained in:
Lioncash 2021-02-01 17:05:17 -05:00
parent 416fe26df0
commit d923fb24c6
4 changed files with 34 additions and 2 deletions
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4
src/frontend/A32/decoder/thumb32.h
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@ -244,7 +244,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
INST(&V::thumb32_QADD16, "QADD16", "111110101001nnnn1111dddd0001mmmm"),
INST(&V::thumb32_QASX, "QASX", "111110101010nnnn1111dddd0001mmmm"),
INST(&V::thumb32_QSAX, "QSAX", "111110101110nnnn1111dddd0001mmmm"),
//INST(&V::thumb32_QSUB16, "QSUB16", "111110101101----1111----0001----"),
INST(&V::thumb32_QSUB16, "QSUB16", "111110101101nnnn1111dddd0001mmmm"),
//INST(&V::thumb32_QADD8, "QADD8", "111110101000----1111----0001----"),
//INST(&V::thumb32_QSUB8, "QSUB8", "111110101100----1111----0001----"),
//INST(&V::thumb32_SHADD16, "SHADD16", "111110101001----1111----0010----"),
@ -264,7 +264,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
INST(&V::thumb32_UQADD16, "UQADD16", "111110101001nnnn1111dddd0101mmmm"),
INST(&V::thumb32_UQASX, "UQASX", "111110101010nnnn1111dddd0101mmmm"),
INST(&V::thumb32_UQSAX, "UQSAX", "111110101110nnnn1111dddd0101mmmm"),
//INST(&V::thumb32_UQSUB16, "UQSUB16", "111110101101----1111----0101----"),
INST(&V::thumb32_UQSUB16, "UQSUB16", "111110101101nnnn1111dddd0101mmmm"),
//INST(&V::thumb32_UQADD8, "UQADD8", "111110101000----1111----0101----"),
//INST(&V::thumb32_UQSUB8, "UQSUB8", "111110101100----1111----0101----"),
//INST(&V::thumb32_UHADD16, "UHADD16", "111110101001----1111----0110----"),

26
src/frontend/A32/translate/impl/thumb32_parallel.cpp
View file

@ -233,6 +233,19 @@ bool ThumbTranslatorVisitor::thumb32_QSAX(Reg n, Reg d, Reg m) {
return true;
}
bool ThumbTranslatorVisitor::thumb32_QSUB16(Reg n, Reg d, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto reg_m = ir.GetRegister(m);
const auto reg_n = ir.GetRegister(n);
const auto result = ir.PackedSaturatedSubS16(reg_n, reg_m);
ir.SetRegister(d, result);
return true;
}
bool ThumbTranslatorVisitor::thumb32_UQADD16(Reg n, Reg d, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
@ -284,4 +297,17 @@ bool ThumbTranslatorVisitor::thumb32_UQSAX(Reg n, Reg d, Reg m) {
return true;
}
bool ThumbTranslatorVisitor::thumb32_UQSUB16(Reg n, Reg d, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto reg_m = ir.GetRegister(m);
const auto reg_n = ir.GetRegister(n);
const auto result = ir.PackedSaturatedSubU16(reg_n, reg_m);
ir.SetRegister(d, result);
return true;
}
} // namespace Dynarmic::A32

2
src/frontend/A32/translate/impl/translate_thumb.h
View file

@ -145,9 +145,11 @@ struct ThumbTranslatorVisitor final {
bool thumb32_QADD16(Reg n, Reg d, Reg m);
bool thumb32_QASX(Reg n, Reg d, Reg m);
bool thumb32_QSAX(Reg n, Reg d, Reg m);
bool thumb32_QSUB16(Reg n, Reg d, Reg m);
bool thumb32_UQADD16(Reg n, Reg d, Reg m);
bool thumb32_UQASX(Reg n, Reg d, Reg m);
bool thumb32_UQSAX(Reg n, Reg d, Reg m);
bool thumb32_UQSUB16(Reg n, Reg d, Reg m);
};
} // namespace Dynarmic::A32

4
tests/A32/fuzz_thumb.cpp
View file

@ -390,6 +390,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
three_reg_not_r15),
ThumbInstGen("111110101000nnnn1111dddd1010mmmm", // QSUB
three_reg_not_r15),
ThumbInstGen("111110101101nnnn1111dddd0001mmmm", // QSUB16
three_reg_not_r15),
ThumbInstGen("111110101001nnnn1111dddd1010mmmm", // RBIT
[](u32 inst) {
const auto d = Common::Bits<8, 11>(inst);
@ -444,6 +446,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
three_reg_not_r15),
ThumbInstGen("111110101110nnnn1111dddd0101mmmm", // UQSAX
three_reg_not_r15),
ThumbInstGen("111110101101nnnn1111dddd0101mmmm", // UQSUB16
three_reg_not_r15),
ThumbInstGen("111110101110nnnn1111dddd0100mmmm", // USAX
three_reg_not_r15),
ThumbInstGen("111110101100nnnn1111dddd0100mmmm", // USUB8