thumb32: Implement MRS (register)
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a5a210a9a5
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61333917a4
4 changed files with 20 additions and 2 deletions
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@ -110,8 +110,7 @@ INST(thumb32_BXJ, "BXJ", "111100111100mmmm100011
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//INST(thumb32_SUBS_pc_lr, "SUBS PC, LR", "111100111101111010001111--------")
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//INST(thumb32_MRS_banked, "MRS (banked)", "11110011111-----10-0------1-----")
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//INST(thumb32_MRS_reg_1, "MRS (reg)", "111100111111----10-0------0-----")
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//INST(thumb32_MRS_reg_2, "MRS (reg)", "111100111110----10-0------0-----")
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INST(thumb32_MRS_reg, "MRS (reg)", "11110011111R11111000dddd00000000")
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//INST(thumb32_HVC, "HVC", "111101111110----1000------------")
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//INST(thumb32_SMC, "SMC", "111101111111----1000000000000000")
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INST(thumb32_UDF, "UDF", "111101111111----1010------------") // v6T2
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@ -66,4 +66,19 @@ bool TranslatorVisitor::thumb32_YIELD() {
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return thumb16_YIELD();
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}
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bool TranslatorVisitor::thumb32_MRS_reg(bool read_spsr, Reg d) {
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if (d == Reg::R15) {
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return UnpredictableInstruction();
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}
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// TODO: Revisit when implementing more than user mode.
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if (read_spsr) {
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return UndefinedInstruction();
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}
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ir.SetRegister(d, ir.GetCpsr());
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return true;
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}
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} // namespace Dynarmic::A32
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@ -575,6 +575,7 @@ struct TranslatorVisitor final {
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bool thumb32_WFE();
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bool thumb32_WFI();
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bool thumb32_YIELD();
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bool thumb32_MSR_reg(bool R, Reg n, Imm<4> mask);
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// thumb32 branch instructions
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bool thumb32_BL_imm(Imm<1> S, Imm<10> hi, Imm<1> j1, Imm<1> j2, Imm<11> lo);
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@ -192,6 +192,9 @@ std::vector<u16> GenRandomThumbInst(u32 pc, bool is_last_inst, A32::ITState it_s
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// FPSCR is inaccurate
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"vfp_VMRS",
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// Unicorn is incorrect?
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"thumb32_MRS_reg",
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// Unicorn has incorrect implementation (incorrect rounding and unsets CPSR.T??)
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"vfp_VCVT_to_fixed",
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"vfp_VCVT_from_fixed",
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