thumb32: Implement QADD8/UQADD8
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d923fb24c6
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874ab6a7b6
4 changed files with 34 additions and 2 deletions
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@ -245,7 +245,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
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INST(&V::thumb32_QASX, "QASX", "111110101010nnnn1111dddd0001mmmm"),
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INST(&V::thumb32_QSAX, "QSAX", "111110101110nnnn1111dddd0001mmmm"),
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INST(&V::thumb32_QSUB16, "QSUB16", "111110101101nnnn1111dddd0001mmmm"),
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//INST(&V::thumb32_QADD8, "QADD8", "111110101000----1111----0001----"),
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INST(&V::thumb32_QADD8, "QADD8", "111110101000nnnn1111dddd0001mmmm"),
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//INST(&V::thumb32_QSUB8, "QSUB8", "111110101100----1111----0001----"),
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//INST(&V::thumb32_SHADD16, "SHADD16", "111110101001----1111----0010----"),
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//INST(&V::thumb32_SHASX, "SHASX", "111110101010----1111----0010----"),
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@ -265,7 +265,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
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INST(&V::thumb32_UQASX, "UQASX", "111110101010nnnn1111dddd0101mmmm"),
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INST(&V::thumb32_UQSAX, "UQSAX", "111110101110nnnn1111dddd0101mmmm"),
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INST(&V::thumb32_UQSUB16, "UQSUB16", "111110101101nnnn1111dddd0101mmmm"),
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//INST(&V::thumb32_UQADD8, "UQADD8", "111110101000----1111----0101----"),
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INST(&V::thumb32_UQADD8, "UQADD8", "111110101000nnnn1111dddd0101mmmm"),
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//INST(&V::thumb32_UQSUB8, "UQSUB8", "111110101100----1111----0101----"),
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//INST(&V::thumb32_UHADD16, "UHADD16", "111110101001----1111----0110----"),
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//INST(&V::thumb32_UHASX, "UHASX", "111110101010----1111----0110----"),
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@ -182,6 +182,19 @@ bool ThumbTranslatorVisitor::thumb32_USUB16(Reg n, Reg d, Reg m) {
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_QADD8(Reg n, Reg d, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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return UnpredictableInstruction();
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}
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const auto reg_m = ir.GetRegister(m);
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const auto reg_n = ir.GetRegister(n);
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const auto result = ir.PackedSaturatedAddS8(reg_n, reg_m);
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ir.SetRegister(d, result);
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_QADD16(Reg n, Reg d, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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return UnpredictableInstruction();
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@ -246,6 +259,19 @@ bool ThumbTranslatorVisitor::thumb32_QSUB16(Reg n, Reg d, Reg m) {
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_UQADD8(Reg n, Reg d, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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return UnpredictableInstruction();
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}
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const auto reg_m = ir.GetRegister(m);
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const auto reg_n = ir.GetRegister(n);
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const auto result = ir.PackedSaturatedAddU8(reg_n, reg_m);
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ir.SetRegister(d, result);
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return true;
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}
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bool ThumbTranslatorVisitor::thumb32_UQADD16(Reg n, Reg d, Reg m) {
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if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
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return UnpredictableInstruction();
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@ -142,10 +142,12 @@ struct ThumbTranslatorVisitor final {
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bool thumb32_USUB8(Reg n, Reg d, Reg m);
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bool thumb32_USUB16(Reg n, Reg d, Reg m);
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bool thumb32_QADD8(Reg n, Reg d, Reg m);
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bool thumb32_QADD16(Reg n, Reg d, Reg m);
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bool thumb32_QASX(Reg n, Reg d, Reg m);
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bool thumb32_QSAX(Reg n, Reg d, Reg m);
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bool thumb32_QSUB16(Reg n, Reg d, Reg m);
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bool thumb32_UQADD8(Reg n, Reg d, Reg m);
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bool thumb32_UQADD16(Reg n, Reg d, Reg m);
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bool thumb32_UQASX(Reg n, Reg d, Reg m);
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bool thumb32_UQSAX(Reg n, Reg d, Reg m);
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@ -378,6 +378,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
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}),
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ThumbInstGen("111110101000nnnn1111dddd1000mmmm", // QADD
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three_reg_not_r15),
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ThumbInstGen("111110101000nnnn1111dddd0001mmmm", // QADD8
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three_reg_not_r15),
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ThumbInstGen("111110101001nnnn1111dddd0001mmmm", // QADD16
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three_reg_not_r15),
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ThumbInstGen("111110101010nnnn1111dddd0001mmmm", // QASX
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@ -440,6 +442,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
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three_reg_not_r15),
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ThumbInstGen("111110101010nnnn1111dddd0100mmmm", // UASX
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three_reg_not_r15),
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ThumbInstGen("111110101000nnnn1111dddd0101mmmm", // UQADD8
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three_reg_not_r15),
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ThumbInstGen("111110101001nnnn1111dddd0101mmmm", // UQADD16
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three_reg_not_r15),
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ThumbInstGen("111110101010nnnn1111dddd0101mmmm", // UQASX
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