Commit graph

358 commits

Author SHA1 Message Date
MerryMage
f17cd6f2c5 unpacked: Use ResidualErrorOnRightShift in FPRoundBase
Fixes a bug relating to exponents that are severely out of range.
2020-04-22 20:46:21 +01:00
MerryMage
805428e35e fp: Remove MantissaT 2020-04-22 20:46:21 +01:00
MerryMage
55eaa16615 a64_emit_x64: Ensure host has updated ticks in EmitA64GetCNTPCT
Discovered by @Subv.
Fixes incomplete fix begun in 5a91c94dca47c9702dee20fbd5ae1f4c07eef9df.
That fix fails to take into account that LinkBlock doesn't update ticks until there
are no remaining ticks to be executed.

Test added to confirm fix.
2020-04-22 20:46:21 +01:00
MerryMage
edd795e991 a64_emit_x64: Fix stack misalignment on Windows for 128-bit exclusive writes
Discovered by @Subv.
Includes a test to ensure this codepath is exercised on Windows.
2020-04-22 20:46:21 +01:00
Lioncash
1dc1e3dcd8 fp: Use forward declarations where applicable
Minimizes the amount of files that need to be rebuilt if the headers
ever change.
2020-04-22 20:46:21 +01:00
Lioncash
5b39e8dcf8 tests: Silence warnings in skyeye code
Gets rid of warning noise when compiling the tests.
2020-04-22 20:46:21 +01:00
MerryMage
4525209bab tests: Add FABD test 2020-04-22 20:46:21 +01:00
MerryMage
9571269552 fp/op: Implement FPToFixed 2020-04-22 20:46:19 +01:00
MerryMage
8087e8df05 mantissa_util: Implement ResidualErrorOnRightShift
Accurately calculate residual error that is shifted out
2020-04-22 20:46:19 +01:00
MerryMage
52ed365158 tests/fp: Add FPRound tests 2020-04-22 20:46:19 +01:00
MerryMage
7360a2579b mp: Implement metaprogramming library 2020-04-22 20:46:19 +01:00
MerryMage
4ab029c114 fp: Implement FPUnpack 2020-04-22 20:46:19 +01:00
MerryMage
9c4f234417 fuzz_with_unicorn: Avoid self-modifying code
* Don't immediately terminate when unicorn raises an interrupt
* Detect self-modifying code
2020-04-22 20:46:19 +01:00
MerryMage
9f8c6f60f5 fuzz_with_unicorn: Configure as per qemu max configuration 2020-04-22 20:46:19 +01:00
Lioncash
64d4e40081 tests/A32/testenv: Add type aliases for register arrays
Allows avoiding duplicating std::array instance sizes and types.
2020-04-22 20:46:19 +01:00
Lioncash
a25bacc436 tests/unicorn: Add type aliases to the Unicorn class
Centralizes all register and vector array definitions to a single set of
aliases, so if these are ever changed, then the rest of the testing code
will follow suit without the need to manually change them.
2020-04-22 20:46:19 +01:00
MerryMage
8c65d58cb8 tests/A64: Randomize FPCR.RMode for single random instruction 2020-04-22 20:46:18 +01:00
Lioncash
7d52d7bef8 inst_gen: Compress loop into std::any_of in IsInvalidInstruction()
Same behavior, but using a more self-documenting function.
2020-04-22 20:46:18 +01:00
Lioncash
d909b0919e fuzz_with_unicorn: Move std::vector outside loop in small random block test case
Avoids constructing and destructing the vector repeatedly, we can just
alter the contents of the vector on each iteration instead. Also move
out the std::array instances as well, like with the floating-point test
case and the single random instruction test case.

We can also use the regular form of std::generate and avoid hardcoding
size values twice.
2020-04-22 20:46:18 +01:00
MerryMage
ef57d75b32 fuzz_with_unicorn: Temporarily disable FDIV 2020-04-22 20:46:18 +01:00
MerryMage
ec0a91d6ee tests/A64: Test small blocks 2020-04-22 20:46:18 +01:00
MerryMage
330e6111fa fuzz_with_unicorn: Randomize FPCR.RMode 2020-04-22 20:46:18 +01:00
MerryMage
eb3ca7f65b tests: Add print_info program
Eases debugging by printing out dynarmic IR for a given A64 instruction, along with
information about what instruction dynarmic thinks it is.

Also prints an LLVM disassembly of the instruction.
2020-04-22 20:46:18 +01:00
MerryMage
8c90fcf58e IR: Implement FPMulAdd 2020-04-22 20:46:18 +01:00
Lioncash
e64978ed89 fuzz_with_unicorn: Make float_numbers in floating-point tests constexpr
Given this is just a lookup table, this can be made immutable.
2020-04-22 20:46:18 +01:00
Lioncash
329137a277 fuzz_with_unicorn: Remove exclusion of FMOV (imm) for FP-16 floats
Qemu, or rather, Unicorn now supports FP-16, since I backported support
for the recent changes to mainline Qemu relating to FP-16 support.
2020-04-22 20:46:18 +01:00
Lioncash
0c63e8f396 fuzz_with_unicorn: Silence unused variable warning
Currently, structured bindings don't provide a way to ignore unused variables.
2020-04-22 20:46:17 +01:00
Lioncash
cd0b71159a CMake: Make FindUnicorn introduce a unicorn target
Makes the find module do all the work of properly setting up the target instead of needing to do it in the main CMakeLists file.
2020-04-22 20:46:16 +01:00
Lioncash
ab58bbddc8 unicorn: Be explicit about casting away const to const-incorrect APIs
Uses C++ casts which silence relevant warnings in Xcode 9.3

Also migrates relevant Read function equivalents over for consistency.
2020-04-22 20:46:16 +01:00
MerryMage
c490a45af6 fuzz_with_unicorn: Correct GenRandomInst
UnallocatedEncoding is now handled in ShouldTestInst
2020-04-22 20:46:15 +01:00
MerryMage
be57608353 A64: Partially implement FCVTZU (scalar, fixed-point) and FCVTZS (scalar, fixed-point) 2020-04-22 20:46:15 +01:00
MerryMage
9e4e4e9c1d A64: Implement system register CNTPCT_EL0 2020-04-22 20:46:15 +01:00
MerryMage
44a5b57f2a fuzz_with_unicorn: QEMU's implementation of FCVT is incorrect 2020-04-22 20:46:14 +01:00
MerryMage
1311f67b4a fuzz_with_unicorn: Explicitly test floating point instructions 2020-04-22 20:46:14 +01:00
MerryMage
e97581d063 fuzz_with_unicorn: Print AArch64 disassembly 2020-04-22 20:46:14 +01:00
MerryMage
1f5b3bca43 Exclusive fixups
* Incorrect size of exclusive_address
* Disable tests on exclusive memory instructions for now
2020-04-22 20:46:14 +01:00
MerryMage
f6a2104ab3 fuzz_with_unicorn: Speed up tests by not initializing/tearing down constantly 2020-04-22 20:46:14 +01:00
MerryMage
ef02658049 fuzz_with_unicorn: Fix read-past-end access via jit_iter 2020-04-22 20:46:14 +01:00
MerryMage
5edd623b9d Implement DC instructions 2020-04-22 20:46:14 +01:00
MerryMage
f378d2ef1b Forward declare IR::Opcode and IR::Type where possible 2020-04-22 20:46:14 +01:00
MerryMage
a78e13ff19 fuzz_arm: Use SCOPE_FAIL 2020-04-22 20:46:13 +01:00
MerryMage
cc9efd13c9 A64: Implement STLLRB, STLLRH, STLLR, LDLARB, LDLARH, LDLAR 2020-04-22 20:46:13 +01:00
Lioncash
12c6f841c2 inst_gen: Make invalid_instructions a static inline variable 2020-04-22 20:46:13 +01:00
Lioncash
f96e83c486 fuzz_with_unicorn: Move instruction generator vector into GenRandomInst
Keeps scope localized and prevents potential static initialization issues.
2020-04-22 20:46:13 +01:00
MerryMage
47661b746b basic_block: Fix bogus GCC maybe-uninitialized warning 2020-04-22 20:46:13 +01:00
MerryMage
ca38225e08 fuzz_with_unicorn: Skip instructions that need to be interpreted 2020-04-22 20:46:13 +01:00
MerryMage
4be55b8b84 A64: Implement FMOV (scalar, immediate) 2020-04-22 20:46:13 +01:00
MerryMage
7e0f14303c fuzz_with_unicorn: Print information on test failure 2020-04-22 20:46:12 +01:00
MerryMage
d7044bc751 assert: Use fmt in ASSERT_MSG 2020-04-22 20:46:12 +01:00
Lioncash
71422c2b48 fuzz_with_unicorn: Move data outside loop
Given we know we're only ever going to use one instruction, we can just presize the vector and reassign to it
instead of potentially reallocating the same memory 100000 times
2020-04-22 20:46:12 +01:00
Lioncash
cd69c6a17c fuzz_with_unicorn: Dehardcode some constants 2020-04-22 20:46:12 +01:00
MerryMage
98ec9c5f90 A32: Change UserCallbacks to be similar to A64's interface 2020-04-22 20:46:12 +01:00
Lioncash
d3b1a72bca unicorn: Display EC and ISS separately beside the full ESR value
Makes it a little nicer to pick out the exception class details at a glance
2020-04-22 20:44:38 +01:00
Lioncash
8fa9849c25 unicorn: Use static_cast instead of reinterpret_cast
It's well-defined to cast from void* back to the original pointer type.
2020-04-22 20:44:38 +01:00
Lioncash
cf824fb2b2 unicorn_load: Minor Windows-related changes
- Add missing include
- Fix a potential compilation issue where the constructor wouldn't be able to execute, as it would be private.
2020-04-22 20:44:38 +01:00
MerryMage
a8ed248a13 tests/A64: Test memory writes 2020-04-22 20:44:38 +01:00
Lioncash
f1057aa362 tests: Fix truncation in GetFpcr() 2020-04-22 20:44:38 +01:00
MerryMage
e1df7ae621 IR: Add IR instructions A64Memory{Read,Write}128
This implementation only works on macOS and Linux.
2020-04-22 20:44:37 +01:00
MerryMage
1749780929 interface: Move Vector typedef to config.h 2020-04-22 20:44:37 +01:00
MerryMage
2a493f8b50 fuzz_with_unicorn: Compare vectors 2020-04-22 20:42:46 +01:00
MerryMage
35aaee6cc6 tests/A64: Randomize vectors 2020-04-22 20:42:46 +01:00
MerryMage
33a02ed91a tests/A64/unicorn: Print interrupt number when InterruptHook is hit 2020-04-22 20:42:46 +01:00
MerryMage
e9f6e7c82c tests/A64: Allow RunTestInstance to start from an arbitrary offset 2020-04-22 20:42:46 +01:00
Thomas Guillemard
896cf44f96 A64: Implement REV, REV32, and REV16 (#126) 2020-04-22 20:42:46 +01:00
MerryMage
7992a319ba A64/tests: Split unicorn sanity checking from other tests 2020-04-22 20:42:45 +01:00
MerryMage
9d42bc3228 tests/A64: Single random instruction: Test branch instructions as well 2020-04-22 20:42:45 +01:00
MerryMage
9f57283a30 A64: Implement SBFM, BFM, UBFM 2020-04-22 20:42:45 +01:00
MerryMage
c34639f33d fuzz_thumb: Off by one error 2020-04-22 20:42:45 +01:00
MerryMage
a59e9ad9c6 travis: Run A64 tests 2020-04-22 20:42:45 +01:00
MerryMage
e99db8e745 tests/A64: Randomize PSTATE.<NZCV> 2020-04-22 20:42:45 +01:00
MerryMage
99b7516c8c testenv: Use format constants 2020-04-22 20:42:45 +01:00
MerryMage
39d083aa87 tests/A64: Unicorn interface fixes
- Use a std::unique_ptr instead of new/delete.
- UnmappedMemoryHook: Correct range when wraparound of the address space occurs
- UnmappedMemoryHook: Handle case when we attempt to map the same page twice
2020-04-22 20:42:45 +01:00
MerryMage
d5725de26a tests/A64: Fuzz against unicorn 2020-04-22 20:42:45 +01:00
MerryMage
a0ef6eda19 tests/A64: Move TestEnvironment to own header 2020-04-22 20:42:45 +01:00
MerryMage
2f8d7ae86f tests/a64: Use format constants 2020-04-22 20:42:45 +01:00
MerryMage
72a793f5b0 ir_opt: Split off A32 specific passes 2020-04-22 20:42:45 +01:00
MerryMage
cb481a3a48 A64: Implement compare and branch 2020-04-22 20:42:45 +01:00
MerryMage
e8bcf72ee5 A64: PSTATE access and tests 2020-04-22 20:42:45 +01:00
MerryMage
0641445e51 A64: Implement logical 2020-04-22 20:42:45 +01:00
MerryMage
d1cef6ffb0 A64: Implement ADD_shifted 2020-04-22 20:42:44 +01:00
MerryMage
d1eb757f93 A64: Backend framework 2020-04-22 20:42:44 +01:00
MerryMage
9d15e0a8e1 Final A32 refactor 2020-04-22 20:39:27 +01:00
MerryMage
b3c73e2622 Label A32 specific code appropriately 2020-04-22 20:33:30 +01:00
MerryMage
19a7fb8992 jit_state: Split off CPSR.NZCV 2020-04-22 20:26:40 +01:00
MerryMage
6adc554b53 jit_state: Hide cpsr implementation 2020-04-22 20:26:40 +01:00
MerryMage
256749910f Add AddTicks and GetTicksRemaining callbacks 2020-04-22 20:26:12 +01:00
Mat M
c6d09adcb7 CMakeLists: Derive the source file listings from targets directly (#118)
This gets rid of the need to store to individual variables before creating
the target itself, cleaning up the variables in the surrounding scope a little bit.
2020-04-22 20:26:07 +01:00
MerryMage
f734d7000e fuzz_arm: Test SEL alongside packed instructions 2020-04-22 20:26:07 +01:00
MerryMage
814e378249 VCMP and VCMPE were the other way around
- This was due to a misunderstanding of what the E in VCMPE means.
- The E refers to an exception being raised when a QNaN is encountered.
- Added unit tests for VCMP{E}
2020-04-22 20:26:07 +01:00
MerryMage
93cf180a44 skyeye: Correct assumption that VFP_REG_ZERO will always be zero 2020-04-22 20:26:07 +01:00
MerryMage
993e142c6b disassembler: Fix RegList 2017-08-05 01:57:29 +01:00
MerryMage
c6c980dfd7 fuzz_arm: Add vsub test 2017-04-02 12:38:38 +01:00
Lynn
fd068ed6b8 Ranged cache invalidation 2017-03-20 11:58:25 +00:00
Lioncash
5a02da445a CMakeLists: Only link LLVM libs against the library
LLVM library code is only used within the main dynarmic library, not the test executable.
2017-03-11 13:25:14 +00:00
Lioncash
d0efbb9348 CMakeLists: Remove unnecessary linker language specifiers
This is already inferred by the cmake project being declared a CXX project.
2017-03-07 18:30:58 +00:00
Lioncash
9906be746f CMakeLists: Make boost an interface library target
Gets rid of the use of a non-target include and makes libraries
explicitly link against the identifier name in order to get includes.
2017-03-04 11:52:32 +00:00
Lioncash
f9e7e85308 externals: Make catch an interface target
Eliminates top-level inclusion of the headers with include_directories()
and instead utilizes it on a by-target basis using target_include_directories().
2017-02-26 13:43:47 +00:00
MerryMage
2449468ede fuzz_arm: Dump state when exception is thrown 2017-02-25 11:55:27 +00:00
MerryMage
e8b6e76fbf CMakeLists: Drop -Wno-unused-parameter 2017-02-22 23:52:18 +00:00
MerryMage
c7f32f9466 dyncom: Correct SXTAB16 and SXTB16 2017-02-18 20:14:42 +00:00
MerryMage
2447f2f360 callbacks: Factorize memory callbacks into inner structure 2017-01-30 21:42:51 +00:00
Fernando Sahmkow
70f4235ee9 Implement UXTAB16 (#78) 2016-12-29 12:15:18 +00:00
MerryMage
36082087de callbacks: Read code using MemoryReadCode callback 2016-12-21 21:39:14 +00:00
MerryMage
b1df70578f fuzz_arm: Add test cases for saturation instructions 2016-12-21 19:51:25 +00:00
MerryMage
410e84434e fuzz_arm: Add tests for QASX, QSAX, UQASX, UQSAX 2016-12-20 21:52:38 +00:00
FernandoS27
8919265d2c Implement SADD8, SADD16, SSUB8, SSUB16, USUB16 2016-12-20 21:52:38 +00:00
FernandoS27
3f6ecfe245 Implemented USAD8 and USADA8 2016-12-20 21:52:38 +00:00
MerryMage
975987f38e fuzz_arm: Add test for edge-case of UASX instruction 2016-12-20 20:04:38 +00:00
MerryMage
821b26e9d2 fuzz_arm: Add test for edge-case of SHSAX instruction 2016-12-20 19:12:21 +00:00
MerryMage
b1d3e7aae9 emit_x64: Refactor patching code
* Only have a single std::unordered_map for patching information
* Factor patch emitters into own functions
* Implement EmitX64::Unpatch
2016-12-20 14:06:55 +00:00
MerryMage
cc58666c06 CMakeLists: Use target_compile_options intead of add_compile_options 2016-12-19 00:48:25 +00:00
MerryMage
96e46ba6b5 Implement QADD, QSUB, QDADD, QDSUB 2016-12-15 22:34:29 +00:00
MerryMage
276873bf70 Wrap #pragma warning with #ifdef _MSC_VER .. #endif 2016-12-15 21:36:02 +00:00
MerryMage
91e851a991 CMakeLists: Enable /W4 on MSVC 2016-12-15 20:52:23 +00:00
MerryMage
5c1aab1666 Implement CLZ
Includes tests
2016-12-04 22:56:33 +00:00
MerryMage
370f654590 fuzz_arm: Add tests for parallel add/subtract (modulo) 2016-12-04 20:51:12 +00:00
Sebastian Valle
cda25c12b3 Added tests for the ARM parallel halving instructions. (#49) 2016-11-26 17:24:57 +00:00
Sebastian Valle
32615d0eff Implemented the PKHTB and PKHBT instructions with tests. (#40) 2016-11-23 21:45:18 +00:00
Sebastian Valle
d589c63107 Implemented the ARM SEL instruction, with tests. (#39)
The test for this instruction is very peculiar. As the instruction's behavior depends on the value of the CPSR, we generate a MSR instruction after each SEL instruction to change the CPSR.
2016-11-23 18:14:07 +00:00
MerryMage
5c8bf5a15d callbacks: CallSVC returns void 2016-09-05 19:15:45 +01:00
Mat M
6d53bb6d7e arm_types: Split out LocationDescriptor (#20)
This isn't really an ARM-specific type, since it's used to indicate a
Block location.
2016-09-05 11:54:09 +01:00
Mat M
8c4df46580 FPSCR: Make value constructor explicit (#13)
Maintains consistency between the PSR helper.
2016-09-03 12:48:31 +01:00
Mat M
6ec651498d arm: Add PSR helper type (#3) 2016-09-02 17:34:33 +01:00
bunnei
728b4ca0d4 tests: Fix compile errors. (#4) 2016-09-02 08:51:03 +01:00
MerryMage
4321e829d1 callbacks: Add user_arg argument to InterpreterFallback 2016-09-01 02:00:08 +01:00
Lioncash
e1ed160768 test_arm_disassembler: More tests
Adds tests for
- Half-word multiply and multiply accumulate instructions
- Multiply and multiply accumulate instructions
- Synchronization primitive instructions
2016-08-28 22:06:52 +01:00
Lioncash
d164184b1e test_arm_disassembler: Add more data processing instruction tests 2016-08-28 20:28:32 +01:00
MerryMage
59a8e14d1c reg_alloc: Correct OpArg::setBit for Reg 2016-08-26 15:23:38 +01:00
MerryMage
ed3a686d1d Implement public header files 2016-08-26 00:44:50 +01:00
MerryMage
130b5510a6 tests/fuzz_arm: Fix MSVC conversion warnings 2016-08-25 17:46:22 +01:00
MerryMage
3caf31d19c skyeye: Fix MSVC conversion warnings 2016-08-25 17:43:59 +01:00
MerryMage
ec4c91a92b skyeye: Disable MSVC warning C4200 2016-08-25 17:38:17 +01:00
Lioncash
0e12fb6a56 basic_block: Move all variables behind a public interface 2016-08-25 16:14:37 +01:00
MerryMage
7d181f46ce fuzz_arm: Print more than one IR basic block on failure 2016-08-25 13:00:46 +01:00
MerryMage
8d1b9f32ca Standardize indentation of switch statments 2016-08-23 12:19:27 +01:00
Lioncash
1bedd3bd7f CMakeLists: Clean up
Moves functions out of the main CMakeLists file into module files that
can just be included whenever necessary. This also uses the CMake
provided variables for enforcing compiler requirements.
2016-08-22 15:55:39 +01:00
MerryMage
74246cc3bf tests/fuzz_arm: Randomize rounding mode in initial_fpscr 2016-08-22 15:54:22 +01:00
MerryMage
f014f3b7d4 tests/fuzz_arm: Update FPSCR in InterpreterFallback 2016-08-22 15:54:21 +01:00
MerryMage
7a8dd9532d skyeye: Read-after-write in SMLA
In the case when RD === RN, RD was updated before AddOverflow was called
to check for an overflow, resulting in an incorrect state of the Q flag.

This is reapplying a patch from f12578b9ab
that was lost during the 20e253ece2 update
2016-08-22 15:54:17 +01:00
MerryMage
20e253ece2 tests/skyeye_interpreter: Update Skyeye (22-08-1016)
Matches the version of Skyeye in citra commit
7b4dcacbb2006de6483e982b21956a8f3098aa1d
2016-08-22 14:07:54 +01:00
Tillmann Karras
dad7724b86 TranlateArm: implement remaining multiplies
SMLALxy, SMLAxy, SMULxy SMLAWy, SMULWy, SMLAD, SMLALD, SMLSD, SMLSLD,
SMUAD, SMUSD
2016-08-19 01:08:38 +01:00
Tillmann Karras
f12578b9ab skyeye: fix read-after-write conflicts 2016-08-19 01:08:29 +01:00
MerryMage
4acc481463 translate_arm/load_store: Handle unpredictable instructions
This necessated handling literal versions of the instructions separately
as they had different requirements. The rationale for detecting
unpredictable instructions is because:

a. they are unlikely to be outputted by a well-behaved compiler
b. their behaviour may change between different processors

I would rather unpredictable instructions fail loudly than silently do
approximately the right thing.
2016-08-19 00:59:02 +01:00
Lioncash
841098a0bc ir: separate components out a little more 2016-08-17 20:46:21 +01:00
bunnei
30f3d869cc TranslateArm: Implement VPUSH and VPOP. 2016-08-13 19:37:03 +01:00
bunnei
8e68e6fdd9 TranslateArm: Implement QADD16/QSUB16/UQADD16/UQSUB16. 2016-08-12 19:00:44 +01:00
bunnei
4b09c0d032 TranslateArm: Implement QADD8 and UQADD8. 2016-08-12 19:00:44 +01:00
bunnei
127fbe99cb TranslateArm: Implement QSUB8. 2016-08-12 19:00:44 +01:00
bunnei
86fe29c6d2 TranslateArm: Implement UQSUB8. 2016-08-12 19:00:44 +01:00
MerryMage
b4c586d5ef TranslateArm: VSTR: Correct behaviour in big-endian mode 2016-08-10 16:43:37 +01:00
bunnei
8e8db6e137 TranslateArm: Implement VSTR. 2016-08-10 15:01:23 +01:00
MerryMage
df39308e03 TranslateArm: Implement CLREX, LDREX, LDREXB, LDREXD, LDREXH, STREX, STREXB, STREXD, STREXH, SWP, SWPB 2016-08-09 22:57:20 +01:00
MerryMage
b3bb1d5048 Tests: Tidy up ARM fuzz tests 2016-08-07 21:55:38 +01:00
MerryMage
4dcd1d1859 Arm: BLX is UNPREDICTABLE when Rm is PC 2016-08-07 20:50:33 +01:00
MerryMage
1af5bef32c TranslateArm: Implement BLX (imm), BLX (reg) and BXJ 2016-08-07 20:40:31 +01:00
MerryMage
3a465ba4a8 VFP: Implement VLDR 2016-08-07 19:59:35 +01:00
MerryMage
a2c2db277b VFP: Implement VMOV (all variants) 2016-08-07 19:25:12 +01:00
Tillmann Karras
55204a80d0 Implement SMMLA, SMMLS, SMMUL 2016-08-06 21:17:11 +01:00
Tillmann Karras
81d9d4b012 Add Subv's sign/zero extension tests 2016-08-06 21:17:11 +01:00
Tillmann Karras
a281fcc744 Fix printf 2016-08-06 21:17:11 +01:00
MerryMage
9ab7626374 Tests/VFP: Add tests for VADD.F32 2016-08-06 20:03:15 +01:00
MerryMage
4b31ea25a7 VFP: Implement VADD.{F32,F64} 2016-08-06 20:03:15 +01:00
bunnei
a5e2116e12 fuzz_arm: Log write records on failure. 2016-08-05 20:04:57 -04:00
MerryMage
640ce48baa VFP: Implement {Get,Set}ExtendedRegister{32,64} 2016-08-05 19:06:10 +01:00
MerryMage
6f6f60c61b tests/FuzzArm: Only call raise(SIGTRAP) when __unix__ is defined 2016-08-05 16:04:16 +01:00
Tillmann Karras
eb2e6e8bea Implement some multiplies 2016-08-05 02:09:54 +01:00
Tillmann Karras
a97668ead4 Simplify ARM fuzz tests 2016-08-05 02:09:30 +01:00
Tillmann Karras
023643b4fa Disable load/store tests for now
I don't feel like debugging that right now.
2016-08-05 02:09:27 +01:00
Tillmann Karras
ab383b4be5 Break tests by fixing them 2016-08-05 02:08:41 +01:00
Tillmann Karras
af27ef8d6c Optionally disassemble x86_64 code using LLVM 2016-08-05 02:08:41 +01:00
Tillmann Karras
dacaeadb6a Raise SIGTRAP on non-Windows 2016-08-03 00:44:08 +01:00
Tillmann Karras
61eddbd1fa Fix Linux build 2016-08-03 00:44:08 +01:00
MerryMage
64c17a2489 tests/FuzzArm: Print out IR upon failure 2016-08-02 13:48:06 +01:00
MerryMage
93af160c97 arm_types: Add FPSCR to Arm::LocationDescriptor and make Arm::LocationDescriptor have a FauxO-like interface 2016-08-02 11:54:02 +01:00
MerryMage
5fbfc6c155 Implement some simple IR optimizations (get/set eliminiation and DCE) 2016-07-21 21:48:45 +01:00
MerryMage
90d317b868 Implement memory endianness. Implement Thumb SETEND instruction. 2016-07-20 15:34:17 +01:00
Merry
95316b8443 Merged in Subv/dynarmic/arm_mem_tests (pull request #4)
Added some fuzz tests for most cases of ARM Load/Store instructions
2016-07-20 10:19:55 +01:00
MerryMage
95588d3faa Fix Thumb BLX (imm), BL (imm) for negative immediates 2016-07-18 22:48:23 +01:00
MerryMage
3f11a149d7 Implement Thumb Instructions: BLX (imm), BL (imm) 2016-07-18 22:18:58 +01:00
Subv
fce8f75077 Added a dummy (always fail) ARM test about Load/Store instructions that write to the PC. 2016-07-18 16:13:33 -05:00
Subv
426ffc9971 Added ARM fuzz tests for LDRD/LDR/LDRT/LDRB/LDRBT/LDRH and STRD/STR/STRT/STRB/STRBT/STRH.
These tests do not test the behavior of writing to the PC.
2016-07-18 16:13:02 -05:00
Subv
c330d9e0e3 Increase the chance of generating instructions without conditions in the REV/REVSH/REV16 tests. 2016-07-18 16:10:35 -05:00
MerryMage
2363759c62 Implement thumb STM, LDM. Fix thumb POP implementation for P=1. 2016-07-18 20:05:35 +01:00
MerryMage
dfef65d98f Implement thumb POP instruction 2016-07-18 17:37:48 +01:00
MerryMage
f7e3d7b8d2 Implement Thumb PUSH instruction 2016-07-18 15:11:16 +01:00
MerryMage
c18a3eeab4 Better MSVC support
* Avoiding use of templated variables.
* Now compling on MSVC with /WX (warnings as errors).
* Fixed all MSVC warnings.
* Fixed MSVC source_groups.
2016-07-18 10:38:22 +01:00
Subv
0cdf5fe751 Implemented ARM REV and REVSH instructions, with tests. 2016-07-17 14:45:42 -05:00
MerryMage
866dce0f23 tests/Thumb: Add revsh (thumb) test 2016-07-16 19:22:57 +01:00
MerryMage
22b1bd7cc7 tests/Skyeye: Fix thumb REVSH translation 2016-07-16 19:22:09 +01:00
MerryMage
4b1c27e64f Implement arm_ADC_imm 2016-07-14 20:02:41 +01:00
MerryMage
181f78f36e Common: Remove src/common/logging/log.* 2016-07-14 14:55:08 +01:00
MerryMage
07eaf100ba Reorganise src/frontend: Add subdirectories disassembler and translate 2016-07-14 14:39:43 +01:00
MerryMage
672ffb93d0 frontend/translator: Skeleton for Arm translator 2016-07-14 13:28:20 +01:00
MerryMage
8449deb0bc MSVC support 2016-07-12 13:28:09 +01:00
MerryMage
60455f9bbc tests/fuzz_thumb: Fuzz instructions that may change the PC 2016-07-12 10:58:57 +01:00
MerryMage
65d27f3486 tests: Add some Arm tests 2016-07-12 09:12:56 +01:00
MerryMage
1410221b47 Implement thumb1_STR_reg, thumb1_STRH_reg, thumb1_STRB_reg 2016-07-11 23:11:05 +01:00
MerryMage
e7922e4fef Implement thumb1_LDR_literal, thumb1_LDR_imm_t1 2016-07-11 22:43:53 +01:00
MerryMage
d92a771e3c tests/fuzz_thumb: Implement verification of memory writes 2016-07-10 13:29:15 +08:00
MerryMage
8920ce79b9 Implement thumb_CMP_reg_t2 2016-07-10 12:23:16 +08:00