Commit graph

36 commits

Author SHA1 Message Date
MerryMage
ad428cbd7a callback: Properly handle calls with return pointers and simplify interface 2020-04-22 20:46:13 +01:00
MerryMage
68f46c8334 backend_x64: Use a reference to BlockOfCode instead of a pointer 2020-04-22 20:46:13 +01:00
MerryMage
d7044bc751 assert: Use fmt in ASSERT_MSG 2020-04-22 20:46:12 +01:00
MerryMage
52268298a8 a64_emit_x64: Perform RSB predictions 2020-04-22 20:46:12 +01:00
MerryMage
54de64f5bf a64_emit_x64: bug: x64 sign-extends 32-bit immediates 2020-04-22 20:46:12 +01:00
MerryMage
b513b2ef05 IR: Implement IR instructions A64{Get,Set}S 2020-04-22 20:44:38 +01:00
MerryMage
16fa2cd8f6 a64_emit_x64: Use xword from Xbyak::util 2020-04-22 20:44:38 +01:00
Lioncash
67443efb62 General: Convert multiple namespace specifiers to nested namespace specifiers where applicable
Makes namespacing a little less noisy
2020-04-22 20:44:38 +01:00
MerryMage
da3e9a5704 a64_emit_x64: bug: EmitA64WriteMemory128 should write not read 2020-04-22 20:44:37 +01:00
MerryMage
f698848e26 IR: Add IR instructions A64Memory{Read,Write}128
Add the Windows ABI implementation
2020-04-22 20:44:37 +01:00
MerryMage
e1df7ae621 IR: Add IR instructions A64Memory{Read,Write}128
This implementation only works on macOS and Linux.
2020-04-22 20:44:37 +01:00
Lioncash
8ee854232c General: Default constructors and destructors where applicable 2020-04-22 20:44:37 +01:00
MerryMage
db30e02ac8 emit_x64: Extract BlockRangeInformation, remove template parameter 2020-04-22 20:44:36 +01:00
MerryMage
a63fc6c89b A64: Implement ADD (vector, vector) 2020-04-22 20:42:46 +01:00
MerryMage
19da68568e A64/translate/branch: bug: Read-after-write error in BLR 2020-04-22 20:42:45 +01:00
MerryMage
cdbc8d07a5 A64: Implement MOVN, MOVZ, MOVK 2020-04-22 20:42:45 +01:00
MerryMage
c6a091d874 A64: Optimization: Merge interpret blocks 2020-04-22 20:42:45 +01:00
MerryMage
996ffd5488 a64_emit_x64: bug: A64CallSupervisor trampled callee-save registers 2020-04-22 20:42:45 +01:00
MerryMage
e4615a4562 emit_x64: bug: OP m/r64, imm32 form instructions sign-extend their immediate on x64 2020-04-22 20:42:45 +01:00
MerryMage
0992987c98 A64: Add ExceptionRaised IR instruction
The purpose of this instruction is to raise exceptions when certain decode-time
issues happen, instead of asserting at translate time. This allows us to
use the translator for code analysis without worrying about unnecessary asserts,
but also provides flexibility for the library user to perform custom behaviour
when one of these states are raised.
2020-04-22 20:42:45 +01:00
MerryMage
aa74a8130b Misc. fixups of MSVC build 2020-04-22 20:42:45 +01:00
MerryMage
243f06c613 A64: Implement LDP, STP 2020-04-22 20:42:45 +01:00
MerryMage
25411da838 A32: Implement load stores (immediate) 2020-04-22 20:42:45 +01:00
MerryMage
10c60dda97 a64_emit_x64: Don't use far code for now 2020-04-22 20:42:45 +01:00
MerryMage
593a569b53 EmitA64SetW: bug: should zero extend to entire 64-bit register 2020-04-22 20:42:45 +01:00
MerryMage
6bd9f02911 EmitA64SetNZCV: bug: to_store is scratch 2020-04-22 20:42:45 +01:00
MerryMage
68391b0a05 A64: Implement SVC 2020-04-22 20:42:45 +01:00
MerryMage
e5ace37560 a64_emit_x64: Call interpreter 2020-04-22 20:42:45 +01:00
MerryMage
cb481a3a48 A64: Implement compare and branch 2020-04-22 20:42:45 +01:00
MerryMage
e8bcf72ee5 A64: PSTATE access and tests 2020-04-22 20:42:45 +01:00
MerryMage
23f3afe0b3 A64: Implement branch (register) 2020-04-22 20:42:45 +01:00
MerryMage
86d1095df7 A64: Implement branch 2020-04-22 20:42:45 +01:00
MerryMage
5a1d88c5dc A64: Implement pcrel 2020-04-22 20:42:45 +01:00
MerryMage
c09e69bb97 A64: Implement addsub instructions 2020-04-22 20:42:44 +01:00
MerryMage
d1cef6ffb0 A64: Implement ADD_shifted 2020-04-22 20:42:44 +01:00
MerryMage
d1eb757f93 A64: Backend framework 2020-04-22 20:42:44 +01:00