A64: Implement pcrel
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parent
c09e69bb97
commit
5a1d88c5dc
6 changed files with 43 additions and 6 deletions
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@ -59,6 +59,7 @@ add_library(dynarmic
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frontend/A64/location_descriptor.cpp
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frontend/A64/location_descriptor.h
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frontend/A64/translate/impl/data_processing_addsub.cpp
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frontend/A64/translate/impl/data_processing_pcrel.cpp
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frontend/A64/translate/impl/impl.cpp
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frontend/A64/translate/impl/impl.h
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frontend/A64/translate/translate.cpp
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@ -173,8 +173,8 @@ void A64EmitX64::EmitA64SetX(A64EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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A64::Reg reg = inst->GetArg(0).GetA64RegRef();
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auto addr = qword[r15 + offsetof(A64JitState, reg) + sizeof(u64) * static_cast<size_t>(reg)];
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if (args[1].IsImmediate()) {
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code->mov(addr, args[1].GetImmediateU64());
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if (args[1].FitsInImmediateU32()) {
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code->mov(addr, args[1].GetImmediateU32());
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} else if (args[1].IsInXmm()) {
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Xbyak::Xmm to_store = ctx.reg_alloc.UseXmm(args[1]);
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code->movq(addr, to_store);
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@ -187,8 +187,8 @@ void A64EmitX64::EmitA64SetX(A64EmitContext& ctx, IR::Inst* inst) {
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void A64EmitX64::EmitA64SetSP(A64EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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auto addr = qword[r15 + offsetof(A64JitState, sp)];
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if (args[0].IsImmediate()) {
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code->mov(addr, args[0].GetImmediateU64());
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if (args[0].FitsInImmediateU32()) {
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code->mov(addr, args[0].GetImmediateU32());
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} else if (args[0].IsInXmm()) {
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Xbyak::Xmm to_store = ctx.reg_alloc.UseXmm(args[0]);
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code->movq(addr, to_store);
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@ -100,6 +100,13 @@ bool Argument::IsImmediate() const {
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return value.IsImmediate();
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}
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bool Argument::FitsInImmediateU32() const {
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if (!IsImmediate())
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return false;
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u64 imm = ImmediateToU64(value);
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return imm < 0x100000000;
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}
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bool Argument::GetImmediateU1() const {
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return value.GetU1();
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}
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@ -56,6 +56,8 @@ public:
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IR::Type GetType() const;
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bool IsImmediate() const;
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bool FitsInImmediateU32() const;
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bool GetImmediateU1() const;
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u8 GetImmediateU8() const;
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u16 GetImmediateU16() const;
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@ -30,8 +30,8 @@ std::vector<Matcher<V>> GetDecodeTable() {
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#define INST(fn, name, bitstring) Decoder::detail::detail<Matcher<V>>::GetMatcher(fn, name, bitstring)
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// Data processing - Immediate - PC relative addressing
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//INST(&V::ADR, "ADR", "0ii10000iiiiiiiiiiiiiiiiiiiddddd"),
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//INST(&V::ADRP, "ADRP", "1ii10000iiiiiiiiiiiiiiiiiiiddddd"),
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INST(&V::ADR, "ADR", "0ii10000iiiiiiiiiiiiiiiiiiiddddd"),
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INST(&V::ADRP, "ADRP", "1ii10000iiiiiiiiiiiiiiiiiiiddddd"),
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// Data processing - Immediate - Add/Sub
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INST(&V::ADD_imm, "ADD (immediate)", "z0010001ssiiiiiiiiiiiinnnnnddddd"),
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27
src/frontend/A64/translate/impl/data_processing_pcrel.cpp
Normal file
27
src/frontend/A64/translate/impl/data_processing_pcrel.cpp
Normal file
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@ -0,0 +1,27 @@
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/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "frontend/A64/translate/impl/impl.h"
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namespace Dynarmic {
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namespace A64 {
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bool TranslatorVisitor::ADR(Imm<2> immlo, Imm<19> immhi, Reg Rd) {
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u64 imm = concatenate(immhi, immlo).ZeroExtend<u64>();
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u64 base = ir.PC();
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X(64, Rd, ir.Imm64(base + imm));
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return true;
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}
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bool TranslatorVisitor::ADRP(Imm<2> immlo, Imm<19> immhi, Reg Rd) {
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u64 imm = concatenate(immhi, immlo).ZeroExtend<u64>() << 12;
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u64 base = ir.PC() & ~u64(0xFFF);
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X(64, Rd, ir.Imm64(base + imm));
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return true;
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}
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} // namespace A64
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} // namespace Dynarmic
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