Merry
|
1810bd6547
|
emit_arm64_packed: Implement PackedSubU16
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
fb6ac45259
|
emit_arm64_packed: Implement PackedSubS8
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
2076495d9e
|
emit_arm64_packed: Implement PackedSubU8
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
0b53290dd7
|
emit_arm64_a32: Implement A32GetCpsr
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
8a0359ec52
|
emit_arm64_a32: Implement barriers
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
a7f675864b
|
emit_arm64_packed: Implement all saturated packed operations
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
7aeaa46a0b
|
emit_arm64_packed: Implement PackedAddS16
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
66858c99b8
|
emit_arm64_packed: Implement PackedAddU16
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
179137be5a
|
emit_arm64_saturation: Implement UnsignedSaturation
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
02d3a5a242
|
emit_arm64_a32: Implement A32OrQFlag
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
a50eb6cf34
|
emit_arm64_packed: Implement PackedAddS8
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
619adce84f
|
emit_arm64_packed: Implement PackedAddU8
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
8f1f1c8f0b
|
emit_arm64_packed: Implement {Get,Set}GEFlags
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
2dce8ea5a8
|
emit_arm64_data_processing: Fix MostSignificantWord
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
9b09acee47
|
oaknut: Implement arranged accessors from DReg and QReg
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
3d420e34ae
|
emit_arm64_data_processing: Fix LogicalShiftRight32 for immediate shift = 32
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
78e266a869
|
test_generator: Increase iterations
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
a5f3164c38
|
backend/arm64/reg_alloc: Handle immediates in DefineAsExisting
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
277f7a76e9
|
arm64: Stub PushRSB
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
ef137dd8b9
|
emit_arm64_data_processing: Correct ArithmeticShiftRight32
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
70d9137859
|
backend/arm64/reg_alloc: Handle immediates in PrepareForCall
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
187f89951d
|
emit_arm64_data_processing: Implement Mul
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
bf55920ce9
|
backend/arm64/reg_alloc: Support multiple locks on a location
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
6bcfaee1f4
|
emit_arm64_data_processing: Implement LogicalShiftRight32
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
7840caef6e
|
emit_arm64_data_processing: Fix bug in EmitBitOp
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
02cfbb8b0b
|
backend/arm64/reg_alloc: Generate immediates when required
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
bdb41be0c5
|
emit_arm64_data_processing: Implement ZeroExtend
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
7ed217ff77
|
emit_arm64_data_processing: Implement SignExtend
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
777d9a1045
|
emit_arm64_data_processing: Implement ByteReverse
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
156bcecb02
|
emit_arm64_data_processing: Implement ArithmeticShiftRight32
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
a6e761daa9
|
emit_arm64_a32: Fix CheckBit
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
95ae21bd41
|
backend/arm64: Fix Sub
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
46f4063952
|
backend/arm64: Implement Not
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
6ad7758165
|
backend/arm64: Implement AndNot
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
fcd2bd600e
|
backend/arm64: Implement Or
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
4cff0d9977
|
backend/arm64: Implement Eor
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
4e3fd70f6e
|
backend/arm64: Implement And64
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
32e54481e7
|
github: Test arm64 backend
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
129af4f6b4
|
backend/arm64: Implement A32SetCpsrNZ
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
7056913b6b
|
backend/arm64: Implement And32
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
f97b520221
|
backend/arm64: Implement RotateRight32
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
6885f9a6d8
|
backend/arm64: Invalidation fixes
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
eaf87ec1e4
|
backend/arm64: Simple implementation of memory read/write
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
77634509b5
|
arm64/abi: Deduplicate register code
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
f3bf27c816
|
backend/arm64: Implement Devirtualize
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
6239eb5eb6
|
oaknut: dx
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
9a35946aec
|
oaknut: align
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
2e72d69268
|
backend/arm64: ABI
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
e1ad7ef482
|
oaknut: Add dw
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
f74a5f262f
|
backend/arm64/reg_alloc: RAReg is non-copyable and non-moveable
|
2022-10-18 15:04:30 +01:00 |
|