backend/arm64/reg_alloc: Support multiple locks on a location
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6bcfaee1f4
commit
bf55920ce9
3 changed files with 53 additions and 35 deletions
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@ -152,6 +152,8 @@ EmittedBlockInfo EmitArm64(oaknut::CodeGenerator& code, IR::Block block, const E
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ASSERT_FALSE("Invalid opcode: {}", inst->GetOpcode());
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break;
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}
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reg_alloc.AssertAllUnlocked();
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}
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reg_alloc.AssertNoMoreUses();
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@ -91,15 +91,16 @@ bool HostLocInfo::Contains(const IR::Inst* value) const {
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}
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void HostLocInfo::SetupScratchLocation() {
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ASSERT(values.empty());
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locked = true;
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ASSERT(IsCompletelyEmpty());
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locked++;
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realized = true;
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}
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void HostLocInfo::SetupLocation(const IR::Inst* value) {
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ASSERT(IsCompletelyEmpty());
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values.clear();
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values.emplace_back(value);
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locked = true;
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locked++;
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realized = true;
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uses_this_inst = 0;
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accumulated_uses = 0;
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@ -123,10 +124,9 @@ void HostLocInfo::UpdateUses() {
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uses_this_inst = 0;
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if (accumulated_uses == expected_uses) {
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*this = {};
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} else {
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realized = false;
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locked = false;
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values.clear();
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accumulated_uses = 0;
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expected_uses = 0;
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}
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}
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@ -187,7 +187,16 @@ void RegAlloc::DefineAsRegister(IR::Inst* inst, oaknut::Reg reg) {
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ASSERT(!ValueLocation(inst));
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auto& info = reg.is_vector() ? fprs[reg.index()] : gprs[reg.index()];
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ASSERT(info.IsCompletelyEmpty());
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info.SetupLocation(inst);
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info.values.emplace_back(inst);
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info.expected_uses += inst->UseCount();
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}
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void RegAlloc::AssertAllUnlocked() const {
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const auto is_unlocked = [](const auto& i) { return !i.locked && !i.realized; };
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ASSERT(std::all_of(gprs.begin(), gprs.end(), is_unlocked));
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ASSERT(std::all_of(fprs.begin(), fprs.end(), is_unlocked));
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ASSERT(is_unlocked(flags));
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ASSERT(std::all_of(spills.begin(), spills.end(), is_unlocked));
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}
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void RegAlloc::AssertNoMoreUses() const {
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@ -329,12 +338,6 @@ template int RegAlloc::RealizeWriteImpl<HostLoc::Kind::Gpr>(const IR::Inst* valu
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template int RegAlloc::RealizeWriteImpl<HostLoc::Kind::Fpr>(const IR::Inst* value);
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template int RegAlloc::RealizeWriteImpl<HostLoc::Kind::Flags>(const IR::Inst* value);
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void RegAlloc::Unlock(HostLoc host_loc) {
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HostLocInfo& info = ValueInfo(host_loc);
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ASSERT(info.locked && info.realized);
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info.UpdateUses();
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}
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int RegAlloc::AllocateRegister(const std::array<HostLocInfo, 32>& regs, const std::vector<int>& order) const {
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const auto empty = std::find_if(order.begin(), order.end(), [&](int i) { return regs[i].IsImmediatelyAllocatable(); });
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if (empty != order.end()) {
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@ -392,6 +395,8 @@ void RegAlloc::ReadWriteFlags(Argument& read, IR::Inst* write) {
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ASSERT_FALSE("Invalid current location for flags");
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}
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flags.SetupLocation(write);
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flags.locked--;
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flags.realized = false;
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}
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void RegAlloc::SpillFlags() {
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@ -102,8 +102,7 @@ public:
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private:
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friend class RegAlloc;
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explicit RAReg(RegAlloc& reg_alloc, bool write, const IR::Value& value)
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: reg_alloc{reg_alloc}, write{write}, value{value} {}
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explicit RAReg(RegAlloc& reg_alloc, bool write, const IR::Value& value);
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RAReg(const RAReg&) = delete;
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RAReg& operator=(const RAReg&) = delete;
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@ -120,7 +119,7 @@ private:
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struct HostLocInfo {
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std::vector<const IR::Inst*> values;
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bool locked = false;
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size_t locked = 0;
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bool realized = false;
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size_t uses_this_inst = 0;
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size_t accumulated_uses = 0;
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@ -145,16 +144,16 @@ public:
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ArgumentInfo GetArgumentInfo(IR::Inst* inst);
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bool IsValueLive(IR::Inst* inst) const;
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auto ReadX(Argument& arg) { return RAReg<oaknut::XReg>{*this, false, PreReadImpl(arg.value)}; }
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auto ReadW(Argument& arg) { return RAReg<oaknut::WReg>{*this, false, PreReadImpl(arg.value)}; }
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auto ReadX(Argument& arg) { return RAReg<oaknut::XReg>{*this, false, arg.value}; }
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auto ReadW(Argument& arg) { return RAReg<oaknut::WReg>{*this, false, arg.value}; }
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auto ReadQ(Argument& arg) { return RAReg<oaknut::QReg>{*this, false, PreReadImpl(arg.value)}; }
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auto ReadD(Argument& arg) { return RAReg<oaknut::DReg>{*this, false, PreReadImpl(arg.value)}; }
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auto ReadS(Argument& arg) { return RAReg<oaknut::SReg>{*this, false, PreReadImpl(arg.value)}; }
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auto ReadH(Argument& arg) { return RAReg<oaknut::HReg>{*this, false, PreReadImpl(arg.value)}; }
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auto ReadB(Argument& arg) { return RAReg<oaknut::BReg>{*this, false, PreReadImpl(arg.value)}; }
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auto ReadQ(Argument& arg) { return RAReg<oaknut::QReg>{*this, false, arg.value}; }
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auto ReadD(Argument& arg) { return RAReg<oaknut::DReg>{*this, false, arg.value}; }
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auto ReadS(Argument& arg) { return RAReg<oaknut::SReg>{*this, false, arg.value}; }
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auto ReadH(Argument& arg) { return RAReg<oaknut::HReg>{*this, false, arg.value}; }
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auto ReadB(Argument& arg) { return RAReg<oaknut::BReg>{*this, false, arg.value}; }
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auto ReadFlags(Argument& arg) { return RAReg<FlagsTag>{*this, false, PreReadImpl(arg.value)}; }
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auto ReadFlags(Argument& arg) { return RAReg<FlagsTag>{*this, false, arg.value}; }
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template<size_t size>
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auto ReadReg(Argument& arg) {
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@ -242,6 +241,7 @@ public:
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(rs.Realize(), ...);
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}
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void AssertAllUnlocked() const;
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void AssertNoMoreUses() const;
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private:
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@ -249,20 +249,12 @@ private:
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template<typename>
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friend struct RAReg;
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const IR::Value& PreReadImpl(const IR::Value& value) {
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if (!value.IsImmediate()) {
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ValueInfo(value.GetInst()).locked = true;
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}
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return value;
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}
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template<HostLoc::Kind kind>
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int GenerateImmediate(const IR::Value& value);
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template<HostLoc::Kind kind>
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int RealizeReadImpl(const IR::Value& value);
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template<HostLoc::Kind kind>
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int RealizeWriteImpl(const IR::Inst* value);
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void Unlock(HostLoc host_loc);
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int AllocateRegister(const std::array<HostLocInfo, 32>& regs, const std::vector<int>& order) const;
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void SpillGpr(int index);
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@ -287,10 +279,29 @@ private:
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mutable std::mt19937 rand_gen;
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};
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template<typename T>
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RAReg<T>::RAReg(RegAlloc& reg_alloc, bool write, const IR::Value& value)
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: reg_alloc{reg_alloc}, write{write}, value{value} {
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if (!write && !value.IsImmediate()) {
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reg_alloc.ValueInfo(value.GetInst()).locked++;
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}
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}
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template<typename T>
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RAReg<T>::~RAReg() {
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if (reg) {
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reg_alloc.Unlock(HostLoc{kind, reg->index()});
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if (value.IsImmediate()) {
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if (reg) {
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// Immediate in scratch register
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HostLocInfo& info = reg_alloc.ValueInfo(HostLoc{kind, reg->index()});
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info.locked--;
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info.realized = false;
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}
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} else {
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HostLocInfo& info = reg_alloc.ValueInfo(value.GetInst());
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info.locked--;
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if (reg) {
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info.realized = false;
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}
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}
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}
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