Commit graph

3218 commits

Author SHA1 Message Date
Merry
73b48448cb emit_arm64_data_processing: Handle immediate carry in for shift instructions 2022-10-18 15:04:30 +01:00
Merry
db5db43fd4 emit_arm64_a32: A32SetCpsrNZC: Handle immediate 2022-10-18 15:04:30 +01:00
Merry
65a7d9be8d emit_arm64_a32: A32SetCheckBit: Handle immediate 2022-10-18 15:04:30 +01:00
Merry
49589168c9 oaknut: MOV: Fix MOVN case 2022-10-18 15:04:30 +01:00
Merry
8649345886 emit_arm64_cryptography: Implement CRC 2022-10-18 15:04:30 +01:00
Merry
f84e489969 test_generator: Expand testing to thumb32 2022-10-18 15:04:30 +01:00
Merry
6d6cbe2e66 emit_arm64_saturation: Fix UnsignedSaturation for < 0 2022-10-18 15:04:30 +01:00
Merry
b059384bc0 emit_arm64_saturation: Implement SignedSaturatedSubWithFlag32 2022-10-18 15:04:30 +01:00
Merry
090e79add2 emit_arm64_data_processing: Implement CountLeadingZeros 2022-10-18 15:04:30 +01:00
Merry
e921c397ac emit_arm64_data_processing: Fix BitImms for exceptional immediates 2022-10-18 15:04:30 +01:00
Merry
f642f49b93 emit_arm64_data_processing: Implement RotateRightExtended 2022-10-18 15:04:30 +01:00
Merry
22d87bcbe5 emit_arm64_a32: Implement A32SetGEFlagsCompressed 2022-10-18 15:04:30 +01:00
Merry
735f5b787a emit_arm64_a32: Fix A32SetCpsrNZC for immediate carry 2022-10-18 15:04:30 +01:00
Merry
33b3376fb1 emit_arm64_a32: Implement A32SetCpsrNZCVRaw, A32SetCpsrNZCVQ 2022-10-18 15:04:30 +01:00
Merry
11b665c027 emit_arm64_a32: Implement A32SetCpsr (temporary implementation) 2022-10-18 15:04:30 +01:00
Merry
950400fb6b arm64/a32_jitstate: Adjust structure 2022-10-18 15:04:30 +01:00
Merry
726e116e28 emit_arm64_saturation: Implement SignedSaturatedAddWithFlag32 2022-10-18 15:04:30 +01:00
Merry
babfb7d7b8 IR/saturation: Revamp saturated add/sub IR instructions 2022-10-18 15:04:30 +01:00
Merry
2d0bf7ca9b emit_arm64_data_processing: Implement overflow output for Add 2022-10-18 15:04:30 +01:00
Merry
adb18fd0a7 emit_arm64_data_processing: Implement LogicalShift{Left,Right}64 2022-10-18 15:04:30 +01:00
Merry
0692f1d40e emit_arm64_data_processing: EmitAddSub: Handle zero immediate w/ flag output 2022-10-18 15:04:30 +01:00
Merry
cd537dc711 IR: Rename PackedAbsDiffSumS8 to PackedAbsDiffSumU8 2022-10-18 15:04:30 +01:00
Merry
ee2bc92993 emit_arm64_saturation: Implement SignedSaturation 2022-10-18 15:04:30 +01:00
Merry
e73c390927 emit_arm64_packed: Fix signed packed add sub 2022-10-18 15:04:30 +01:00
Merry
c8b3be5512 emit_arm64_data_processing: Implement Div 2022-10-18 15:04:30 +01:00
Merry
a320a333e1 emit_arm64_packed: Implement PackedAbsDiffSumS8 2022-10-18 15:04:30 +01:00
Merry
0ebbc4a9c5 emit_arm64_packed: Implement PackedSelect 2022-10-18 15:04:30 +01:00
Merry
ac7908164a emit_arm64_packed: Implement packed halving operations 2022-10-18 15:04:30 +01:00
Merry
d1909c5efb emit_arm64_packed: Implement halving add sub exchange 2022-10-18 15:04:30 +01:00
Merry
ff34f4c6ae emit_arm64_data_processing: Fix flag reading in AddSub
Also improve codegen for ZR case.
2022-10-18 15:04:30 +01:00
Merry
aaa0773695 emit_arm64_data_processing: Add carry output to MostSignificantWord 2022-10-18 15:04:30 +01:00
Merry
5c54c7d968 emit_arm64_packed: Implement packed add sub exchange 2022-10-18 15:04:30 +01:00
Merry
0bd7601844 emit_arm64_packed: Implement PackedSubU16 2022-10-18 15:04:30 +01:00
Merry
1810bd6547 emit_arm64_packed: Implement PackedSubU16 2022-10-18 15:04:30 +01:00
Merry
fb6ac45259 emit_arm64_packed: Implement PackedSubS8 2022-10-18 15:04:30 +01:00
Merry
2076495d9e emit_arm64_packed: Implement PackedSubU8 2022-10-18 15:04:30 +01:00
Merry
0b53290dd7 emit_arm64_a32: Implement A32GetCpsr 2022-10-18 15:04:30 +01:00
Merry
8a0359ec52 emit_arm64_a32: Implement barriers 2022-10-18 15:04:30 +01:00
Merry
a7f675864b emit_arm64_packed: Implement all saturated packed operations 2022-10-18 15:04:30 +01:00
Merry
7aeaa46a0b emit_arm64_packed: Implement PackedAddS16 2022-10-18 15:04:30 +01:00
Merry
66858c99b8 emit_arm64_packed: Implement PackedAddU16 2022-10-18 15:04:30 +01:00
Merry
179137be5a emit_arm64_saturation: Implement UnsignedSaturation 2022-10-18 15:04:30 +01:00
Merry
02d3a5a242 emit_arm64_a32: Implement A32OrQFlag 2022-10-18 15:04:30 +01:00
Merry
a50eb6cf34 emit_arm64_packed: Implement PackedAddS8 2022-10-18 15:04:30 +01:00
Merry
619adce84f emit_arm64_packed: Implement PackedAddU8 2022-10-18 15:04:30 +01:00
Merry
8f1f1c8f0b emit_arm64_packed: Implement {Get,Set}GEFlags 2022-10-18 15:04:30 +01:00
Merry
2dce8ea5a8 emit_arm64_data_processing: Fix MostSignificantWord 2022-10-18 15:04:30 +01:00
Merry
9b09acee47 oaknut: Implement arranged accessors from DReg and QReg 2022-10-18 15:04:30 +01:00
Merry
3d420e34ae emit_arm64_data_processing: Fix LogicalShiftRight32 for immediate shift = 32 2022-10-18 15:04:30 +01:00
Merry
78e266a869 test_generator: Increase iterations 2022-10-18 15:04:30 +01:00