Lioncash
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5601aa554e
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thumb32: Implement STRB/STRH/STR (register)
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2021-03-01 15:41:49 -05:00 |
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MerryMage
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2fbb79fdf2
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externals: Build vixl
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2021-03-01 20:36:21 +00:00 |
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MerryMage
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1ca401619d
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Merge commit 'e64a00a7fcc1cfa7ac5f81626f85075997f9d8a3' as 'externals/vixl/vixl'
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2021-03-01 20:20:36 +00:00 |
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MerryMage
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170ab30b8e
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thumb32: Implement RSB (immediate)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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8d33de2dcc
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thumb32: Implement SUB (immediate, T3)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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8efb2a5b05
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thumb32: Implement CMP (immediate)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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78330e634f
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thumb32: Implement SBC (immediate)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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e6b925146b
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thumb32: Implement ADC (immediate)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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8f9e052c93
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thumb32: Implement ADD (imm, T3)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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30442ee1f4
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thumb32: Implement CMN (immediate)
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2021-02-28 21:49:14 +00:00 |
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merry
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421548ceef
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Merge pull request #581 from lioncash/8dot6
a64: Add v8.6 instruction encoding additions
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2021-02-27 21:54:08 +00:00 |
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Lioncash
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385f907463
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a64: Add v8.6 instruction encoding additions
Keeps the instruction listing up to date.
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2021-02-27 16:25:13 -05:00 |
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merry
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bf7d1a17ba
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Merge pull request #580 from lioncash/shift
thumb32: Implement ASR, LSL, LSR, and ROR register variants
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2021-02-26 19:07:12 +00:00 |
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Lioncash
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9d5505422f
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thumb32: Implement ADD/SUB (imm 2)
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2021-02-25 09:56:05 -05:00 |
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Lioncash
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68885fdb3c
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thumb32: Implement SBFX/UBFX
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2021-02-25 09:37:15 -05:00 |
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Lioncash
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7334914047
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thumb32: Implement BFC/BFI
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2021-02-25 09:27:05 -05:00 |
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Lioncash
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ba7cbe7cf6
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thumb32: Implement SSAT16/USAT16
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2021-02-25 09:13:46 -05:00 |
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Lioncash
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725d712c88
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thumb32: Simplify register shift implementations to common function
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2021-02-23 04:53:50 -05:00 |
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Lioncash
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a7a9ed69b7
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thumb32: Implement ROR (register)
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2021-02-23 04:52:29 -05:00 |
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Lioncash
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abf3548b2a
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thumb32: Implement ASR (register)
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2021-02-23 04:43:11 -05:00 |
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Lioncash
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e06d4bcbb2
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thumb32: Implement LSR (register)
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2021-02-23 04:40:43 -05:00 |
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Lioncash
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fdd379a36c
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thumb32: Implement LSL (register)
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2021-02-23 04:40:40 -05:00 |
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merry
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ac32175eff
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Merge pull request #579 from lioncash/bxj
thumb32: Implement BXJ
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2021-02-22 15:01:08 +00:00 |
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merry
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e753b223e2
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Merge pull request #578 from lioncash/hint
thumb32: Implement hint instructions
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2021-02-22 14:31:49 +00:00 |
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Lioncash
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89838c5ce4
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thumb32: Implement BXJ
We handle this as a regular BX call, given we don't support Jazelle.
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2021-02-22 07:45:21 -05:00 |
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Lioncash
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de8e977bb1
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thumb32: Implement SEVL
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2021-02-22 07:34:42 -05:00 |
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Lioncash
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a4c9ec645f
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thumb32: Implement SEV
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2021-02-22 07:34:42 -05:00 |
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Lioncash
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565a20b096
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thumb32: Implement WFI
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2021-02-22 07:34:42 -05:00 |
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Lioncash
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3dc33c1257
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thumb32: Implement WFE
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2021-02-22 07:34:42 -05:00 |
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Lioncash
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48fe7afe72
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thumb32: Implement YIELD
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2021-02-22 07:34:42 -05:00 |
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Lioncash
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a73ea9e111
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thumb32: Implement NOP
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2021-02-22 07:34:39 -05:00 |
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MerryMage
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29d7cbd899
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thumb32: Ensure CPSR.IT state is always up to date
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2021-02-22 00:27:16 +00:00 |
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MerryMage
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f5dd7122a2
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EmitFPVectorMulAdd: Correct optimization flag (Unsafe_UnfuseFMA -> Unsafe_InaccurateNaN)
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2021-02-21 21:30:20 +00:00 |
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merry
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75f4978da5
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Merge pull request #577 from lioncash/barrier
thumb32: Implement barrier instructions and CLREX
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2021-02-19 22:51:13 +00:00 |
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merry
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4b43dd33c6
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Merge pull request #576 from lioncash/pbi
thumb32: Implement MOVT/MOVW
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2021-02-19 22:48:43 +00:00 |
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Lioncash
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3890590b4f
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thumb32: Implement CLREX
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2021-02-19 00:02:57 -05:00 |
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Lioncash
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5543e4f9eb
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thumb32: Implement ISB
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2021-02-19 00:01:24 -05:00 |
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Lioncash
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085147b5a4
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thumb32: Implement DMB
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2021-02-18 23:59:34 -05:00 |
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Lioncash
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368a8630e0
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thumb32: Implement DSB
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2021-02-18 23:58:12 -05:00 |
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Lioncash
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5602db88f4
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thumb32: Implement MOVW
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2021-02-18 23:52:06 -05:00 |
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Lioncash
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d05c706ff4
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thumb32: Implement MOVT
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2021-02-18 23:52:03 -05:00 |
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MerryMage
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f568687bd9
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thumb32: Implement EOR (immediate)
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2021-02-18 20:51:13 +00:00 |
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MerryMage
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8fd7ec3989
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thumb32: Implement TEQ (immediate)
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2021-02-18 20:49:06 +00:00 |
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MerryMage
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efbc8cef53
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thumb32: Implement ORN (immediate)
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2021-02-18 20:48:55 +00:00 |
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MerryMage
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08f046036c
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thumb32: Implement MVN (immediate)
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2021-02-18 20:19:45 +00:00 |
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MerryMage
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cafa687684
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thumb32: Implement ORR (immediate)
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2021-02-18 01:28:03 +00:00 |
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MerryMage
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b2f0575fee
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thumb32: Implement MOV (immediate)
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2021-02-18 01:28:03 +00:00 |
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MerryMage
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3dcc882fbf
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thumb32: Implement BIC (immediate)
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2021-02-18 01:28:03 +00:00 |
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MerryMage
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6f3c5dc1d9
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thumb32: Implement AND (immediate)
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2021-02-18 01:28:03 +00:00 |
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MerryMage
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5bf676d93e
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thumb32: Implement TST (immediate)
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2021-02-18 01:05:45 +00:00 |
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