thumb32: Implement ORR (immediate)

This commit is contained in:
MerryMage 2021-02-18 01:23:09 +00:00
parent b2f0575fee
commit cafa687684
3 changed files with 20 additions and 1 deletions

View file

@ -57,7 +57,7 @@ INST(thumb32_TST_imm, "TST (imm)", "11110v000001nnnn0vvv11
INST(thumb32_AND_imm, "AND (imm)", "11110v00000Snnnn0vvvddddvvvvvvvv")
INST(thumb32_BIC_imm, "BIC (imm)", "11110v00001Snnnn0vvvddddvvvvvvvv")
INST(thumb32_MOV_imm, "MOV (imm)", "11110v00010S11110vvvddddvvvvvvvv")
//INST(thumb32_ORR_imm, "ORR (imm)", "11110-00010-----0---------------")
INST(thumb32_ORR_imm, "ORR (imm)", "11110v00010Snnnn0vvvddddvvvvvvvv")
//INST(thumb32_MVN_imm, "MVN (imm)", "11110000011-11110---------------")
//INST(thumb32_ORN_imm, "ORN (imm)", "11110-00011-----0---------------")
//INST(thumb32_TEQ_imm, "TEQ (imm)", "11110-001001----0---1111--------")

View file

@ -73,4 +73,22 @@ bool ThumbTranslatorVisitor::thumb32_MOV_imm(Imm<1> i, bool S, Imm<3> imm3, Reg
return true;
}
bool ThumbTranslatorVisitor::thumb32_ORR_imm(Imm<1> i, bool S, Reg n, Imm<3> imm3, Reg d, Imm<8> imm8) {
ASSERT_MSG(n != Reg::PC, "Decode error");
if (d == Reg::PC) {
return UnpredictableInstruction();
}
const auto imm_carry = ThumbExpandImm_C(i, imm3, imm8, ir.GetCFlag());
const auto result = ir.Or(ir.GetRegister(n), ir.Imm32(imm_carry.imm32));
ir.SetRegister(d, result);
if (S) {
ir.SetNFlag(ir.MostSignificantBit(result));
ir.SetZFlag(ir.IsZero(result));
ir.SetCFlag(imm_carry.carry);
}
return true;
}
} // namespace Dynarmic::A32

View file

@ -153,6 +153,7 @@ struct ThumbTranslatorVisitor final {
bool thumb32_AND_imm(Imm<1> i, bool S, Reg n, Imm<3> imm3, Reg d, Imm<8> imm8);
bool thumb32_BIC_imm(Imm<1> i, bool S, Reg n, Imm<3> imm3, Reg d, Imm<8> imm8);
bool thumb32_MOV_imm(Imm<1> i, bool S, Imm<3> imm3, Reg d, Imm<8> imm8);
bool thumb32_ORR_imm(Imm<1> i, bool S, Reg n, Imm<3> imm3, Reg d, Imm<8> imm8);
// thumb32 miscellaneous control instructions
bool thumb32_UDF();