diff --git a/src/frontend/A32/decoder/thumb32.h b/src/frontend/A32/decoder/thumb32.h index 09da4857..ece127a9 100644 --- a/src/frontend/A32/decoder/thumb32.h +++ b/src/frontend/A32/decoder/thumb32.h @@ -245,7 +245,7 @@ std::optional>> DecodeThumb32(u32 INST(&V::thumb32_QASX, "QASX", "111110101010nnnn1111dddd0001mmmm"), INST(&V::thumb32_QSAX, "QSAX", "111110101110nnnn1111dddd0001mmmm"), INST(&V::thumb32_QSUB16, "QSUB16", "111110101101nnnn1111dddd0001mmmm"), - //INST(&V::thumb32_QADD8, "QADD8", "111110101000----1111----0001----"), + INST(&V::thumb32_QADD8, "QADD8", "111110101000nnnn1111dddd0001mmmm"), //INST(&V::thumb32_QSUB8, "QSUB8", "111110101100----1111----0001----"), //INST(&V::thumb32_SHADD16, "SHADD16", "111110101001----1111----0010----"), //INST(&V::thumb32_SHASX, "SHASX", "111110101010----1111----0010----"), @@ -265,7 +265,7 @@ std::optional>> DecodeThumb32(u32 INST(&V::thumb32_UQASX, "UQASX", "111110101010nnnn1111dddd0101mmmm"), INST(&V::thumb32_UQSAX, "UQSAX", "111110101110nnnn1111dddd0101mmmm"), INST(&V::thumb32_UQSUB16, "UQSUB16", "111110101101nnnn1111dddd0101mmmm"), - //INST(&V::thumb32_UQADD8, "UQADD8", "111110101000----1111----0101----"), + INST(&V::thumb32_UQADD8, "UQADD8", "111110101000nnnn1111dddd0101mmmm"), //INST(&V::thumb32_UQSUB8, "UQSUB8", "111110101100----1111----0101----"), //INST(&V::thumb32_UHADD16, "UHADD16", "111110101001----1111----0110----"), //INST(&V::thumb32_UHASX, "UHASX", "111110101010----1111----0110----"), diff --git a/src/frontend/A32/translate/impl/thumb32_parallel.cpp b/src/frontend/A32/translate/impl/thumb32_parallel.cpp index 26373fad..ff9f3858 100644 --- a/src/frontend/A32/translate/impl/thumb32_parallel.cpp +++ b/src/frontend/A32/translate/impl/thumb32_parallel.cpp @@ -182,6 +182,19 @@ bool ThumbTranslatorVisitor::thumb32_USUB16(Reg n, Reg d, Reg m) { return true; } +bool ThumbTranslatorVisitor::thumb32_QADD8(Reg n, Reg d, Reg m) { + if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto reg_m = ir.GetRegister(m); + const auto reg_n = ir.GetRegister(n); + const auto result = ir.PackedSaturatedAddS8(reg_n, reg_m); + + ir.SetRegister(d, result); + return true; +} + bool ThumbTranslatorVisitor::thumb32_QADD16(Reg n, Reg d, Reg m) { if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { return UnpredictableInstruction(); @@ -246,6 +259,19 @@ bool ThumbTranslatorVisitor::thumb32_QSUB16(Reg n, Reg d, Reg m) { return true; } +bool ThumbTranslatorVisitor::thumb32_UQADD8(Reg n, Reg d, Reg m) { + if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto reg_m = ir.GetRegister(m); + const auto reg_n = ir.GetRegister(n); + const auto result = ir.PackedSaturatedAddU8(reg_n, reg_m); + + ir.SetRegister(d, result); + return true; +} + bool ThumbTranslatorVisitor::thumb32_UQADD16(Reg n, Reg d, Reg m) { if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { return UnpredictableInstruction(); diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index 6ef23c0d..7011ff0b 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -142,10 +142,12 @@ struct ThumbTranslatorVisitor final { bool thumb32_USUB8(Reg n, Reg d, Reg m); bool thumb32_USUB16(Reg n, Reg d, Reg m); + bool thumb32_QADD8(Reg n, Reg d, Reg m); bool thumb32_QADD16(Reg n, Reg d, Reg m); bool thumb32_QASX(Reg n, Reg d, Reg m); bool thumb32_QSAX(Reg n, Reg d, Reg m); bool thumb32_QSUB16(Reg n, Reg d, Reg m); + bool thumb32_UQADD8(Reg n, Reg d, Reg m); bool thumb32_UQADD16(Reg n, Reg d, Reg m); bool thumb32_UQASX(Reg n, Reg d, Reg m); bool thumb32_UQSAX(Reg n, Reg d, Reg m); diff --git a/tests/A32/fuzz_thumb.cpp b/tests/A32/fuzz_thumb.cpp index 700193f9..d0a2dbe9 100644 --- a/tests/A32/fuzz_thumb.cpp +++ b/tests/A32/fuzz_thumb.cpp @@ -378,6 +378,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") { }), ThumbInstGen("111110101000nnnn1111dddd1000mmmm", // QADD three_reg_not_r15), + ThumbInstGen("111110101000nnnn1111dddd0001mmmm", // QADD8 + three_reg_not_r15), ThumbInstGen("111110101001nnnn1111dddd0001mmmm", // QADD16 three_reg_not_r15), ThumbInstGen("111110101010nnnn1111dddd0001mmmm", // QASX @@ -440,6 +442,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") { three_reg_not_r15), ThumbInstGen("111110101010nnnn1111dddd0100mmmm", // UASX three_reg_not_r15), + ThumbInstGen("111110101000nnnn1111dddd0101mmmm", // UQADD8 + three_reg_not_r15), ThumbInstGen("111110101001nnnn1111dddd0101mmmm", // UQADD16 three_reg_not_r15), ThumbInstGen("111110101010nnnn1111dddd0101mmmm", // UQASX