2018-01-06 22:15:25 +01:00
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/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include <unordered_map>
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#include <unordered_set>
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#include "backend_x64/a64_emit_x64.h"
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#include "backend_x64/a64_jitstate.h"
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#include "backend_x64/abi.h"
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#include "backend_x64/block_of_code.h"
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#include "backend_x64/emit_x64.h"
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#include "common/address_range.h"
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#include "common/assert.h"
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#include "common/bit_util.h"
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#include "common/common_types.h"
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#include "common/variant_util.h"
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#include "frontend/A64/location_descriptor.h"
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#include "frontend/A64/types.h"
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#include "frontend/ir/basic_block.h"
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#include "frontend/ir/microinstruction.h"
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#include "frontend/ir/opcodes.h"
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// TODO: Have ARM flags in host flags and not have them use up GPR registers unless necessary.
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// TODO: Actually implement that proper instruction selector you've always wanted to sweetheart.
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namespace Dynarmic {
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namespace BackendX64 {
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using namespace Xbyak::util;
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A64EmitContext::A64EmitContext(RegAlloc& reg_alloc, IR::Block& block)
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: EmitContext(reg_alloc, block) {}
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A64::LocationDescriptor A64EmitContext::Location() const {
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return A64::LocationDescriptor{block.Location()};
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}
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bool A64EmitContext::FPSCR_RoundTowardsZero() const {
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return Location().FPCR().RMode() != A64::FPCR::RoundingMode::TowardsZero;
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}
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bool A64EmitContext::FPSCR_FTZ() const {
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return Location().FPCR().FZ();
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}
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bool A64EmitContext::FPSCR_DN() const {
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return Location().FPCR().DN();
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}
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A64EmitX64::A64EmitX64(BlockOfCode* code, A64::UserConfig conf)
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: EmitX64(code), conf(conf)
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{
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code->PreludeComplete();
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}
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A64EmitX64::~A64EmitX64() {}
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A64EmitX64::BlockDescriptor A64EmitX64::Emit(IR::Block& block) {
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code->align();
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const u8* const entrypoint = code->getCurr();
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// Start emitting.
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EmitCondPrelude(block);
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RegAlloc reg_alloc{code, A64JitState::SpillCount, SpillToOpArg<A64JitState>};
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A64EmitContext ctx{reg_alloc, block};
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for (auto iter = block.begin(); iter != block.end(); ++iter) {
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IR::Inst* inst = &*iter;
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// Call the relevant Emit* member function.
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switch (inst->GetOpcode()) {
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#define OPCODE(name, type, ...) \
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case IR::Opcode::name: \
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A64EmitX64::Emit##name(ctx, inst); \
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break;
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#define A32OPC(...)
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#define A64OPC(name, type, ...) \
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case IR::Opcode::A64##name: \
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A64EmitX64::EmitA64##name(ctx, inst); \
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break;
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#include "frontend/ir/opcodes.inc"
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#undef OPCODE
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#undef A32OPC
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#undef A64OPC
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default:
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ASSERT_MSG(false, "Invalid opcode %zu", static_cast<size_t>(inst->GetOpcode()));
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break;
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}
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reg_alloc.EndOfAllocScope();
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}
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reg_alloc.AssertNoMoreUses();
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EmitAddCycles(block.CycleCount());
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EmitX64::EmitTerminal(block.GetTerminal(), block.Location());
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code->int3();
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const A64::LocationDescriptor descriptor{block.Location()};
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Patch(descriptor, entrypoint);
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const size_t size = static_cast<size_t>(code->getCurr() - entrypoint);
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const A64::LocationDescriptor end_location{block.EndLocation()};
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const auto range = boost::icl::discrete_interval<u64>::closed(descriptor.PC(), end_location.PC() - 1);
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A64EmitX64::BlockDescriptor block_desc{entrypoint, size, block.Location(), range};
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block_descriptors.emplace(descriptor.UniqueHash(), block_desc);
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block_ranges.add(std::make_pair(range, std::set<IR::LocationDescriptor>{descriptor}));
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return block_desc;
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}
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2018-01-07 17:33:02 +01:00
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void A64EmitX64::EmitA64SetCheckBit(A64EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Reg8 to_store = ctx.reg_alloc.UseGpr(args[0]).cvt8();
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code->mov(code->byte[r15 + offsetof(A64JitState, check_bit)], to_store);
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}
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2018-01-07 12:31:20 +01:00
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void A64EmitX64::EmitA64GetCFlag(A64EmitContext& ctx, IR::Inst* inst) {
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Xbyak::Reg32 result = ctx.reg_alloc.ScratchGpr().cvt32();
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code->mov(result, dword[r15 + offsetof(A64JitState, CPSR_nzcv)]);
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code->shr(result, 29);
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code->and_(result, 1);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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void A64EmitX64::EmitA64SetNZCV(A64EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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Xbyak::Reg32 to_store = ctx.reg_alloc.UseGpr(args[0]).cvt32();
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code->and_(to_store, 0b11000001'00000001);
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code->imul(to_store, to_store, 0b00010000'00100001);
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2018-01-07 15:46:35 +01:00
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code->shl(to_store, 16);
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code->and_(to_store, 0xF0000000);
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2018-01-07 12:31:20 +01:00
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code->mov(dword[r15 + offsetof(A64JitState, CPSR_nzcv)], to_store);
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}
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2018-01-07 01:11:57 +01:00
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void A64EmitX64::EmitA64GetW(A64EmitContext& ctx, IR::Inst* inst) {
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A64::Reg reg = inst->GetArg(0).GetA64RegRef();
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Xbyak::Reg32 result = ctx.reg_alloc.ScratchGpr().cvt32();
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code->mov(result, dword[r15 + offsetof(A64JitState, reg) + sizeof(u64) * static_cast<size_t>(reg)]);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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void A64EmitX64::EmitA64GetX(A64EmitContext& ctx, IR::Inst* inst) {
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A64::Reg reg = inst->GetArg(0).GetA64RegRef();
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Xbyak::Reg64 result = ctx.reg_alloc.ScratchGpr();
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code->mov(result, qword[r15 + offsetof(A64JitState, reg) + sizeof(u64) * static_cast<size_t>(reg)]);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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2018-01-07 12:31:20 +01:00
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void A64EmitX64::EmitA64GetSP(A64EmitContext& ctx, IR::Inst* inst) {
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Xbyak::Reg64 result = ctx.reg_alloc.ScratchGpr();
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code->mov(result, qword[r15 + offsetof(A64JitState, sp)]);
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ctx.reg_alloc.DefineValue(inst, result);
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}
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2018-01-07 01:11:57 +01:00
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void A64EmitX64::EmitA64SetW(A64EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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A64::Reg reg = inst->GetArg(0).GetA64RegRef();
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auto addr = dword[r15 + offsetof(A64JitState, reg) + sizeof(u64) * static_cast<size_t>(reg)];
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if (args[1].IsImmediate()) {
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code->mov(addr, args[1].GetImmediateU32());
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} else if (args[1].IsInXmm()) {
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Xbyak::Xmm to_store = ctx.reg_alloc.UseXmm(args[1]);
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code->movd(addr, to_store);
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} else {
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Xbyak::Reg32 to_store = ctx.reg_alloc.UseGpr(args[1]).cvt32();
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code->mov(addr, to_store);
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}
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}
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void A64EmitX64::EmitA64SetX(A64EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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A64::Reg reg = inst->GetArg(0).GetA64RegRef();
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auto addr = qword[r15 + offsetof(A64JitState, reg) + sizeof(u64) * static_cast<size_t>(reg)];
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2018-01-07 12:41:17 +01:00
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if (args[1].FitsInImmediateU32()) {
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code->mov(addr, args[1].GetImmediateU32());
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2018-01-07 01:11:57 +01:00
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} else if (args[1].IsInXmm()) {
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Xbyak::Xmm to_store = ctx.reg_alloc.UseXmm(args[1]);
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code->movq(addr, to_store);
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} else {
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Xbyak::Reg64 to_store = ctx.reg_alloc.UseGpr(args[1]);
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code->mov(addr, to_store);
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}
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}
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2018-01-07 12:31:20 +01:00
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void A64EmitX64::EmitA64SetSP(A64EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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auto addr = qword[r15 + offsetof(A64JitState, sp)];
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2018-01-07 12:41:17 +01:00
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if (args[0].FitsInImmediateU32()) {
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code->mov(addr, args[0].GetImmediateU32());
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2018-01-07 12:31:20 +01:00
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} else if (args[0].IsInXmm()) {
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Xbyak::Xmm to_store = ctx.reg_alloc.UseXmm(args[0]);
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code->movq(addr, to_store);
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} else {
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Xbyak::Reg64 to_store = ctx.reg_alloc.UseGpr(args[0]);
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code->mov(addr, to_store);
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}
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}
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2018-01-07 14:56:32 +01:00
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void A64EmitX64::EmitA64SetPC(A64EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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auto addr = qword[r15 + offsetof(A64JitState, pc)];
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if (args[0].FitsInImmediateU32()) {
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code->mov(addr, args[0].GetImmediateU32());
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} else if (args[0].IsInXmm()) {
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Xbyak::Xmm to_store = ctx.reg_alloc.UseXmm(args[0]);
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code->movq(addr, to_store);
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} else {
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Xbyak::Reg64 to_store = ctx.reg_alloc.UseGpr(args[0]);
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code->mov(addr, to_store);
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}
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}
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2018-01-06 22:15:25 +01:00
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void A64EmitX64::EmitTerminalImpl(IR::Term::Interpret terminal, IR::LocationDescriptor) {
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2018-01-07 01:11:57 +01:00
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code->mov(code->ABI_PARAM1, A64::LocationDescriptor{terminal.next}.PC());
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code->mov(code->ABI_PARAM2.cvt32(), 1);
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code->mov(qword[r15 + offsetof(A64JitState, pc)], code->ABI_PARAM1.cvt32());
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2018-01-06 22:15:25 +01:00
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code->SwitchMxcsrOnExit();
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//code->CallFunction(cb.InterpreterFallback);
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code->ReturnFromRunCode(true); // TODO: Check cycles
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}
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void A64EmitX64::EmitTerminalImpl(IR::Term::ReturnToDispatch, IR::LocationDescriptor) {
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code->ReturnFromRunCode();
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}
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void A64EmitX64::EmitTerminalImpl(IR::Term::LinkBlock terminal, IR::LocationDescriptor) {
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code->cmp(qword[r15 + offsetof(A64JitState, cycles_remaining)], 0);
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patch_information[terminal.next].jg.emplace_back(code->getCurr());
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if (auto next_bb = GetBasicBlock(terminal.next)) {
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EmitPatchJg(terminal.next, next_bb->entrypoint);
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} else {
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EmitPatchJg(terminal.next);
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}
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Xbyak::Label dest;
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code->jmp(dest, Xbyak::CodeGenerator::T_NEAR);
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code->SwitchToFarCode();
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code->align(16);
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code->L(dest);
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2018-01-07 01:11:57 +01:00
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code->mov(qword[r15 + offsetof(A64JitState, pc)], A64::LocationDescriptor{terminal.next}.PC());
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2018-01-06 22:15:25 +01:00
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PushRSBHelper(rax, rbx, terminal.next);
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code->ForceReturnFromRunCode();
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code->SwitchToNearCode();
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}
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void A64EmitX64::EmitTerminalImpl(IR::Term::LinkBlockFast terminal, IR::LocationDescriptor) {
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patch_information[terminal.next].jmp.emplace_back(code->getCurr());
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if (auto next_bb = GetBasicBlock(terminal.next)) {
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EmitPatchJmp(terminal.next, next_bb->entrypoint);
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} else {
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EmitPatchJmp(terminal.next);
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}
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}
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void A64EmitX64::EmitTerminalImpl(IR::Term::PopRSBHint, IR::LocationDescriptor) {
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ASSERT(false);
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}
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void A64EmitX64::EmitTerminalImpl(IR::Term::If terminal, IR::LocationDescriptor initial_location) {
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Xbyak::Label pass = EmitCond(terminal.if_);
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EmitTerminal(terminal.else_, initial_location);
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code->L(pass);
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EmitTerminal(terminal.then_, initial_location);
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}
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2018-01-07 17:33:02 +01:00
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void A64EmitX64::EmitTerminalImpl(IR::Term::CheckBit terminal, IR::LocationDescriptor initial_location) {
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Xbyak::Label fail;
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code->cmp(code->byte[r15 + offsetof(A64JitState, check_bit)], u8(0));
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code->jz(fail);
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EmitTerminal(terminal.then_, initial_location);
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code->L(fail);
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EmitTerminal(terminal.else_, initial_location);
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}
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2018-01-06 22:15:25 +01:00
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void A64EmitX64::EmitTerminalImpl(IR::Term::CheckHalt terminal, IR::LocationDescriptor initial_location) {
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code->cmp(code->byte[r15 + offsetof(A64JitState, halt_requested)], u8(0));
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code->jne(code->GetForceReturnFromRunCodeAddress());
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EmitTerminal(terminal.else_, initial_location);
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}
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2018-01-07 01:11:57 +01:00
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void A64EmitX64::EmitPatchJg(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr) {
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2018-01-06 22:15:25 +01:00
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const CodePtr patch_location = code->getCurr();
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if (target_code_ptr) {
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code->jg(target_code_ptr);
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} else {
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2018-01-07 01:11:57 +01:00
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code->mov(qword[r15 + offsetof(A64JitState, pc)], A64::LocationDescriptor{target_desc}.PC());
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2018-01-06 22:15:25 +01:00
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code->jg(code->GetReturnFromRunCodeAddress());
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}
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2018-01-07 14:42:11 +01:00
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code->EnsurePatchLocationSize(patch_location, 17);
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2018-01-06 22:15:25 +01:00
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}
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2018-01-07 01:11:57 +01:00
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void A64EmitX64::EmitPatchJmp(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr) {
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2018-01-06 22:15:25 +01:00
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const CodePtr patch_location = code->getCurr();
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if (target_code_ptr) {
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code->jmp(target_code_ptr);
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} else {
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2018-01-07 01:11:57 +01:00
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code->mov(qword[r15 + offsetof(A64JitState, pc)], A64::LocationDescriptor{target_desc}.PC());
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2018-01-06 22:15:25 +01:00
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code->jmp(code->GetReturnFromRunCodeAddress());
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}
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2018-01-07 14:42:11 +01:00
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code->EnsurePatchLocationSize(patch_location, 16);
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2018-01-06 22:15:25 +01:00
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}
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void A64EmitX64::EmitPatchMovRcx(CodePtr target_code_ptr) {
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if (!target_code_ptr) {
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target_code_ptr = code->GetReturnFromRunCodeAddress();
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}
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const CodePtr patch_location = code->getCurr();
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code->mov(code->rcx, reinterpret_cast<u64>(target_code_ptr));
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code->EnsurePatchLocationSize(patch_location, 10);
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}
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} // namespace BackendX64
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} // namespace Dynarmic
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