2018-03-20 04:00:59 +01:00
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// Copyright 2015 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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2018-04-20 05:01:50 +02:00
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#include <algorithm>
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2018-09-13 02:27:43 +02:00
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#include <array>
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2018-03-20 04:00:59 +01:00
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#include <memory>
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#include <string>
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2018-07-24 18:10:35 +02:00
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#include <string_view>
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2018-03-20 04:00:59 +01:00
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#include <tuple>
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#include <utility>
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#include <glad/glad.h>
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#include "common/alignment.h"
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "common/math_util.h"
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#include "common/microprofile.h"
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2018-08-22 06:33:03 +02:00
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#include "common/scope_exit.h"
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2018-03-24 07:01:03 +01:00
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#include "core/core.h"
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2018-06-29 20:10:16 +02:00
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#include "core/frontend/emu_window.h"
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2018-03-24 07:01:03 +01:00
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#include "core/hle/kernel/process.h"
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2018-03-20 04:00:59 +01:00
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#include "core/settings.h"
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2018-03-24 07:01:03 +01:00
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#include "video_core/engines/maxwell_3d.h"
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2018-03-20 04:00:59 +01:00
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#include "video_core/renderer_opengl/gl_rasterizer.h"
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#include "video_core/renderer_opengl/gl_shader_gen.h"
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2018-03-25 04:38:08 +02:00
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#include "video_core/renderer_opengl/maxwell_to_gl.h"
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2018-03-20 04:00:59 +01:00
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#include "video_core/renderer_opengl/renderer_opengl.h"
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2018-06-29 20:10:16 +02:00
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#include "video_core/video_core.h"
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2018-03-20 04:00:59 +01:00
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2018-08-21 10:18:27 +02:00
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namespace OpenGL {
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2018-03-24 09:06:26 +01:00
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using Maxwell = Tegra::Engines::Maxwell3D::Regs;
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2018-03-20 04:00:59 +01:00
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using PixelFormat = SurfaceParams::PixelFormat;
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using SurfaceType = SurfaceParams::SurfaceType;
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MICROPROFILE_DEFINE(OpenGL_VAO, "OpenGL", "Vertex Array Setup", MP_RGB(128, 128, 192));
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2018-09-04 11:02:59 +02:00
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MICROPROFILE_DEFINE(OpenGL_Shader, "OpenGL", "Shader Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_UBO, "OpenGL", "Const Buffer Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_Index, "OpenGL", "Index Buffer Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_Texture, "OpenGL", "Texture Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_Framebuffer, "OpenGL", "Framebuffer Setup", MP_RGB(128, 128, 192));
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2018-03-20 04:00:59 +01:00
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MICROPROFILE_DEFINE(OpenGL_Drawing, "OpenGL", "Drawing", MP_RGB(128, 128, 192));
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2018-09-04 11:02:59 +02:00
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MICROPROFILE_DEFINE(OpenGL_Blits, "OpenGL", "Blits", MP_RGB(128, 128, 192));
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2018-03-20 04:00:59 +01:00
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MICROPROFILE_DEFINE(OpenGL_CacheManagement, "OpenGL", "Cache Mgmt", MP_RGB(100, 255, 100));
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2018-10-02 19:47:26 +02:00
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MICROPROFILE_DEFINE(OpenGL_PrimitiveAssembly, "OpenGL", "Prim Asmbl", MP_RGB(255, 100, 100));
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struct DrawParameters {
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GLenum primitive_mode;
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GLsizei count;
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GLint current_instance;
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bool use_indexed;
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GLint vertex_first;
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GLenum index_format;
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GLint base_vertex;
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GLintptr index_buffer_offset;
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void DispatchDraw() const {
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if (use_indexed) {
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const auto index_buffer_ptr = reinterpret_cast<const void*>(index_buffer_offset);
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if (current_instance > 0) {
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glDrawElementsInstancedBaseVertexBaseInstance(primitive_mode, count, index_format,
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index_buffer_ptr, 1, base_vertex,
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current_instance);
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} else {
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glDrawElementsBaseVertex(primitive_mode, count, index_format, index_buffer_ptr,
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base_vertex);
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}
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} else {
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if (current_instance > 0) {
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glDrawArraysInstancedBaseInstance(primitive_mode, vertex_first, count, 1,
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current_instance);
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} else {
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glDrawArrays(primitive_mode, vertex_first, count);
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}
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}
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}
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};
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2018-03-20 04:00:59 +01:00
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2018-08-21 01:34:02 +02:00
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RasterizerOpenGL::RasterizerOpenGL(Core::Frontend::EmuWindow& window, ScreenInfo& info)
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2018-08-29 00:27:03 +02:00
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: emu_window{window}, screen_info{info}, buffer_cache(STREAM_BUFFER_SIZE) {
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2018-03-27 04:44:03 +02:00
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// Create sampler objects
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2018-09-15 15:21:06 +02:00
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for (std::size_t i = 0; i < texture_samplers.size(); ++i) {
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2018-03-27 04:44:03 +02:00
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texture_samplers[i].Create();
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state.texture_units[i].sampler = texture_samplers[i].sampler.handle;
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}
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2018-03-20 04:00:59 +01:00
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GLint ext_num;
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glGetIntegerv(GL_NUM_EXTENSIONS, &ext_num);
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for (GLint i = 0; i < ext_num; i++) {
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2018-07-24 18:10:35 +02:00
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const std::string_view extension{
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reinterpret_cast<const char*>(glGetStringi(GL_EXTENSIONS, i))};
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2018-03-20 04:00:59 +01:00
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2018-08-09 21:31:46 +02:00
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if (extension == "GL_ARB_direct_state_access") {
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2018-03-20 04:00:59 +01:00
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has_ARB_direct_state_access = true;
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2018-09-13 02:27:43 +02:00
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} else if (extension == "GL_ARB_multi_bind") {
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has_ARB_multi_bind = true;
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2018-03-20 04:00:59 +01:00
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} else if (extension == "GL_ARB_separate_shader_objects") {
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has_ARB_separate_shader_objects = true;
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} else if (extension == "GL_ARB_vertex_attrib_binding") {
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has_ARB_vertex_attrib_binding = true;
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}
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}
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2018-04-07 11:22:08 +02:00
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ASSERT_MSG(has_ARB_separate_shader_objects, "has_ARB_separate_shader_objects is unsupported");
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2018-03-20 04:00:59 +01:00
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// Clipping plane 0 is always enabled for PICA fixed clip plane z <= 0
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state.clip_distance[0] = true;
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// Create render framebuffer
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framebuffer.Create();
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2018-04-07 11:22:08 +02:00
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shader_program_manager = std::make_unique<GLShader::ProgramManager>();
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state.draw.shader_program = 0;
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state.Apply();
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2018-03-20 04:00:59 +01:00
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glEnable(GL_BLEND);
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2018-08-10 09:45:38 +02:00
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glGetIntegerv(GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT, &uniform_buffer_alignment);
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2018-07-02 18:13:26 +02:00
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LOG_CRITICAL(Render_OpenGL, "Sync fixed function OpenGL state here!");
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2018-03-20 04:00:59 +01:00
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}
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2018-08-09 21:31:46 +02:00
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RasterizerOpenGL::~RasterizerOpenGL() {}
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2018-03-20 04:00:59 +01:00
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2018-08-29 00:27:03 +02:00
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void RasterizerOpenGL::SetupVertexArrays() {
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2018-03-20 04:00:59 +01:00
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MICROPROFILE_SCOPE(OpenGL_VAO);
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2018-08-18 21:42:26 +02:00
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const auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
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const auto& regs = gpu.regs;
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2018-03-25 03:29:47 +02:00
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2018-09-05 11:36:50 +02:00
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auto [iter, is_cache_miss] = vertex_array_cache.try_emplace(regs.vertex_attrib_format);
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auto& VAO = iter->second;
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if (is_cache_miss) {
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VAO.Create();
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state.draw.vertex_array = VAO.handle;
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state.Apply();
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// The index buffer binding is stored within the VAO. Stupid OpenGL, but easy to work
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// around.
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glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, buffer_cache.GetHandle());
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// Use the vertex array as-is, assumes that the data is formatted correctly for OpenGL.
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// Enables the first 16 vertex attributes always, as we don't know which ones are actually
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// used until shader time. Note, Tegra technically supports 32, but we're capping this to 16
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// for now to avoid OpenGL errors.
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// TODO(Subv): Analyze the shader to identify which attributes are actually used and don't
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// assume every shader uses them all.
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for (unsigned index = 0; index < 16; ++index) {
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const auto& attrib = regs.vertex_attrib_format[index];
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// Ignore invalid attributes.
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if (!attrib.IsValid())
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continue;
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const auto& buffer = regs.vertex_array[attrib.buffer];
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LOG_TRACE(HW_GPU,
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"vertex attrib {}, count={}, size={}, type={}, offset={}, normalize={}",
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index, attrib.ComponentCount(), attrib.SizeString(), attrib.TypeString(),
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attrib.offset.Value(), attrib.IsNormalized());
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ASSERT(buffer.IsEnabled());
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glEnableVertexAttribArray(index);
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if (attrib.type == Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::SignedInt ||
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attrib.type ==
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Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::UnsignedInt) {
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glVertexAttribIFormat(index, attrib.ComponentCount(),
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MaxwellToGL::VertexType(attrib), attrib.offset);
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} else {
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glVertexAttribFormat(index, attrib.ComponentCount(),
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MaxwellToGL::VertexType(attrib),
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attrib.IsNormalized() ? GL_TRUE : GL_FALSE, attrib.offset);
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}
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glVertexAttribBinding(index, attrib.buffer);
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}
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}
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state.draw.vertex_array = VAO.handle;
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2018-08-29 00:27:03 +02:00
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state.draw.vertex_buffer = buffer_cache.GetHandle();
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2018-03-25 03:29:47 +02:00
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state.Apply();
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2018-04-22 02:19:33 +02:00
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// Upload all guest vertex arrays sequentially to our buffer
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for (u32 index = 0; index < Maxwell::NumVertexArrays; ++index) {
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const auto& vertex_array = regs.vertex_array[index];
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if (!vertex_array.IsEnabled())
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continue;
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2018-08-18 21:42:26 +02:00
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Tegra::GPUVAddr start = vertex_array.StartAddress();
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2018-04-22 02:19:33 +02:00
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const Tegra::GPUVAddr end = regs.vertex_array_limit[index].LimitAddress();
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ASSERT(end > start);
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2018-09-08 08:59:59 +02:00
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const u64 size = end - start + 1;
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const GLintptr vertex_buffer_offset = buffer_cache.UploadMemory(start, size);
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2018-04-22 02:19:33 +02:00
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// Bind the vertex array to the buffer at the current offset.
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2018-08-29 00:27:03 +02:00
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glBindVertexBuffer(index, buffer_cache.GetHandle(), vertex_buffer_offset,
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2018-08-10 19:11:12 +02:00
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vertex_array.stride);
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2018-04-22 02:19:33 +02:00
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2018-08-18 21:42:26 +02:00
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if (regs.instanced_arrays.IsInstancingEnabled(index) && vertex_array.divisor != 0) {
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2018-09-08 10:05:56 +02:00
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// Enable vertex buffer instancing with the specified divisor.
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glVertexBindingDivisor(index, vertex_array.divisor);
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2018-08-18 21:42:26 +02:00
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} else {
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// Disable the vertex buffer instancing.
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glVertexBindingDivisor(index, 0);
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}
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2018-03-25 03:29:47 +02:00
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}
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2018-03-20 04:00:59 +01:00
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}
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2018-10-02 19:47:26 +02:00
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DrawParameters RasterizerOpenGL::SetupDraw() {
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const auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
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const auto& regs = gpu.regs;
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const bool is_indexed = accelerate_draw == AccelDraw::Indexed;
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DrawParameters params{};
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params.current_instance = gpu.state.current_instance;
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if (regs.draw.topology == Maxwell::PrimitiveTopology::Quads) {
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MICROPROFILE_SCOPE(OpenGL_PrimitiveAssembly);
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params.use_indexed = true;
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params.primitive_mode = GL_TRIANGLES;
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if (is_indexed) {
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params.index_format = MaxwellToGL::IndexFormat(regs.index_array.format);
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params.count = (regs.index_array.count / 4) * 6;
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params.index_buffer_offset = primitive_assembler.MakeQuadIndexed(
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regs.index_array.IndexStart(), regs.index_array.FormatSizeInBytes(),
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regs.index_array.count);
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params.base_vertex = static_cast<GLint>(regs.vb_element_base);
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} else {
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// MakeQuadArray always generates u32 indexes
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params.index_format = GL_UNSIGNED_INT;
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params.count = (regs.vertex_buffer.count / 4) * 6;
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params.index_buffer_offset =
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primitive_assembler.MakeQuadArray(regs.vertex_buffer.first, params.count);
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}
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return params;
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}
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params.use_indexed = is_indexed;
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params.primitive_mode = MaxwellToGL::PrimitiveTopology(regs.draw.topology);
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if (is_indexed) {
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MICROPROFILE_SCOPE(OpenGL_Index);
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params.index_format = MaxwellToGL::IndexFormat(regs.index_array.format);
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params.count = regs.index_array.count;
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params.index_buffer_offset =
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buffer_cache.UploadMemory(regs.index_array.IndexStart(), CalculateIndexBufferSize());
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params.base_vertex = static_cast<GLint>(regs.vb_element_base);
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} else {
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params.count = regs.vertex_buffer.count;
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params.vertex_first = regs.vertex_buffer.first;
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}
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2018-10-07 04:22:48 +02:00
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return params;
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2018-10-02 19:47:26 +02:00
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}
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2018-10-07 04:17:31 +02:00
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void RasterizerOpenGL::SetupShaders(GLenum primitive_mode) {
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2018-09-04 11:02:59 +02:00
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MICROPROFILE_SCOPE(OpenGL_Shader);
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2018-09-08 08:59:59 +02:00
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const auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
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2018-04-08 06:00:11 +02:00
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2018-06-06 19:58:16 +02:00
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// Next available bindpoints to use when uploading the const buffers and textures to the GLSL
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2018-06-10 01:02:05 +02:00
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// shaders. The constbuffer bindpoint starts after the shader stage configuration bind points.
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2018-08-10 09:45:38 +02:00
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u32 current_constbuffer_bindpoint = Tegra::Engines::Maxwell3D::Regs::MaxShaderStage;
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2018-06-06 19:58:16 +02:00
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u32 current_texture_bindpoint = 0;
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2018-04-15 21:14:57 +02:00
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2018-09-15 15:21:06 +02:00
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for (std::size_t index = 0; index < Maxwell::MaxShaderProgram; ++index) {
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2018-09-08 08:59:59 +02:00
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const auto& shader_config = gpu.regs.shader_config[index];
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2018-04-08 06:00:11 +02:00
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const Maxwell::ShaderProgram program{static_cast<Maxwell::ShaderProgram>(index)};
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// Skip stages that are not enabled
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2018-07-13 04:57:57 +02:00
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if (!gpu.regs.IsShaderConfigEnabled(index)) {
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2018-10-07 04:17:31 +02:00
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switch (program) {
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case Maxwell::ShaderProgram::Geometry:
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shader_program_manager->UseTrivialGeometryShader();
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break;
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}
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2018-04-08 06:00:11 +02:00
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continue;
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|
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}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
const std::size_t stage{index == 0 ? 0 : index - 1}; // Stage indices are 0 - 5
|
2018-07-13 04:57:57 +02:00
|
|
|
|
2018-06-07 15:33:23 +02:00
|
|
|
GLShader::MaxwellUniformData ubo{};
|
|
|
|
ubo.SetFromRegs(gpu.state.shader_stages[stage]);
|
2018-09-08 08:59:59 +02:00
|
|
|
const GLintptr offset = buffer_cache.UploadHostMemory(
|
2018-09-15 15:21:06 +02:00
|
|
|
&ubo, sizeof(ubo), static_cast<std::size_t>(uniform_buffer_alignment));
|
2018-06-07 15:33:23 +02:00
|
|
|
|
2018-08-10 09:45:38 +02:00
|
|
|
// Bind the buffer
|
2018-10-15 20:16:55 +02:00
|
|
|
glBindBufferRange(GL_UNIFORM_BUFFER, static_cast<GLuint>(stage), buffer_cache.GetHandle(),
|
|
|
|
offset, static_cast<GLsizeiptr>(sizeof(ubo)));
|
2018-04-22 02:19:33 +02:00
|
|
|
|
2018-08-23 23:30:27 +02:00
|
|
|
Shader shader{shader_cache.GetStageProgram(program)};
|
2018-04-15 18:15:54 +02:00
|
|
|
|
2018-04-08 06:00:11 +02:00
|
|
|
switch (program) {
|
2018-08-23 23:30:27 +02:00
|
|
|
case Maxwell::ShaderProgram::VertexA:
|
2018-04-08 06:00:11 +02:00
|
|
|
case Maxwell::ShaderProgram::VertexB: {
|
2018-10-07 04:17:31 +02:00
|
|
|
shader_program_manager->UseProgrammableVertexShader(
|
|
|
|
shader->GetProgramHandle(primitive_mode));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case Maxwell::ShaderProgram::Geometry: {
|
|
|
|
shader_program_manager->UseProgrammableGeometryShader(
|
|
|
|
shader->GetProgramHandle(primitive_mode));
|
2018-04-08 06:00:11 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case Maxwell::ShaderProgram::Fragment: {
|
2018-10-07 04:17:31 +02:00
|
|
|
shader_program_manager->UseProgrammableFragmentShader(
|
|
|
|
shader->GetProgramHandle(primitive_mode));
|
2018-04-08 06:00:11 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
2018-07-02 18:20:50 +02:00
|
|
|
LOG_CRITICAL(HW_GPU, "Unimplemented shader index={}, enable={}, offset=0x{:08X}", index,
|
|
|
|
shader_config.enable.Value(), shader_config.offset);
|
2018-04-08 06:00:11 +02:00
|
|
|
UNREACHABLE();
|
|
|
|
}
|
2018-04-15 18:15:54 +02:00
|
|
|
|
|
|
|
// Configure the const buffers for this shader stage.
|
2018-10-07 04:17:31 +02:00
|
|
|
current_constbuffer_bindpoint =
|
|
|
|
SetupConstBuffers(static_cast<Maxwell::ShaderStage>(stage), shader, primitive_mode,
|
|
|
|
current_constbuffer_bindpoint);
|
2018-06-06 19:58:16 +02:00
|
|
|
|
|
|
|
// Configure the textures for this shader stage.
|
2018-08-23 23:30:27 +02:00
|
|
|
current_texture_bindpoint = SetupTextures(static_cast<Maxwell::ShaderStage>(stage), shader,
|
2018-10-07 04:17:31 +02:00
|
|
|
primitive_mode, current_texture_bindpoint);
|
2018-07-13 04:25:03 +02:00
|
|
|
|
|
|
|
// When VertexA is enabled, we have dual vertex shaders
|
|
|
|
if (program == Maxwell::ShaderProgram::VertexA) {
|
|
|
|
// VertexB was combined with VertexA, so we skip the VertexB iteration
|
|
|
|
index++;
|
|
|
|
}
|
2018-04-08 06:00:11 +02:00
|
|
|
}
|
|
|
|
|
2018-09-06 05:20:21 +02:00
|
|
|
state.Apply();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
std::size_t RasterizerOpenGL::CalculateVertexArraysSize() const {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-04-22 02:19:33 +02:00
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
std::size_t size = 0;
|
2018-04-22 02:19:33 +02:00
|
|
|
for (u32 index = 0; index < Maxwell::NumVertexArrays; ++index) {
|
|
|
|
if (!regs.vertex_array[index].IsEnabled())
|
|
|
|
continue;
|
|
|
|
|
|
|
|
const Tegra::GPUVAddr start = regs.vertex_array[index].StartAddress();
|
|
|
|
const Tegra::GPUVAddr end = regs.vertex_array_limit[index].LimitAddress();
|
|
|
|
|
|
|
|
ASSERT(end > start);
|
|
|
|
size += end - start + 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
2018-10-02 19:47:26 +02:00
|
|
|
std::size_t RasterizerOpenGL::CalculateIndexBufferSize() const {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
|
|
|
return static_cast<std::size_t>(regs.index_array.count) *
|
|
|
|
static_cast<std::size_t>(regs.index_array.FormatSizeInBytes());
|
|
|
|
}
|
|
|
|
|
2018-03-20 04:00:59 +01:00
|
|
|
bool RasterizerOpenGL::AccelerateDrawBatch(bool is_indexed) {
|
|
|
|
accelerate_draw = is_indexed ? AccelDraw::Indexed : AccelDraw::Arrays;
|
2018-03-25 04:50:21 +02:00
|
|
|
DrawArrays();
|
2018-03-20 04:00:59 +01:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2018-08-29 00:43:08 +02:00
|
|
|
template <typename Map, typename Interval>
|
|
|
|
static constexpr auto RangeFromInterval(Map& map, const Interval& interval) {
|
|
|
|
return boost::make_iterator_range(map.equal_range(interval));
|
|
|
|
}
|
|
|
|
|
2018-08-28 03:35:15 +02:00
|
|
|
void RasterizerOpenGL::UpdatePagesCachedCount(VAddr addr, u64 size, int delta) {
|
|
|
|
const u64 page_start{addr >> Memory::PAGE_BITS};
|
|
|
|
const u64 page_end{(addr + size + Memory::PAGE_SIZE - 1) >> Memory::PAGE_BITS};
|
2018-08-29 00:43:08 +02:00
|
|
|
|
|
|
|
// Interval maps will erase segments if count reaches 0, so if delta is negative we have to
|
|
|
|
// subtract after iterating
|
|
|
|
const auto pages_interval = CachedPageMap::interval_type::right_open(page_start, page_end);
|
|
|
|
if (delta > 0)
|
|
|
|
cached_pages.add({pages_interval, delta});
|
|
|
|
|
|
|
|
for (const auto& pair : RangeFromInterval(cached_pages, pages_interval)) {
|
|
|
|
const auto interval = pair.first & pages_interval;
|
|
|
|
const int count = pair.second;
|
|
|
|
|
2018-08-28 03:35:15 +02:00
|
|
|
const VAddr interval_start_addr = boost::icl::first(interval) << Memory::PAGE_BITS;
|
|
|
|
const VAddr interval_end_addr = boost::icl::last_next(interval) << Memory::PAGE_BITS;
|
2018-08-29 00:43:08 +02:00
|
|
|
const u64 interval_size = interval_end_addr - interval_start_addr;
|
|
|
|
|
|
|
|
if (delta > 0 && count == delta)
|
|
|
|
Memory::RasterizerMarkRegionCached(interval_start_addr, interval_size, true);
|
|
|
|
else if (delta < 0 && count == -delta)
|
|
|
|
Memory::RasterizerMarkRegionCached(interval_start_addr, interval_size, false);
|
|
|
|
else
|
|
|
|
ASSERT(count >= 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (delta < 0)
|
|
|
|
cached_pages.add({pages_interval, delta});
|
|
|
|
}
|
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
void RasterizerOpenGL::ConfigureFramebuffers(bool using_color_fb, bool using_depth_fb,
|
|
|
|
bool preserve_contents,
|
2018-09-15 15:21:06 +02:00
|
|
|
boost::optional<std::size_t> single_color_target) {
|
2018-09-04 11:02:59 +02:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_Framebuffer);
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
|
|
|
Surface depth_surface;
|
2018-09-10 01:01:21 +02:00
|
|
|
if (using_depth_fb) {
|
|
|
|
depth_surface = res_cache.GetDepthBufferSurface(preserve_contents);
|
|
|
|
}
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-09-10 01:01:21 +02:00
|
|
|
// TODO(bunnei): Figure out how the below register works. According to envytools, this should be
|
|
|
|
// used to enable multiple render targets. However, it is left unset on all games that I have
|
|
|
|
// tested.
|
|
|
|
ASSERT_MSG(regs.rt_separate_frag_data == 0, "Unimplemented");
|
2018-03-24 08:59:51 +01:00
|
|
|
|
|
|
|
// Bind the framebuffer surfaces
|
2018-09-10 01:01:21 +02:00
|
|
|
state.draw.draw_framebuffer = framebuffer.handle;
|
|
|
|
state.Apply();
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
if (using_color_fb) {
|
|
|
|
if (single_color_target) {
|
|
|
|
// Used when just a single color attachment is enabled, e.g. for clearing a color buffer
|
|
|
|
Surface color_surface =
|
|
|
|
res_cache.GetColorBufferSurface(*single_color_target, preserve_contents);
|
2018-10-13 04:31:04 +02:00
|
|
|
|
|
|
|
if (color_surface) {
|
|
|
|
// Assume that a surface will be written to if it is used as a framebuffer, even if
|
|
|
|
// the shader doesn't actually write to it.
|
2018-10-16 22:51:53 +02:00
|
|
|
color_surface->MarkAsModified(true, res_cache);
|
2018-10-13 04:31:04 +02:00
|
|
|
}
|
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
glFramebufferTexture2D(
|
|
|
|
GL_DRAW_FRAMEBUFFER,
|
|
|
|
GL_COLOR_ATTACHMENT0 + static_cast<GLenum>(*single_color_target), GL_TEXTURE_2D,
|
|
|
|
color_surface != nullptr ? color_surface->Texture().handle : 0, 0);
|
|
|
|
glDrawBuffer(GL_COLOR_ATTACHMENT0 + static_cast<GLenum>(*single_color_target));
|
|
|
|
} else {
|
|
|
|
// Multiple color attachments are enabled
|
|
|
|
std::array<GLenum, Maxwell::NumRenderTargets> buffers;
|
2018-09-15 15:21:06 +02:00
|
|
|
for (std::size_t index = 0; index < Maxwell::NumRenderTargets; ++index) {
|
2018-09-10 06:36:13 +02:00
|
|
|
Surface color_surface = res_cache.GetColorBufferSurface(index, preserve_contents);
|
2018-10-13 04:31:04 +02:00
|
|
|
|
|
|
|
if (color_surface) {
|
|
|
|
// Assume that a surface will be written to if it is used as a framebuffer, even
|
|
|
|
// if the shader doesn't actually write to it.
|
2018-10-16 22:51:53 +02:00
|
|
|
color_surface->MarkAsModified(true, res_cache);
|
2018-10-13 04:31:04 +02:00
|
|
|
}
|
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
buffers[index] = GL_COLOR_ATTACHMENT0 + regs.rt_control.GetMap(index);
|
|
|
|
glFramebufferTexture2D(
|
|
|
|
GL_DRAW_FRAMEBUFFER, GL_COLOR_ATTACHMENT0 + static_cast<GLenum>(index),
|
|
|
|
GL_TEXTURE_2D, color_surface != nullptr ? color_surface->Texture().handle : 0,
|
|
|
|
0);
|
|
|
|
}
|
|
|
|
glDrawBuffers(regs.rt_control.count, buffers.data());
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// No color attachments are enabled - zero out all of them
|
2018-09-15 15:21:06 +02:00
|
|
|
for (std::size_t index = 0; index < Maxwell::NumRenderTargets; ++index) {
|
2018-09-10 06:36:13 +02:00
|
|
|
glFramebufferTexture2D(GL_DRAW_FRAMEBUFFER,
|
|
|
|
GL_COLOR_ATTACHMENT0 + static_cast<GLenum>(index), GL_TEXTURE_2D,
|
|
|
|
0, 0);
|
|
|
|
}
|
|
|
|
glDrawBuffer(GL_NONE);
|
2018-09-10 01:01:21 +02:00
|
|
|
}
|
2018-03-27 04:54:16 +02:00
|
|
|
|
2018-09-10 01:01:21 +02:00
|
|
|
if (depth_surface) {
|
2018-10-13 04:31:04 +02:00
|
|
|
// Assume that a surface will be written to if it is used as a framebuffer, even if
|
|
|
|
// the shader doesn't actually write to it.
|
2018-10-16 22:51:53 +02:00
|
|
|
depth_surface->MarkAsModified(true, res_cache);
|
2018-10-13 04:31:04 +02:00
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
if (regs.stencil_enable) {
|
2018-09-10 01:01:21 +02:00
|
|
|
// Attach both depth and stencil
|
|
|
|
glFramebufferTexture2D(GL_DRAW_FRAMEBUFFER, GL_DEPTH_STENCIL_ATTACHMENT, GL_TEXTURE_2D,
|
|
|
|
depth_surface->Texture().handle, 0);
|
|
|
|
} else {
|
|
|
|
// Attach depth
|
|
|
|
glFramebufferTexture2D(GL_DRAW_FRAMEBUFFER, GL_DEPTH_ATTACHMENT, GL_TEXTURE_2D,
|
|
|
|
depth_surface->Texture().handle, 0);
|
|
|
|
// Clear stencil attachment
|
|
|
|
glFramebufferTexture2D(GL_DRAW_FRAMEBUFFER, GL_STENCIL_ATTACHMENT, GL_TEXTURE_2D, 0, 0);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// Clear both depth and stencil attachment
|
|
|
|
glFramebufferTexture2D(GL_DRAW_FRAMEBUFFER, GL_DEPTH_STENCIL_ATTACHMENT, GL_TEXTURE_2D, 0,
|
|
|
|
0);
|
|
|
|
}
|
|
|
|
|
|
|
|
SyncViewport();
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-09-10 01:01:21 +02:00
|
|
|
state.Apply();
|
2018-07-03 23:55:44 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::Clear() {
|
2018-08-22 06:33:03 +02:00
|
|
|
const auto prev_state{state};
|
|
|
|
SCOPE_EXIT({ prev_state.Apply(); });
|
2018-07-03 23:55:44 +02:00
|
|
|
|
2018-08-22 06:33:03 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-09-10 06:36:13 +02:00
|
|
|
bool use_color{};
|
|
|
|
bool use_depth{};
|
|
|
|
bool use_stencil{};
|
2018-07-04 05:32:59 +02:00
|
|
|
|
2018-08-22 06:33:03 +02:00
|
|
|
OpenGLState clear_state;
|
2018-09-21 05:31:53 +02:00
|
|
|
clear_state.draw.draw_framebuffer = framebuffer.handle;
|
2018-08-22 06:33:03 +02:00
|
|
|
clear_state.color_mask.red_enabled = regs.clear_buffers.R ? GL_TRUE : GL_FALSE;
|
|
|
|
clear_state.color_mask.green_enabled = regs.clear_buffers.G ? GL_TRUE : GL_FALSE;
|
|
|
|
clear_state.color_mask.blue_enabled = regs.clear_buffers.B ? GL_TRUE : GL_FALSE;
|
|
|
|
clear_state.color_mask.alpha_enabled = regs.clear_buffers.A ? GL_TRUE : GL_FALSE;
|
|
|
|
|
|
|
|
if (regs.clear_buffers.R || regs.clear_buffers.G || regs.clear_buffers.B ||
|
2018-07-03 23:55:44 +02:00
|
|
|
regs.clear_buffers.A) {
|
2018-09-10 06:36:13 +02:00
|
|
|
use_color = true;
|
2018-07-03 23:55:44 +02:00
|
|
|
}
|
2018-07-04 05:32:59 +02:00
|
|
|
if (regs.clear_buffers.Z) {
|
2018-08-22 06:33:03 +02:00
|
|
|
ASSERT_MSG(regs.zeta_enable != 0, "Tried to clear Z but buffer is not enabled!");
|
2018-09-10 06:36:13 +02:00
|
|
|
use_depth = true;
|
2018-07-14 07:52:23 +02:00
|
|
|
|
|
|
|
// Always enable the depth write when clearing the depth buffer. The depth write mask is
|
|
|
|
// ignored when clearing the buffer in the Switch, but OpenGL obeys it so we set it to true.
|
2018-08-22 06:33:03 +02:00
|
|
|
clear_state.depth.test_enabled = true;
|
|
|
|
clear_state.depth.test_func = GL_ALWAYS;
|
|
|
|
}
|
|
|
|
if (regs.clear_buffers.S) {
|
|
|
|
ASSERT_MSG(regs.zeta_enable != 0, "Tried to clear stencil but buffer is not enabled!");
|
2018-09-10 06:36:13 +02:00
|
|
|
use_stencil = true;
|
2018-08-22 06:33:03 +02:00
|
|
|
clear_state.stencil.test_enabled = true;
|
2018-07-04 05:32:59 +02:00
|
|
|
}
|
2018-07-03 23:55:44 +02:00
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
if (!use_color && !use_depth && !use_stencil) {
|
2018-08-22 06:33:03 +02:00
|
|
|
// No color surface nor depth/stencil surface are enabled
|
2018-07-03 23:55:44 +02:00
|
|
|
return;
|
2018-08-22 06:33:03 +02:00
|
|
|
}
|
|
|
|
|
2018-08-02 02:59:42 +02:00
|
|
|
ScopeAcquireGLContext acquire_context{emu_window};
|
2018-06-29 20:10:16 +02:00
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
ConfigureFramebuffers(use_color, use_depth || use_stencil, false,
|
|
|
|
regs.clear_buffers.RT.Value());
|
2018-07-03 23:55:44 +02:00
|
|
|
|
2018-08-22 06:33:03 +02:00
|
|
|
clear_state.Apply();
|
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
if (use_color) {
|
|
|
|
glClearBufferfv(GL_COLOR, regs.clear_buffers.RT, regs.clear_color);
|
|
|
|
}
|
2018-06-07 06:54:25 +02:00
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
if (use_depth && use_stencil) {
|
|
|
|
glClearBufferfi(GL_DEPTH_STENCIL, 0, regs.clear_depth, regs.clear_stencil);
|
|
|
|
} else if (use_depth) {
|
|
|
|
glClearBufferfv(GL_DEPTH, 0, ®s.clear_depth);
|
|
|
|
} else if (use_stencil) {
|
|
|
|
glClearBufferiv(GL_STENCIL, 0, ®s.clear_stencil);
|
|
|
|
}
|
2018-06-07 06:54:25 +02:00
|
|
|
}
|
|
|
|
|
2018-03-25 04:50:21 +02:00
|
|
|
void RasterizerOpenGL::DrawArrays() {
|
2018-03-24 08:59:51 +01:00
|
|
|
if (accelerate_draw == AccelDraw::Disabled)
|
|
|
|
return;
|
|
|
|
|
2018-03-20 04:00:59 +01:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_Drawing);
|
2018-09-08 10:05:56 +02:00
|
|
|
const auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
|
|
|
|
const auto& regs = gpu.regs;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-08-02 02:59:42 +02:00
|
|
|
ScopeAcquireGLContext acquire_context{emu_window};
|
2018-06-29 20:10:16 +02:00
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
ConfigureFramebuffers();
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-07-14 07:52:23 +02:00
|
|
|
SyncDepthTestState();
|
2018-08-22 06:35:31 +02:00
|
|
|
SyncStencilTestState();
|
2018-06-09 00:05:52 +02:00
|
|
|
SyncBlendState();
|
2018-08-21 01:44:47 +02:00
|
|
|
SyncLogicOpState();
|
2018-07-02 20:33:41 +02:00
|
|
|
SyncCullMode();
|
2018-10-09 02:49:36 +02:00
|
|
|
SyncScissorTest();
|
2018-10-10 15:45:22 +02:00
|
|
|
// Alpha Testing is synced on shaders.
|
2018-09-26 00:41:21 +02:00
|
|
|
SyncTransformFeedback();
|
2018-09-28 06:31:01 +02:00
|
|
|
SyncPointState();
|
2018-10-12 02:29:11 +02:00
|
|
|
CheckAlphaTests();
|
2018-06-09 00:05:52 +02:00
|
|
|
|
2018-03-24 08:59:51 +01:00
|
|
|
// TODO(bunnei): Sync framebuffer_scale uniform here
|
|
|
|
// TODO(bunnei): Sync scissorbox uniform(s) here
|
2018-03-27 04:54:16 +02:00
|
|
|
|
2018-03-24 08:59:51 +01:00
|
|
|
// Draw the vertex batch
|
|
|
|
const bool is_indexed = accelerate_draw == AccelDraw::Indexed;
|
2018-04-13 20:18:37 +02:00
|
|
|
|
2018-08-29 00:27:03 +02:00
|
|
|
state.draw.vertex_buffer = buffer_cache.GetHandle();
|
2018-03-24 08:59:51 +01:00
|
|
|
state.Apply();
|
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
std::size_t buffer_size = CalculateVertexArraysSize();
|
2018-04-22 02:19:33 +02:00
|
|
|
|
2018-10-02 19:47:26 +02:00
|
|
|
// Add space for index buffer (keeping in mind non-core primitives)
|
|
|
|
switch (regs.draw.topology) {
|
|
|
|
case Maxwell::PrimitiveTopology::Quads:
|
|
|
|
buffer_size = Common::AlignUp<std::size_t>(buffer_size, 4) +
|
|
|
|
primitive_assembler.CalculateQuadSize(regs.vertex_buffer.count);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
if (is_indexed) {
|
|
|
|
buffer_size = Common::AlignUp<std::size_t>(buffer_size, 4) + CalculateIndexBufferSize();
|
|
|
|
}
|
|
|
|
break;
|
2018-03-24 08:59:51 +01:00
|
|
|
}
|
2018-04-08 06:00:11 +02:00
|
|
|
|
|
|
|
// Uniform space for the 5 shader stages
|
2018-08-10 09:45:38 +02:00
|
|
|
buffer_size =
|
2018-09-15 15:21:06 +02:00
|
|
|
Common::AlignUp<std::size_t>(buffer_size, 4) +
|
2018-08-10 09:45:38 +02:00
|
|
|
(sizeof(GLShader::MaxwellUniformData) + uniform_buffer_alignment) * Maxwell::MaxShaderStage;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-08-10 10:29:37 +02:00
|
|
|
// Add space for at least 18 constant buffers
|
|
|
|
buffer_size += Maxwell::MaxConstBuffers * (MaxConstbufferSize + uniform_buffer_alignment);
|
|
|
|
|
2018-08-29 00:27:03 +02:00
|
|
|
buffer_cache.Map(buffer_size);
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-08-29 00:27:03 +02:00
|
|
|
SetupVertexArrays();
|
2018-10-02 19:47:26 +02:00
|
|
|
DrawParameters params = SetupDraw();
|
2018-10-07 04:17:31 +02:00
|
|
|
SetupShaders(params.primitive_mode);
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-08-29 00:27:03 +02:00
|
|
|
buffer_cache.Unmap();
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-04-07 11:22:08 +02:00
|
|
|
shader_program_manager->ApplyTo(state);
|
|
|
|
state.Apply();
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-10-02 19:47:26 +02:00
|
|
|
// Execute draw call
|
|
|
|
params.DispatchDraw();
|
2018-03-24 08:59:51 +01:00
|
|
|
|
|
|
|
// Disable scissor test
|
|
|
|
state.scissor.enabled = false;
|
|
|
|
|
|
|
|
accelerate_draw = AccelDraw::Disabled;
|
|
|
|
|
|
|
|
// Unbind textures for potential future use as framebuffer attachments
|
|
|
|
for (auto& texture_unit : state.texture_units) {
|
2018-06-26 22:58:35 +02:00
|
|
|
texture_unit.Unbind();
|
2018-03-24 08:59:51 +01:00
|
|
|
}
|
|
|
|
state.Apply();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-09-08 10:05:56 +02:00
|
|
|
void RasterizerOpenGL::FlushAll() {}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-10-13 04:31:04 +02:00
|
|
|
void RasterizerOpenGL::FlushRegion(VAddr addr, u64 size) {
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
2018-10-14 22:09:01 +02:00
|
|
|
|
2018-10-16 23:02:29 +02:00
|
|
|
if (Settings::values.use_accurate_gpu_emulation) {
|
|
|
|
// Only flush if use_accurate_gpu_emulation is enabled, as it incurs a performance hit
|
2018-10-14 22:09:01 +02:00
|
|
|
res_cache.FlushRegion(addr, size);
|
|
|
|
}
|
2018-10-13 04:31:04 +02:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-08-28 03:35:15 +02:00
|
|
|
void RasterizerOpenGL::InvalidateRegion(VAddr addr, u64 size) {
|
2018-06-26 22:14:14 +02:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
|
|
|
res_cache.InvalidateRegion(addr, size);
|
2018-08-23 23:30:27 +02:00
|
|
|
shader_cache.InvalidateRegion(addr, size);
|
2018-08-29 00:27:03 +02:00
|
|
|
buffer_cache.InvalidateRegion(addr, size);
|
2018-06-26 22:14:14 +02:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-08-28 03:35:15 +02:00
|
|
|
void RasterizerOpenGL::FlushAndInvalidateRegion(VAddr addr, u64 size) {
|
2018-10-13 04:31:04 +02:00
|
|
|
FlushRegion(addr, size);
|
2018-08-23 21:44:41 +02:00
|
|
|
InvalidateRegion(addr, size);
|
2018-06-26 22:14:14 +02:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-10-06 05:39:03 +02:00
|
|
|
bool RasterizerOpenGL::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Regs::Surface& src,
|
|
|
|
const Tegra::Engines::Fermi2D::Regs::Surface& dst) {
|
2018-03-20 04:00:59 +01:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_Blits);
|
2018-10-18 02:32:29 +02:00
|
|
|
|
|
|
|
if (Settings::values.use_accurate_gpu_emulation) {
|
|
|
|
// Skip the accelerated copy and perform a slow but more accurate copy
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-10-06 05:39:03 +02:00
|
|
|
res_cache.FermiCopySurface(src, dst);
|
2018-03-20 04:00:59 +01:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool RasterizerOpenGL::AccelerateFill(const void* config) {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2018-06-24 23:42:29 +02:00
|
|
|
bool RasterizerOpenGL::AccelerateDisplay(const Tegra::FramebufferConfig& config,
|
2018-08-21 01:34:02 +02:00
|
|
|
VAddr framebuffer_addr, u32 pixel_stride) {
|
2018-06-24 23:42:29 +02:00
|
|
|
if (!framebuffer_addr) {
|
|
|
|
return {};
|
|
|
|
}
|
|
|
|
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
|
|
|
|
|
|
|
const auto& surface{res_cache.TryFindFramebufferSurface(framebuffer_addr)};
|
|
|
|
if (!surface) {
|
|
|
|
return {};
|
|
|
|
}
|
|
|
|
|
|
|
|
// Verify that the cached surface is the same size and format as the requested framebuffer
|
|
|
|
const auto& params{surface->GetSurfaceParams()};
|
|
|
|
const auto& pixel_format{SurfaceParams::PixelFormatFromGPUPixelFormat(config.pixel_format)};
|
|
|
|
ASSERT_MSG(params.width == config.width, "Framebuffer width is different");
|
|
|
|
ASSERT_MSG(params.height == config.height, "Framebuffer height is different");
|
|
|
|
ASSERT_MSG(params.pixel_format == pixel_format, "Framebuffer pixel_format is different");
|
|
|
|
|
|
|
|
screen_info.display_texture = surface->Texture().handle;
|
|
|
|
|
|
|
|
return true;
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-03-27 04:42:54 +02:00
|
|
|
void RasterizerOpenGL::SamplerInfo::Create() {
|
|
|
|
sampler.Create();
|
|
|
|
mag_filter = min_filter = Tegra::Texture::TextureFilter::Linear;
|
2018-09-06 05:25:06 +02:00
|
|
|
wrap_u = wrap_v = wrap_p = Tegra::Texture::WrapMode::Wrap;
|
2018-09-19 07:18:20 +02:00
|
|
|
uses_depth_compare = false;
|
|
|
|
depth_compare_func = Tegra::Texture::DepthCompareFunc::Never;
|
2018-03-27 04:42:54 +02:00
|
|
|
|
|
|
|
// default is GL_LINEAR_MIPMAP_LINEAR
|
|
|
|
glSamplerParameteri(sampler.handle, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
|
|
|
|
// Other attributes have correct defaults
|
2018-09-19 07:18:20 +02:00
|
|
|
glSamplerParameteri(sampler.handle, GL_TEXTURE_COMPARE_FUNC, GL_NEVER);
|
2018-03-27 04:42:54 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SamplerInfo::SyncWithConfig(const Tegra::Texture::TSCEntry& config) {
|
2018-09-08 08:59:59 +02:00
|
|
|
const GLuint s = sampler.handle;
|
2018-03-27 04:42:54 +02:00
|
|
|
|
|
|
|
if (mag_filter != config.mag_filter) {
|
|
|
|
mag_filter = config.mag_filter;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_MAG_FILTER, MaxwellToGL::TextureFilterMode(mag_filter));
|
|
|
|
}
|
|
|
|
if (min_filter != config.min_filter) {
|
|
|
|
min_filter = config.min_filter;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_MIN_FILTER, MaxwellToGL::TextureFilterMode(min_filter));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (wrap_u != config.wrap_u) {
|
|
|
|
wrap_u = config.wrap_u;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_WRAP_S, MaxwellToGL::WrapMode(wrap_u));
|
|
|
|
}
|
|
|
|
if (wrap_v != config.wrap_v) {
|
|
|
|
wrap_v = config.wrap_v;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_WRAP_T, MaxwellToGL::WrapMode(wrap_v));
|
|
|
|
}
|
2018-09-06 05:25:06 +02:00
|
|
|
if (wrap_p != config.wrap_p) {
|
|
|
|
wrap_p = config.wrap_p;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_WRAP_R, MaxwellToGL::WrapMode(wrap_p));
|
|
|
|
}
|
2018-03-27 04:42:54 +02:00
|
|
|
|
2018-09-19 07:18:20 +02:00
|
|
|
if (uses_depth_compare != (config.depth_compare_enabled == 1)) {
|
|
|
|
uses_depth_compare = (config.depth_compare_enabled == 1);
|
|
|
|
if (uses_depth_compare) {
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_COMPARE_MODE, GL_COMPARE_REF_TO_TEXTURE);
|
|
|
|
} else {
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_COMPARE_MODE, GL_NONE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (depth_compare_func != config.depth_compare_func) {
|
|
|
|
depth_compare_func = config.depth_compare_func;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_COMPARE_FUNC,
|
|
|
|
MaxwellToGL::DepthCompareFunc(depth_compare_func));
|
|
|
|
}
|
|
|
|
|
2018-09-06 05:25:06 +02:00
|
|
|
if (wrap_u == Tegra::Texture::WrapMode::Border || wrap_v == Tegra::Texture::WrapMode::Border ||
|
|
|
|
wrap_p == Tegra::Texture::WrapMode::Border) {
|
2018-07-24 05:26:48 +02:00
|
|
|
const GLvec4 new_border_color = {{config.border_color_r, config.border_color_g,
|
|
|
|
config.border_color_b, config.border_color_a}};
|
|
|
|
if (border_color != new_border_color) {
|
|
|
|
border_color = new_border_color;
|
|
|
|
glSamplerParameterfv(s, GL_TEXTURE_BORDER_COLOR, border_color.data());
|
|
|
|
}
|
2018-03-27 04:42:54 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-08-29 00:27:03 +02:00
|
|
|
u32 RasterizerOpenGL::SetupConstBuffers(Maxwell::ShaderStage stage, Shader& shader,
|
2018-10-07 04:17:31 +02:00
|
|
|
GLenum primitive_mode, u32 current_bindpoint) {
|
2018-09-04 11:02:59 +02:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_UBO);
|
2018-07-21 00:31:36 +02:00
|
|
|
const auto& gpu = Core::System::GetInstance().GPU();
|
|
|
|
const auto& maxwell3d = gpu.Maxwell3D();
|
2018-09-15 15:21:06 +02:00
|
|
|
const auto& shader_stage = maxwell3d.state.shader_stages[static_cast<std::size_t>(stage)];
|
2018-08-23 23:30:27 +02:00
|
|
|
const auto& entries = shader->GetShaderEntries().const_buffer_entries;
|
2018-04-15 18:15:54 +02:00
|
|
|
|
2018-09-13 02:27:43 +02:00
|
|
|
constexpr u64 max_binds = Tegra::Engines::Maxwell3D::Regs::MaxConstBuffers;
|
|
|
|
std::array<GLuint, max_binds> bind_buffers;
|
|
|
|
std::array<GLintptr, max_binds> bind_offsets;
|
|
|
|
std::array<GLsizeiptr, max_binds> bind_sizes;
|
|
|
|
|
|
|
|
ASSERT_MSG(entries.size() <= max_binds, "Exceeded expected number of binding points.");
|
|
|
|
|
2018-08-23 23:30:27 +02:00
|
|
|
// Upload only the enabled buffers from the 16 constbuffers of each shader stage
|
2018-04-15 18:15:54 +02:00
|
|
|
for (u32 bindpoint = 0; bindpoint < entries.size(); ++bindpoint) {
|
|
|
|
const auto& used_buffer = entries[bindpoint];
|
|
|
|
const auto& buffer = shader_stage.const_buffers[used_buffer.GetIndex()];
|
|
|
|
|
2018-08-08 08:07:44 +02:00
|
|
|
if (!buffer.enabled) {
|
2018-09-13 02:27:43 +02:00
|
|
|
// With disabled buffers set values as zero to unbind them
|
|
|
|
bind_buffers[bindpoint] = 0;
|
|
|
|
bind_offsets[bindpoint] = 0;
|
|
|
|
bind_sizes[bindpoint] = 0;
|
2018-08-08 08:07:44 +02:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
std::size_t size = 0;
|
2018-06-10 01:02:05 +02:00
|
|
|
|
2018-06-06 05:34:37 +02:00
|
|
|
if (used_buffer.IsIndirect()) {
|
|
|
|
// Buffer is accessed indirectly, so upload the entire thing
|
2018-08-15 00:54:05 +02:00
|
|
|
size = buffer.size;
|
2018-06-27 05:07:34 +02:00
|
|
|
|
|
|
|
if (size > MaxConstbufferSize) {
|
2018-08-15 00:54:05 +02:00
|
|
|
LOG_CRITICAL(HW_GPU, "indirect constbuffer size {} exceeds maximum {}", size,
|
|
|
|
MaxConstbufferSize);
|
2018-06-27 05:07:34 +02:00
|
|
|
size = MaxConstbufferSize;
|
|
|
|
}
|
2018-06-06 05:34:37 +02:00
|
|
|
} else {
|
|
|
|
// Buffer is accessed directly, upload just what we use
|
2018-06-10 01:02:05 +02:00
|
|
|
size = used_buffer.GetSize() * sizeof(float);
|
2018-06-06 05:34:37 +02:00
|
|
|
}
|
|
|
|
|
2018-06-10 01:02:05 +02:00
|
|
|
// Align the actual size so it ends up being a multiple of vec4 to meet the OpenGL std140
|
|
|
|
// UBO alignment requirements.
|
|
|
|
size = Common::AlignUp(size, sizeof(GLvec4));
|
|
|
|
ASSERT_MSG(size <= MaxConstbufferSize, "Constbuffer too big");
|
|
|
|
|
2018-08-29 00:27:03 +02:00
|
|
|
GLintptr const_buffer_offset = buffer_cache.UploadMemory(
|
2018-09-15 15:21:06 +02:00
|
|
|
buffer.address, size, static_cast<std::size_t>(uniform_buffer_alignment));
|
2018-04-15 18:18:09 +02:00
|
|
|
|
2018-04-15 21:14:57 +02:00
|
|
|
// Now configure the bindpoint of the buffer inside the shader
|
2018-10-07 04:17:31 +02:00
|
|
|
glUniformBlockBinding(shader->GetProgramHandle(primitive_mode),
|
2018-09-04 20:55:34 +02:00
|
|
|
shader->GetProgramResourceIndex(used_buffer),
|
2018-08-23 23:30:27 +02:00
|
|
|
current_bindpoint + bindpoint);
|
2018-09-13 02:27:43 +02:00
|
|
|
|
|
|
|
// Prepare values for multibind
|
|
|
|
bind_buffers[bindpoint] = buffer_cache.GetHandle();
|
|
|
|
bind_offsets[bindpoint] = const_buffer_offset;
|
|
|
|
bind_sizes[bindpoint] = size;
|
2018-04-14 18:50:15 +02:00
|
|
|
}
|
|
|
|
|
2018-09-13 02:27:43 +02:00
|
|
|
glBindBuffersRange(GL_UNIFORM_BUFFER, current_bindpoint, static_cast<GLsizei>(entries.size()),
|
|
|
|
bind_buffers.data(), bind_offsets.data(), bind_sizes.data());
|
|
|
|
|
2018-08-29 00:27:03 +02:00
|
|
|
return current_bindpoint + static_cast<u32>(entries.size());
|
2018-04-14 18:50:15 +02:00
|
|
|
}
|
|
|
|
|
2018-10-07 04:17:31 +02:00
|
|
|
u32 RasterizerOpenGL::SetupTextures(Maxwell::ShaderStage stage, Shader& shader,
|
|
|
|
GLenum primitive_mode, u32 current_unit) {
|
2018-09-04 11:02:59 +02:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_Texture);
|
2018-07-21 00:31:36 +02:00
|
|
|
const auto& gpu = Core::System::GetInstance().GPU();
|
|
|
|
const auto& maxwell3d = gpu.Maxwell3D();
|
2018-08-23 23:30:27 +02:00
|
|
|
const auto& entries = shader->GetShaderEntries().texture_samplers;
|
2018-06-06 19:58:16 +02:00
|
|
|
|
|
|
|
ASSERT_MSG(current_unit + entries.size() <= std::size(state.texture_units),
|
|
|
|
"Exceeded the number of active textures.");
|
|
|
|
|
|
|
|
for (u32 bindpoint = 0; bindpoint < entries.size(); ++bindpoint) {
|
|
|
|
const auto& entry = entries[bindpoint];
|
2018-09-08 08:59:59 +02:00
|
|
|
const u32 current_bindpoint = current_unit + bindpoint;
|
2018-06-06 19:58:16 +02:00
|
|
|
|
|
|
|
// Bind the uniform to the sampler.
|
2018-07-04 22:20:12 +02:00
|
|
|
|
2018-10-07 04:17:31 +02:00
|
|
|
glProgramUniform1i(shader->GetProgramHandle(primitive_mode),
|
|
|
|
shader->GetUniformLocation(entry), current_bindpoint);
|
2018-06-06 19:58:16 +02:00
|
|
|
|
|
|
|
const auto texture = maxwell3d.GetStageTexture(entry.GetStage(), entry.GetOffset());
|
2018-07-02 16:43:38 +02:00
|
|
|
|
|
|
|
if (!texture.enabled) {
|
2018-09-01 05:54:31 +02:00
|
|
|
state.texture_units[current_bindpoint].texture = 0;
|
2018-07-02 16:43:38 +02:00
|
|
|
continue;
|
|
|
|
}
|
2018-06-06 19:58:16 +02:00
|
|
|
|
|
|
|
texture_samplers[current_bindpoint].SyncWithConfig(texture.tsc);
|
2018-09-14 17:42:28 +02:00
|
|
|
Surface surface = res_cache.GetTextureSurface(texture, entry);
|
2018-06-06 19:58:16 +02:00
|
|
|
if (surface != nullptr) {
|
2018-09-01 05:54:31 +02:00
|
|
|
state.texture_units[current_bindpoint].texture = surface->Texture().handle;
|
2018-09-01 08:42:43 +02:00
|
|
|
state.texture_units[current_bindpoint].target = surface->Target();
|
2018-06-07 01:28:09 +02:00
|
|
|
state.texture_units[current_bindpoint].swizzle.r =
|
|
|
|
MaxwellToGL::SwizzleSource(texture.tic.x_source);
|
|
|
|
state.texture_units[current_bindpoint].swizzle.g =
|
|
|
|
MaxwellToGL::SwizzleSource(texture.tic.y_source);
|
|
|
|
state.texture_units[current_bindpoint].swizzle.b =
|
|
|
|
MaxwellToGL::SwizzleSource(texture.tic.z_source);
|
|
|
|
state.texture_units[current_bindpoint].swizzle.a =
|
|
|
|
MaxwellToGL::SwizzleSource(texture.tic.w_source);
|
2018-06-06 19:58:16 +02:00
|
|
|
} else {
|
|
|
|
// Can occur when texture addr is null or its memory is unmapped/invalid
|
2018-09-01 05:54:31 +02:00
|
|
|
state.texture_units[current_bindpoint].texture = 0;
|
2018-06-06 19:58:16 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-20 18:39:10 +02:00
|
|
|
return current_unit + static_cast<u32>(entries.size());
|
2018-06-06 19:58:16 +02:00
|
|
|
}
|
|
|
|
|
2018-09-10 01:01:21 +02:00
|
|
|
void RasterizerOpenGL::SyncViewport() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-06-04 23:36:54 +02:00
|
|
|
const MathUtil::Rectangle<s32> viewport_rect{regs.viewport_transform[0].GetRect()};
|
2018-03-27 02:45:10 +02:00
|
|
|
|
2018-09-10 01:01:21 +02:00
|
|
|
state.viewport.x = viewport_rect.left;
|
|
|
|
state.viewport.y = viewport_rect.bottom;
|
2018-06-22 01:36:01 +02:00
|
|
|
state.viewport.width = static_cast<GLsizei>(viewport_rect.GetWidth());
|
|
|
|
state.viewport.height = static_cast<GLsizei>(viewport_rect.GetHeight());
|
2018-03-27 02:45:10 +02:00
|
|
|
}
|
|
|
|
|
2018-03-20 04:00:59 +01:00
|
|
|
void RasterizerOpenGL::SyncClipEnabled() {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncClipCoef() {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncCullMode() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-07-02 20:33:41 +02:00
|
|
|
|
2018-08-10 16:39:46 +02:00
|
|
|
state.cull.enabled = regs.cull.enabled != 0;
|
2018-07-03 04:22:25 +02:00
|
|
|
|
|
|
|
if (state.cull.enabled) {
|
|
|
|
state.cull.front_face = MaxwellToGL::FrontFace(regs.cull.front_face);
|
|
|
|
state.cull.mode = MaxwellToGL::CullFace(regs.cull.cull_face);
|
2018-07-04 17:26:46 +02:00
|
|
|
|
2018-07-08 18:27:15 +02:00
|
|
|
const bool flip_triangles{regs.screen_y_control.triangle_rast_flip == 0 ||
|
|
|
|
regs.viewport_transform[0].scale_y < 0.0f};
|
|
|
|
|
2018-07-04 17:26:46 +02:00
|
|
|
// If the GPU is configured to flip the rasterized triangles, then we need to flip the
|
|
|
|
// notion of front and back. Note: We flip the triangles when the value of the register is 0
|
|
|
|
// because OpenGL already does it for us.
|
2018-07-08 18:27:15 +02:00
|
|
|
if (flip_triangles) {
|
2018-07-04 17:26:46 +02:00
|
|
|
if (state.cull.front_face == GL_CCW)
|
|
|
|
state.cull.front_face = GL_CW;
|
|
|
|
else if (state.cull.front_face == GL_CW)
|
|
|
|
state.cull.front_face = GL_CCW;
|
|
|
|
}
|
2018-07-03 04:22:25 +02:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncDepthScale() {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncDepthOffset() {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-07-02 20:33:06 +02:00
|
|
|
void RasterizerOpenGL::SyncDepthTestState() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-07-02 20:33:06 +02:00
|
|
|
|
|
|
|
state.depth.test_enabled = regs.depth_test_enable != 0;
|
|
|
|
state.depth.write_mask = regs.depth_write_enabled ? GL_TRUE : GL_FALSE;
|
2018-07-03 04:02:46 +02:00
|
|
|
|
|
|
|
if (!state.depth.test_enabled)
|
|
|
|
return;
|
|
|
|
|
2018-07-02 20:33:06 +02:00
|
|
|
state.depth.test_func = MaxwellToGL::ComparisonOp(regs.depth_test_func);
|
|
|
|
}
|
|
|
|
|
2018-08-22 06:35:31 +02:00
|
|
|
void RasterizerOpenGL::SyncStencilTestState() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
state.stencil.test_enabled = regs.stencil_enable != 0;
|
|
|
|
|
|
|
|
if (!regs.stencil_enable) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
// TODO(bunnei): Verify behavior when this is not set
|
|
|
|
ASSERT(regs.stencil_two_side_enable);
|
|
|
|
|
|
|
|
state.stencil.front.test_func = MaxwellToGL::ComparisonOp(regs.stencil_front_func_func);
|
|
|
|
state.stencil.front.test_ref = regs.stencil_front_func_ref;
|
|
|
|
state.stencil.front.test_mask = regs.stencil_front_func_mask;
|
|
|
|
state.stencil.front.action_stencil_fail = MaxwellToGL::StencilOp(regs.stencil_front_op_fail);
|
|
|
|
state.stencil.front.action_depth_fail = MaxwellToGL::StencilOp(regs.stencil_front_op_zfail);
|
|
|
|
state.stencil.front.action_depth_pass = MaxwellToGL::StencilOp(regs.stencil_front_op_zpass);
|
|
|
|
state.stencil.front.write_mask = regs.stencil_front_mask;
|
|
|
|
|
|
|
|
state.stencil.back.test_func = MaxwellToGL::ComparisonOp(regs.stencil_back_func_func);
|
|
|
|
state.stencil.back.test_ref = regs.stencil_back_func_ref;
|
|
|
|
state.stencil.back.test_mask = regs.stencil_back_func_mask;
|
|
|
|
state.stencil.back.action_stencil_fail = MaxwellToGL::StencilOp(regs.stencil_back_op_fail);
|
|
|
|
state.stencil.back.action_depth_fail = MaxwellToGL::StencilOp(regs.stencil_back_op_zfail);
|
|
|
|
state.stencil.back.action_depth_pass = MaxwellToGL::StencilOp(regs.stencil_back_op_zpass);
|
|
|
|
state.stencil.back.write_mask = regs.stencil_back_mask;
|
|
|
|
}
|
|
|
|
|
2018-06-09 00:05:52 +02:00
|
|
|
void RasterizerOpenGL::SyncBlendState() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-06-09 00:05:52 +02:00
|
|
|
// TODO(Subv): Support more than just render target 0.
|
|
|
|
state.blend.enabled = regs.blend.enable[0] != 0;
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-06-09 00:05:52 +02:00
|
|
|
if (!state.blend.enabled)
|
|
|
|
return;
|
|
|
|
|
2018-08-21 01:44:47 +02:00
|
|
|
ASSERT_MSG(regs.logic_op.enable == 0,
|
|
|
|
"Blending and logic op can't be enabled at the same time.");
|
|
|
|
|
2018-06-18 09:24:52 +02:00
|
|
|
ASSERT_MSG(regs.independent_blend_enable == 1, "Only independent blending is implemented");
|
2018-06-09 00:05:52 +02:00
|
|
|
ASSERT_MSG(!regs.independent_blend[0].separate_alpha, "Unimplemented");
|
|
|
|
state.blend.rgb_equation = MaxwellToGL::BlendEquation(regs.independent_blend[0].equation_rgb);
|
|
|
|
state.blend.src_rgb_func = MaxwellToGL::BlendFunc(regs.independent_blend[0].factor_source_rgb);
|
|
|
|
state.blend.dst_rgb_func = MaxwellToGL::BlendFunc(regs.independent_blend[0].factor_dest_rgb);
|
|
|
|
state.blend.a_equation = MaxwellToGL::BlendEquation(regs.independent_blend[0].equation_a);
|
|
|
|
state.blend.src_a_func = MaxwellToGL::BlendFunc(regs.independent_blend[0].factor_source_a);
|
|
|
|
state.blend.dst_a_func = MaxwellToGL::BlendFunc(regs.independent_blend[0].factor_dest_a);
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
2018-08-21 01:44:47 +02:00
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncLogicOpState() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
|
|
|
// TODO(Subv): Support more than just render target 0.
|
|
|
|
state.logic_op.enabled = regs.logic_op.enable != 0;
|
|
|
|
|
|
|
|
if (!state.logic_op.enabled)
|
|
|
|
return;
|
|
|
|
|
2018-08-24 04:59:50 +02:00
|
|
|
ASSERT_MSG(regs.blend.enable[0] == 0,
|
|
|
|
"Blending and logic op can't be enabled at the same time.");
|
2018-08-21 01:44:47 +02:00
|
|
|
|
|
|
|
state.logic_op.operation = MaxwellToGL::LogicOp(regs.logic_op.operation);
|
|
|
|
}
|
2018-08-21 10:18:27 +02:00
|
|
|
|
2018-10-09 02:49:36 +02:00
|
|
|
void RasterizerOpenGL::SyncScissorTest() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
2018-10-09 03:21:22 +02:00
|
|
|
state.scissor.enabled = (regs.scissor_test.enable != 0);
|
|
|
|
// TODO(Blinkhawk): Figure if the hardware supports scissor testing per viewport and how it's
|
|
|
|
// implemented.
|
2018-10-09 02:49:36 +02:00
|
|
|
if (regs.scissor_test.enable != 0) {
|
2018-10-09 03:21:22 +02:00
|
|
|
const u32 width = regs.scissor_test.max_x - regs.scissor_test.min_x;
|
|
|
|
const u32 height = regs.scissor_test.max_y - regs.scissor_test.min_y;
|
|
|
|
state.scissor.x = regs.scissor_test.min_x;
|
|
|
|
state.scissor.y = regs.scissor_test.min_y;
|
|
|
|
state.scissor.width = width;
|
|
|
|
state.scissor.height = height;
|
2018-10-09 02:49:36 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-09-26 00:41:21 +02:00
|
|
|
void RasterizerOpenGL::SyncTransformFeedback() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
|
|
|
if (regs.tfb_enabled != 0) {
|
|
|
|
LOG_CRITICAL(Render_OpenGL, "Transform feedbacks are not implemented");
|
|
|
|
UNREACHABLE();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-09-28 06:31:01 +02:00
|
|
|
void RasterizerOpenGL::SyncPointState() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
2018-10-01 06:18:24 +02:00
|
|
|
// TODO(Rodrigo): Most games do not set a point size. I think this is a case of a
|
|
|
|
// register carrying a default value. For now, if the point size is zero, assume it's
|
|
|
|
// OpenGL's default (1).
|
|
|
|
state.point.size = regs.point_size == 0 ? 1 : regs.point_size;
|
2018-09-28 06:31:01 +02:00
|
|
|
}
|
|
|
|
|
2018-10-12 02:29:11 +02:00
|
|
|
void RasterizerOpenGL::CheckAlphaTests() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
|
|
|
if (regs.alpha_test_enabled != 0 && regs.rt_control.count > 1) {
|
|
|
|
LOG_CRITICAL(
|
|
|
|
Render_OpenGL,
|
|
|
|
"Alpha Testing is enabled with Multiple Render Targets, this behavior is undefined.");
|
|
|
|
UNREACHABLE();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-08-21 10:18:27 +02:00
|
|
|
} // namespace OpenGL
|