2018-03-20 04:00:59 +01:00
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// Copyright 2015 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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2018-04-20 05:01:50 +02:00
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#include <algorithm>
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2018-03-20 04:00:59 +01:00
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#include <memory>
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#include <string>
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2018-07-24 18:10:35 +02:00
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#include <string_view>
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2018-03-20 04:00:59 +01:00
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#include <tuple>
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#include <utility>
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#include <glad/glad.h>
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#include "common/alignment.h"
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "common/math_util.h"
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#include "common/microprofile.h"
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2018-03-24 07:01:03 +01:00
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#include "core/core.h"
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2018-06-29 20:10:16 +02:00
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#include "core/frontend/emu_window.h"
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2018-03-24 07:01:03 +01:00
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#include "core/hle/kernel/process.h"
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2018-03-20 04:00:59 +01:00
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#include "core/settings.h"
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2018-03-24 07:01:03 +01:00
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#include "video_core/engines/maxwell_3d.h"
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2018-03-20 04:00:59 +01:00
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#include "video_core/renderer_opengl/gl_rasterizer.h"
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#include "video_core/renderer_opengl/gl_shader_gen.h"
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2018-03-25 04:38:08 +02:00
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#include "video_core/renderer_opengl/maxwell_to_gl.h"
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2018-03-20 04:00:59 +01:00
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#include "video_core/renderer_opengl/renderer_opengl.h"
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2018-06-29 20:10:16 +02:00
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#include "video_core/video_core.h"
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2018-03-20 04:00:59 +01:00
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2018-03-24 09:06:26 +01:00
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using Maxwell = Tegra::Engines::Maxwell3D::Regs;
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2018-03-20 04:00:59 +01:00
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using PixelFormat = SurfaceParams::PixelFormat;
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using SurfaceType = SurfaceParams::SurfaceType;
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MICROPROFILE_DEFINE(OpenGL_VAO, "OpenGL", "Vertex Array Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_VS, "OpenGL", "Vertex Shader Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_FS, "OpenGL", "Fragment Shader Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_Drawing, "OpenGL", "Drawing", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_Blits, "OpenGL", "Blits", MP_RGB(100, 100, 255));
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MICROPROFILE_DEFINE(OpenGL_CacheManagement, "OpenGL", "Cache Mgmt", MP_RGB(100, 255, 100));
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2018-08-12 02:20:19 +02:00
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RasterizerOpenGL::RasterizerOpenGL(Core::Frontend::EmuWindow& window) : emu_window{window} {
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2018-03-27 04:44:03 +02:00
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// Create sampler objects
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for (size_t i = 0; i < texture_samplers.size(); ++i) {
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texture_samplers[i].Create();
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state.texture_units[i].sampler = texture_samplers[i].sampler.handle;
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}
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2018-04-14 18:45:23 +02:00
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// Create SSBOs
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for (size_t stage = 0; stage < ssbos.size(); ++stage) {
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for (size_t buffer = 0; buffer < ssbos[stage].size(); ++buffer) {
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ssbos[stage][buffer].Create();
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state.draw.const_buffers[stage][buffer].ssbo = ssbos[stage][buffer].handle;
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}
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}
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2018-03-20 04:00:59 +01:00
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GLint ext_num;
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glGetIntegerv(GL_NUM_EXTENSIONS, &ext_num);
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for (GLint i = 0; i < ext_num; i++) {
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2018-07-24 18:10:35 +02:00
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const std::string_view extension{
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reinterpret_cast<const char*>(glGetStringi(GL_EXTENSIONS, i))};
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2018-03-20 04:00:59 +01:00
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if (extension == "GL_ARB_buffer_storage") {
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has_ARB_buffer_storage = true;
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} else if (extension == "GL_ARB_direct_state_access") {
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has_ARB_direct_state_access = true;
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} else if (extension == "GL_ARB_separate_shader_objects") {
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has_ARB_separate_shader_objects = true;
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} else if (extension == "GL_ARB_vertex_attrib_binding") {
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has_ARB_vertex_attrib_binding = true;
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}
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}
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2018-04-07 11:22:08 +02:00
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ASSERT_MSG(has_ARB_separate_shader_objects, "has_ARB_separate_shader_objects is unsupported");
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2018-03-20 04:00:59 +01:00
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// Clipping plane 0 is always enabled for PICA fixed clip plane z <= 0
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state.clip_distance[0] = true;
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2018-05-19 18:36:09 +02:00
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// Generate VAO and UBO
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2018-03-20 04:00:59 +01:00
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sw_vao.Create();
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uniform_buffer.Create();
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state.draw.vertex_array = sw_vao.handle;
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state.draw.uniform_buffer = uniform_buffer.handle;
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state.Apply();
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// Create render framebuffer
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framebuffer.Create();
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2018-04-07 11:22:08 +02:00
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hw_vao.Create();
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2018-03-20 04:00:59 +01:00
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2018-04-07 11:22:08 +02:00
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stream_buffer = OGLStreamBuffer::MakeBuffer(has_ARB_buffer_storage, GL_ARRAY_BUFFER);
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stream_buffer->Create(STREAM_BUFFER_SIZE, STREAM_BUFFER_SIZE / 2);
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state.draw.vertex_buffer = stream_buffer->GetHandle();
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2018-03-20 04:00:59 +01:00
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2018-04-07 11:22:08 +02:00
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shader_program_manager = std::make_unique<GLShader::ProgramManager>();
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state.draw.shader_program = 0;
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state.draw.vertex_array = hw_vao.handle;
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state.Apply();
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2018-03-20 04:00:59 +01:00
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2018-04-07 11:22:08 +02:00
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glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, stream_buffer->GetHandle());
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2018-03-20 04:00:59 +01:00
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2018-04-08 06:00:11 +02:00
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for (unsigned index = 0; index < uniform_buffers.size(); ++index) {
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auto& buffer = uniform_buffers[index];
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buffer.Create();
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glBindBuffer(GL_UNIFORM_BUFFER, buffer.handle);
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glBufferData(GL_UNIFORM_BUFFER, sizeof(GLShader::MaxwellUniformData), nullptr,
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GL_STREAM_COPY);
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glBindBufferBase(GL_UNIFORM_BUFFER, index, buffer.handle);
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}
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2018-03-20 04:00:59 +01:00
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glEnable(GL_BLEND);
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2018-07-02 18:13:26 +02:00
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LOG_CRITICAL(Render_OpenGL, "Sync fixed function OpenGL state here!");
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2018-03-20 04:00:59 +01:00
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}
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RasterizerOpenGL::~RasterizerOpenGL() {
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if (stream_buffer != nullptr) {
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state.draw.vertex_buffer = stream_buffer->GetHandle();
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state.Apply();
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stream_buffer->Release();
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}
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}
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2018-04-22 02:19:33 +02:00
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std::pair<u8*, GLintptr> RasterizerOpenGL::SetupVertexArrays(u8* array_ptr,
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GLintptr buffer_offset) {
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2018-03-20 04:00:59 +01:00
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MICROPROFILE_SCOPE(OpenGL_VAO);
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2018-07-19 00:10:06 +02:00
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const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
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const auto& memory_manager = Core::System::GetInstance().GPU().memory_manager;
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2018-03-25 03:29:47 +02:00
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state.draw.vertex_array = hw_vao.handle;
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state.draw.vertex_buffer = stream_buffer->GetHandle();
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state.Apply();
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2018-04-22 02:19:33 +02:00
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// Upload all guest vertex arrays sequentially to our buffer
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for (u32 index = 0; index < Maxwell::NumVertexArrays; ++index) {
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const auto& vertex_array = regs.vertex_array[index];
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if (!vertex_array.IsEnabled())
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continue;
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const Tegra::GPUVAddr start = vertex_array.StartAddress();
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const Tegra::GPUVAddr end = regs.vertex_array_limit[index].LimitAddress();
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ASSERT(end > start);
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u64 size = end - start + 1;
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// Copy vertex array data
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2018-04-24 06:19:36 +02:00
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Memory::ReadBlock(*memory_manager->GpuToCpuAddress(start), array_ptr, size);
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2018-04-22 02:19:33 +02:00
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// Bind the vertex array to the buffer at the current offset.
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glBindVertexBuffer(index, stream_buffer->GetHandle(), buffer_offset, vertex_array.stride);
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ASSERT_MSG(vertex_array.divisor == 0, "Vertex buffer divisor unimplemented");
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array_ptr += size;
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buffer_offset += size;
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2018-03-25 03:29:47 +02:00
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}
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// Use the vertex array as-is, assumes that the data is formatted correctly for OpenGL.
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// Enables the first 16 vertex attributes always, as we don't know which ones are actually used
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2018-04-22 02:19:33 +02:00
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// until shader time. Note, Tegra technically supports 32, but we're capping this to 16 for now
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2018-03-25 03:29:47 +02:00
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// to avoid OpenGL errors.
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2018-04-22 02:19:33 +02:00
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// TODO(Subv): Analyze the shader to identify which attributes are actually used and don't
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// assume every shader uses them all.
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2018-03-25 03:29:47 +02:00
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for (unsigned index = 0; index < 16; ++index) {
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auto& attrib = regs.vertex_attrib_format[index];
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2018-08-12 03:36:40 +02:00
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// Ignore invalid attributes.
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if (!attrib.IsValid())
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continue;
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auto& buffer = regs.vertex_array[attrib.buffer];
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2018-08-08 07:08:27 +02:00
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LOG_TRACE(HW_GPU, "vertex attrib {}, count={}, size={}, type={}, offset={}, normalize={}",
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2018-07-02 18:20:50 +02:00
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index, attrib.ComponentCount(), attrib.SizeString(), attrib.TypeString(),
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attrib.offset.Value(), attrib.IsNormalized());
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2018-04-13 20:18:37 +02:00
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2018-04-22 02:19:33 +02:00
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ASSERT(buffer.IsEnabled());
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2018-03-25 03:29:47 +02:00
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glEnableVertexAttribArray(index);
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2018-08-05 03:29:21 +02:00
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if (attrib.type == Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::SignedInt ||
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2018-08-05 03:36:55 +02:00
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attrib.type == Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::UnsignedInt) {
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2018-08-05 03:29:21 +02:00
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glVertexAttribIFormat(index, attrib.ComponentCount(), MaxwellToGL::VertexType(attrib),
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attrib.offset);
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2018-08-05 03:36:55 +02:00
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} else {
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2018-08-05 03:29:21 +02:00
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glVertexAttribFormat(index, attrib.ComponentCount(), MaxwellToGL::VertexType(attrib),
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attrib.IsNormalized() ? GL_TRUE : GL_FALSE, attrib.offset);
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2018-08-05 03:36:55 +02:00
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}
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2018-04-22 02:19:33 +02:00
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glVertexAttribBinding(index, attrib.buffer);
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2018-03-25 03:29:47 +02:00
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}
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2018-04-22 02:19:33 +02:00
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return {array_ptr, buffer_offset};
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2018-03-20 04:00:59 +01:00
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}
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2018-07-13 04:25:03 +02:00
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static GLShader::ProgramCode GetShaderProgramCode(Maxwell::ShaderProgram program) {
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2018-07-19 00:10:06 +02:00
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auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
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2018-07-13 04:25:03 +02:00
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// Fetch program code from memory
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GLShader::ProgramCode program_code;
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auto& shader_config = gpu.regs.shader_config[static_cast<size_t>(program)];
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const u64 gpu_address{gpu.regs.code_address.CodeAddress() + shader_config.offset};
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const boost::optional<VAddr> cpu_address{gpu.memory_manager.GpuToCpuAddress(gpu_address)};
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Memory::ReadBlock(*cpu_address, program_code.data(), program_code.size() * sizeof(u64));
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return program_code;
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}
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2018-04-22 02:19:33 +02:00
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void RasterizerOpenGL::SetupShaders(u8* buffer_ptr, GLintptr buffer_offset) {
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2018-04-08 06:00:11 +02:00
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// Helper function for uploading uniform data
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const auto copy_buffer = [&](GLuint handle, GLintptr offset, GLsizeiptr size) {
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if (has_ARB_direct_state_access) {
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glCopyNamedBufferSubData(stream_buffer->GetHandle(), handle, offset, 0, size);
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} else {
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glBindBuffer(GL_COPY_WRITE_BUFFER, handle);
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glCopyBufferSubData(GL_ARRAY_BUFFER, GL_COPY_WRITE_BUFFER, offset, 0, size);
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}
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};
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2018-07-19 00:10:06 +02:00
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auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
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2018-04-08 06:00:11 +02:00
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2018-06-06 19:58:16 +02:00
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// Next available bindpoints to use when uploading the const buffers and textures to the GLSL
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2018-06-10 01:02:05 +02:00
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// shaders. The constbuffer bindpoint starts after the shader stage configuration bind points.
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2018-08-12 02:30:42 +02:00
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u32 current_constbuffer_bindpoint = static_cast<u32>(uniform_buffers.size());
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2018-06-06 19:58:16 +02:00
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u32 current_texture_bindpoint = 0;
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2018-04-15 21:14:57 +02:00
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2018-07-13 04:25:03 +02:00
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for (size_t index = 0; index < Maxwell::MaxShaderProgram; ++index) {
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2018-04-08 06:00:11 +02:00
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auto& shader_config = gpu.regs.shader_config[index];
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const Maxwell::ShaderProgram program{static_cast<Maxwell::ShaderProgram>(index)};
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// Skip stages that are not enabled
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2018-07-13 04:57:57 +02:00
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if (!gpu.regs.IsShaderConfigEnabled(index)) {
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2018-04-08 06:00:11 +02:00
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continue;
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}
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2018-03-20 04:00:59 +01:00
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2018-07-13 04:57:57 +02:00
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const size_t stage{index == 0 ? 0 : index - 1}; // Stage indices are 0 - 5
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2018-06-07 15:33:23 +02:00
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GLShader::MaxwellUniformData ubo{};
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ubo.SetFromRegs(gpu.state.shader_stages[stage]);
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std::memcpy(buffer_ptr, &ubo, sizeof(ubo));
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2018-06-08 19:22:39 +02:00
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// Flush the buffer so that the GPU can see the data we just wrote.
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glFlushMappedBufferRange(GL_ARRAY_BUFFER, buffer_offset, sizeof(ubo));
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2018-04-08 06:00:11 +02:00
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// Upload uniform data as one UBO per stage
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2018-04-22 02:19:33 +02:00
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const GLintptr ubo_offset = buffer_offset;
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2018-04-08 06:00:11 +02:00
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copy_buffer(uniform_buffers[stage].handle, ubo_offset,
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sizeof(GLShader::MaxwellUniformData));
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2018-04-22 02:19:33 +02:00
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buffer_ptr += sizeof(GLShader::MaxwellUniformData);
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buffer_offset += sizeof(GLShader::MaxwellUniformData);
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2018-07-13 04:25:03 +02:00
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GLShader::ShaderSetup setup{GetShaderProgramCode(program)};
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2018-04-15 18:15:54 +02:00
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GLShader::ShaderEntries shader_resources;
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2018-04-08 06:00:11 +02:00
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switch (program) {
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2018-07-13 04:25:03 +02:00
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case Maxwell::ShaderProgram::VertexA: {
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// VertexB is always enabled, so when VertexA is enabled, we have two vertex shaders.
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// Conventional HW does not support this, so we combine VertexA and VertexB into one
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// stage here.
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setup.SetProgramB(GetShaderProgramCode(Maxwell::ShaderProgram::VertexB));
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GLShader::MaxwellVSConfig vs_config{setup};
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shader_resources =
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shader_program_manager->UseProgrammableVertexShader(vs_config, setup);
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break;
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}
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2018-04-08 06:00:11 +02:00
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case Maxwell::ShaderProgram::VertexB: {
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GLShader::MaxwellVSConfig vs_config{setup};
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2018-04-15 18:15:54 +02:00
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shader_resources =
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shader_program_manager->UseProgrammableVertexShader(vs_config, setup);
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2018-04-08 06:00:11 +02:00
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break;
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}
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|
|
case Maxwell::ShaderProgram::Fragment: {
|
|
|
|
GLShader::MaxwellFSConfig fs_config{setup};
|
2018-04-15 18:15:54 +02:00
|
|
|
shader_resources =
|
|
|
|
shader_program_manager->UseProgrammableFragmentShader(fs_config, setup);
|
2018-04-08 06:00:11 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
2018-07-02 18:20:50 +02:00
|
|
|
LOG_CRITICAL(HW_GPU, "Unimplemented shader index={}, enable={}, offset=0x{:08X}", index,
|
|
|
|
shader_config.enable.Value(), shader_config.offset);
|
2018-04-08 06:00:11 +02:00
|
|
|
UNREACHABLE();
|
|
|
|
}
|
2018-04-15 18:15:54 +02:00
|
|
|
|
2018-04-15 21:14:57 +02:00
|
|
|
GLuint gl_stage_program = shader_program_manager->GetCurrentProgramStage(
|
|
|
|
static_cast<Maxwell::ShaderStage>(stage));
|
|
|
|
|
2018-04-15 18:15:54 +02:00
|
|
|
// Configure the const buffers for this shader stage.
|
2018-04-15 21:42:23 +02:00
|
|
|
current_constbuffer_bindpoint =
|
|
|
|
SetupConstBuffers(static_cast<Maxwell::ShaderStage>(stage), gl_stage_program,
|
|
|
|
current_constbuffer_bindpoint, shader_resources.const_buffer_entries);
|
2018-06-06 19:58:16 +02:00
|
|
|
|
|
|
|
// Configure the textures for this shader stage.
|
|
|
|
current_texture_bindpoint =
|
|
|
|
SetupTextures(static_cast<Maxwell::ShaderStage>(stage), gl_stage_program,
|
|
|
|
current_texture_bindpoint, shader_resources.texture_samplers);
|
2018-07-13 04:25:03 +02:00
|
|
|
|
|
|
|
// When VertexA is enabled, we have dual vertex shaders
|
|
|
|
if (program == Maxwell::ShaderProgram::VertexA) {
|
|
|
|
// VertexB was combined with VertexA, so we skip the VertexB iteration
|
|
|
|
index++;
|
|
|
|
}
|
2018-04-08 06:00:11 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
shader_program_manager->UseTrivialGeometryShader();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-04-22 02:19:33 +02:00
|
|
|
size_t RasterizerOpenGL::CalculateVertexArraysSize() const {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-04-22 02:19:33 +02:00
|
|
|
|
|
|
|
size_t size = 0;
|
|
|
|
for (u32 index = 0; index < Maxwell::NumVertexArrays; ++index) {
|
|
|
|
if (!regs.vertex_array[index].IsEnabled())
|
|
|
|
continue;
|
|
|
|
|
|
|
|
const Tegra::GPUVAddr start = regs.vertex_array[index].StartAddress();
|
|
|
|
const Tegra::GPUVAddr end = regs.vertex_array_limit[index].LimitAddress();
|
|
|
|
|
|
|
|
ASSERT(end > start);
|
|
|
|
size += end - start + 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
2018-03-20 04:00:59 +01:00
|
|
|
bool RasterizerOpenGL::AccelerateDrawBatch(bool is_indexed) {
|
|
|
|
accelerate_draw = is_indexed ? AccelDraw::Indexed : AccelDraw::Arrays;
|
2018-03-25 04:50:21 +02:00
|
|
|
DrawArrays();
|
2018-03-20 04:00:59 +01:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2018-07-04 05:32:59 +02:00
|
|
|
std::pair<Surface, Surface> RasterizerOpenGL::ConfigureFramebuffers(bool using_color_fb,
|
|
|
|
bool using_depth_fb) {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-08-08 08:35:00 +02:00
|
|
|
if (regs.rt[0].format == Tegra::RenderTargetFormat::NONE) {
|
|
|
|
LOG_ERROR(HW_GPU, "RenderTargetFormat is not configured");
|
|
|
|
using_color_fb = false;
|
|
|
|
}
|
|
|
|
|
2018-07-02 20:33:41 +02:00
|
|
|
// TODO(bunnei): Implement this
|
2018-03-24 08:59:51 +01:00
|
|
|
const bool has_stencil = false;
|
2018-07-02 19:42:04 +02:00
|
|
|
|
2018-03-24 08:59:51 +01:00
|
|
|
const bool write_color_fb =
|
|
|
|
state.color_mask.red_enabled == GL_TRUE || state.color_mask.green_enabled == GL_TRUE ||
|
|
|
|
state.color_mask.blue_enabled == GL_TRUE || state.color_mask.alpha_enabled == GL_TRUE;
|
|
|
|
|
|
|
|
const bool write_depth_fb =
|
|
|
|
(state.depth.test_enabled && state.depth.write_mask == GL_TRUE) ||
|
|
|
|
(has_stencil && state.stencil.test_enabled && state.stencil.write_mask != 0);
|
|
|
|
|
|
|
|
Surface color_surface;
|
|
|
|
Surface depth_surface;
|
|
|
|
MathUtil::Rectangle<u32> surfaces_rect;
|
|
|
|
std::tie(color_surface, depth_surface, surfaces_rect) =
|
2018-08-10 02:54:04 +02:00
|
|
|
res_cache.GetFramebufferSurfaces(using_color_fb, using_depth_fb);
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-08-10 02:54:04 +02:00
|
|
|
const MathUtil::Rectangle<s32> viewport_rect{regs.viewport_transform[0].GetRect()};
|
|
|
|
const MathUtil::Rectangle<u32> draw_rect{
|
2018-06-22 01:36:01 +02:00
|
|
|
static_cast<u32>(std::clamp<s32>(static_cast<s32>(surfaces_rect.left) + viewport_rect.left,
|
|
|
|
surfaces_rect.left, surfaces_rect.right)), // Left
|
|
|
|
static_cast<u32>(std::clamp<s32>(static_cast<s32>(surfaces_rect.bottom) + viewport_rect.top,
|
|
|
|
surfaces_rect.bottom, surfaces_rect.top)), // Top
|
|
|
|
static_cast<u32>(std::clamp<s32>(static_cast<s32>(surfaces_rect.left) + viewport_rect.right,
|
|
|
|
surfaces_rect.left, surfaces_rect.right)), // Right
|
2018-04-20 05:01:50 +02:00
|
|
|
static_cast<u32>(
|
2018-06-22 01:36:01 +02:00
|
|
|
std::clamp<s32>(static_cast<s32>(surfaces_rect.bottom) + viewport_rect.bottom,
|
|
|
|
surfaces_rect.bottom, surfaces_rect.top))}; // Bottom
|
2018-03-24 08:59:51 +01:00
|
|
|
|
|
|
|
// Bind the framebuffer surfaces
|
2018-03-27 02:58:19 +02:00
|
|
|
BindFramebufferSurfaces(color_surface, depth_surface, has_stencil);
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-06-22 01:36:01 +02:00
|
|
|
SyncViewport(surfaces_rect);
|
2018-03-27 04:54:16 +02:00
|
|
|
|
2018-03-24 08:59:51 +01:00
|
|
|
// Viewport can have negative offsets or larger dimensions than our framebuffer sub-rect. Enable
|
|
|
|
// scissor test to prevent drawing outside of the framebuffer region
|
|
|
|
state.scissor.enabled = true;
|
|
|
|
state.scissor.x = draw_rect.left;
|
|
|
|
state.scissor.y = draw_rect.bottom;
|
|
|
|
state.scissor.width = draw_rect.GetWidth();
|
|
|
|
state.scissor.height = draw_rect.GetHeight();
|
|
|
|
state.Apply();
|
|
|
|
|
2018-07-03 23:55:44 +02:00
|
|
|
// Only return the surface to be marked as dirty if writing to it is enabled.
|
|
|
|
return std::make_pair(write_color_fb ? color_surface : nullptr,
|
|
|
|
write_depth_fb ? depth_surface : nullptr);
|
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::Clear() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-07-03 23:55:44 +02:00
|
|
|
|
2018-07-04 05:32:59 +02:00
|
|
|
bool use_color_fb = false;
|
|
|
|
bool use_depth_fb = false;
|
|
|
|
|
2018-07-03 23:55:44 +02:00
|
|
|
GLbitfield clear_mask = 0;
|
|
|
|
if (regs.clear_buffers.R && regs.clear_buffers.G && regs.clear_buffers.B &&
|
|
|
|
regs.clear_buffers.A) {
|
|
|
|
clear_mask |= GL_COLOR_BUFFER_BIT;
|
2018-07-04 05:32:59 +02:00
|
|
|
use_color_fb = true;
|
2018-07-03 23:55:44 +02:00
|
|
|
}
|
2018-07-04 05:32:59 +02:00
|
|
|
if (regs.clear_buffers.Z) {
|
2018-07-03 23:55:44 +02:00
|
|
|
clear_mask |= GL_DEPTH_BUFFER_BIT;
|
2018-07-21 08:14:04 +02:00
|
|
|
use_depth_fb = regs.zeta_enable != 0;
|
2018-07-14 07:52:23 +02:00
|
|
|
|
|
|
|
// Always enable the depth write when clearing the depth buffer. The depth write mask is
|
|
|
|
// ignored when clearing the buffer in the Switch, but OpenGL obeys it so we set it to true.
|
|
|
|
state.depth.test_enabled = true;
|
|
|
|
state.depth.write_mask = GL_TRUE;
|
|
|
|
state.depth.test_func = GL_ALWAYS;
|
|
|
|
state.Apply();
|
2018-07-04 05:32:59 +02:00
|
|
|
}
|
2018-07-03 23:55:44 +02:00
|
|
|
|
|
|
|
if (clear_mask == 0)
|
|
|
|
return;
|
|
|
|
|
2018-08-02 02:59:42 +02:00
|
|
|
ScopeAcquireGLContext acquire_context{emu_window};
|
2018-06-29 20:10:16 +02:00
|
|
|
|
2018-07-04 05:32:59 +02:00
|
|
|
auto [dirty_color_surface, dirty_depth_surface] =
|
|
|
|
ConfigureFramebuffers(use_color_fb, use_depth_fb);
|
2018-07-03 23:55:44 +02:00
|
|
|
|
2018-06-07 06:54:25 +02:00
|
|
|
// TODO(Subv): Support clearing only partial colors.
|
|
|
|
glClearColor(regs.clear_color[0], regs.clear_color[1], regs.clear_color[2],
|
|
|
|
regs.clear_color[3]);
|
|
|
|
glClearDepth(regs.clear_depth);
|
|
|
|
|
|
|
|
glClear(clear_mask);
|
|
|
|
|
|
|
|
// Mark framebuffer surfaces as dirty
|
2018-07-21 20:36:32 +02:00
|
|
|
if (Settings::values.use_accurate_framebuffers) {
|
|
|
|
if (dirty_color_surface != nullptr) {
|
|
|
|
res_cache.FlushSurface(dirty_color_surface);
|
|
|
|
}
|
|
|
|
if (dirty_depth_surface != nullptr) {
|
|
|
|
res_cache.FlushSurface(dirty_depth_surface);
|
|
|
|
}
|
2018-06-07 06:54:25 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-03-25 04:50:21 +02:00
|
|
|
void RasterizerOpenGL::DrawArrays() {
|
2018-03-24 08:59:51 +01:00
|
|
|
if (accelerate_draw == AccelDraw::Disabled)
|
|
|
|
return;
|
|
|
|
|
2018-03-20 04:00:59 +01:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_Drawing);
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-08-02 02:59:42 +02:00
|
|
|
ScopeAcquireGLContext acquire_context{emu_window};
|
2018-06-29 20:10:16 +02:00
|
|
|
|
2018-07-04 05:32:59 +02:00
|
|
|
auto [dirty_color_surface, dirty_depth_surface] =
|
2018-07-21 08:14:04 +02:00
|
|
|
ConfigureFramebuffers(true, regs.zeta.Address() != 0 && regs.zeta_enable != 0);
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-07-14 07:52:23 +02:00
|
|
|
SyncDepthTestState();
|
2018-06-09 00:05:52 +02:00
|
|
|
SyncBlendState();
|
2018-07-02 20:33:41 +02:00
|
|
|
SyncCullMode();
|
2018-06-09 00:05:52 +02:00
|
|
|
|
2018-03-24 08:59:51 +01:00
|
|
|
// TODO(bunnei): Sync framebuffer_scale uniform here
|
|
|
|
// TODO(bunnei): Sync scissorbox uniform(s) here
|
2018-03-27 04:54:16 +02:00
|
|
|
|
2018-03-24 08:59:51 +01:00
|
|
|
// Draw the vertex batch
|
|
|
|
const bool is_indexed = accelerate_draw == AccelDraw::Indexed;
|
2018-04-13 20:18:37 +02:00
|
|
|
const u64 index_buffer_size{regs.index_array.count * regs.index_array.FormatSizeInBytes()};
|
|
|
|
const unsigned vertex_num{is_indexed ? regs.index_array.count : regs.vertex_buffer.count};
|
|
|
|
|
2018-03-24 08:59:51 +01:00
|
|
|
state.draw.vertex_buffer = stream_buffer->GetHandle();
|
|
|
|
state.Apply();
|
|
|
|
|
2018-04-22 02:19:33 +02:00
|
|
|
size_t buffer_size = CalculateVertexArraysSize();
|
|
|
|
|
2018-03-24 08:59:51 +01:00
|
|
|
if (is_indexed) {
|
2018-04-22 02:19:33 +02:00
|
|
|
buffer_size = Common::AlignUp<size_t>(buffer_size, 4) + index_buffer_size;
|
2018-03-24 08:59:51 +01:00
|
|
|
}
|
2018-04-08 06:00:11 +02:00
|
|
|
|
|
|
|
// Uniform space for the 5 shader stages
|
2018-04-22 02:19:33 +02:00
|
|
|
buffer_size = Common::AlignUp<size_t>(buffer_size, 4) +
|
|
|
|
sizeof(GLShader::MaxwellUniformData) * Maxwell::MaxShaderStage;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
|
|
|
u8* buffer_ptr;
|
|
|
|
GLintptr buffer_offset;
|
|
|
|
std::tie(buffer_ptr, buffer_offset) =
|
|
|
|
stream_buffer->Map(static_cast<GLsizeiptr>(buffer_size), 4);
|
|
|
|
|
2018-04-22 02:19:33 +02:00
|
|
|
u8* offseted_buffer;
|
|
|
|
std::tie(offseted_buffer, buffer_offset) = SetupVertexArrays(buffer_ptr, buffer_offset);
|
|
|
|
|
|
|
|
offseted_buffer =
|
|
|
|
reinterpret_cast<u8*>(Common::AlignUp(reinterpret_cast<size_t>(offseted_buffer), 4));
|
|
|
|
buffer_offset = Common::AlignUp<size_t>(buffer_offset, 4);
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-04-13 20:18:37 +02:00
|
|
|
// If indexed mode, copy the index buffer
|
2018-03-24 08:59:51 +01:00
|
|
|
GLintptr index_buffer_offset = 0;
|
|
|
|
if (is_indexed) {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& memory_manager = Core::System::GetInstance().GPU().memory_manager;
|
2018-04-21 18:31:30 +02:00
|
|
|
const boost::optional<VAddr> index_data_addr{
|
2018-04-21 17:16:21 +02:00
|
|
|
memory_manager->GpuToCpuAddress(regs.index_array.StartAddress())};
|
2018-04-21 18:31:30 +02:00
|
|
|
Memory::ReadBlock(*index_data_addr, offseted_buffer, index_buffer_size);
|
2018-04-13 20:18:37 +02:00
|
|
|
|
2018-04-22 02:19:33 +02:00
|
|
|
index_buffer_offset = buffer_offset;
|
|
|
|
offseted_buffer += index_buffer_size;
|
|
|
|
buffer_offset += index_buffer_size;
|
2018-03-24 08:59:51 +01:00
|
|
|
}
|
|
|
|
|
2018-04-22 02:19:33 +02:00
|
|
|
offseted_buffer =
|
|
|
|
reinterpret_cast<u8*>(Common::AlignUp(reinterpret_cast<size_t>(offseted_buffer), 4));
|
|
|
|
buffer_offset = Common::AlignUp<size_t>(buffer_offset, 4);
|
|
|
|
|
|
|
|
SetupShaders(offseted_buffer, buffer_offset);
|
2018-03-24 08:59:51 +01:00
|
|
|
|
|
|
|
stream_buffer->Unmap();
|
|
|
|
|
2018-04-07 11:22:08 +02:00
|
|
|
shader_program_manager->ApplyTo(state);
|
|
|
|
state.Apply();
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-04-13 20:18:37 +02:00
|
|
|
const GLenum primitive_mode{MaxwellToGL::PrimitiveTopology(regs.draw.topology)};
|
2018-03-24 08:59:51 +01:00
|
|
|
if (is_indexed) {
|
2018-07-02 18:22:17 +02:00
|
|
|
const GLint base_vertex{static_cast<GLint>(regs.vb_element_base)};
|
|
|
|
|
|
|
|
// Adjust the index buffer offset so it points to the first desired index.
|
|
|
|
index_buffer_offset += regs.index_array.first * regs.index_array.FormatSizeInBytes();
|
|
|
|
|
|
|
|
glDrawElementsBaseVertex(primitive_mode, regs.index_array.count,
|
|
|
|
MaxwellToGL::IndexFormat(regs.index_array.format),
|
|
|
|
reinterpret_cast<const void*>(index_buffer_offset), base_vertex);
|
2018-03-24 08:59:51 +01:00
|
|
|
} else {
|
2018-07-02 18:23:36 +02:00
|
|
|
glDrawArrays(primitive_mode, regs.vertex_buffer.first, regs.vertex_buffer.count);
|
2018-03-24 08:59:51 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
// Disable scissor test
|
|
|
|
state.scissor.enabled = false;
|
|
|
|
|
|
|
|
accelerate_draw = AccelDraw::Disabled;
|
|
|
|
|
|
|
|
// Unbind textures for potential future use as framebuffer attachments
|
|
|
|
for (auto& texture_unit : state.texture_units) {
|
2018-06-26 22:58:35 +02:00
|
|
|
texture_unit.Unbind();
|
2018-03-24 08:59:51 +01:00
|
|
|
}
|
|
|
|
state.Apply();
|
|
|
|
|
|
|
|
// Mark framebuffer surfaces as dirty
|
2018-07-21 20:36:32 +02:00
|
|
|
if (Settings::values.use_accurate_framebuffers) {
|
|
|
|
if (dirty_color_surface != nullptr) {
|
|
|
|
res_cache.FlushSurface(dirty_color_surface);
|
|
|
|
}
|
|
|
|
if (dirty_depth_surface != nullptr) {
|
|
|
|
res_cache.FlushSurface(dirty_depth_surface);
|
|
|
|
}
|
2018-03-24 08:59:51 +01:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-06-09 00:04:41 +02:00
|
|
|
void RasterizerOpenGL::NotifyMaxwellRegisterChanged(u32 method) {}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-06-26 22:14:14 +02:00
|
|
|
void RasterizerOpenGL::FlushAll() {
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
|
|
|
res_cache.FlushRegion(0, Kernel::VMManager::MAX_ADDRESS);
|
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-06-26 22:14:14 +02:00
|
|
|
void RasterizerOpenGL::FlushRegion(Tegra::GPUVAddr addr, u64 size) {
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
|
|
|
res_cache.FlushRegion(addr, size);
|
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-06-26 22:14:14 +02:00
|
|
|
void RasterizerOpenGL::InvalidateRegion(Tegra::GPUVAddr addr, u64 size) {
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
|
|
|
res_cache.InvalidateRegion(addr, size);
|
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-06-26 22:14:14 +02:00
|
|
|
void RasterizerOpenGL::FlushAndInvalidateRegion(Tegra::GPUVAddr addr, u64 size) {
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
|
|
|
res_cache.FlushRegion(addr, size);
|
|
|
|
res_cache.InvalidateRegion(addr, size);
|
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
|
|
|
bool RasterizerOpenGL::AccelerateDisplayTransfer(const void* config) {
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_Blits);
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool RasterizerOpenGL::AccelerateTextureCopy(const void* config) {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool RasterizerOpenGL::AccelerateFill(const void* config) {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2018-06-24 23:42:29 +02:00
|
|
|
bool RasterizerOpenGL::AccelerateDisplay(const Tegra::FramebufferConfig& config,
|
2018-03-23 02:13:46 +01:00
|
|
|
VAddr framebuffer_addr, u32 pixel_stride,
|
2018-03-23 02:04:30 +01:00
|
|
|
ScreenInfo& screen_info) {
|
2018-06-24 23:42:29 +02:00
|
|
|
if (!framebuffer_addr) {
|
|
|
|
return {};
|
|
|
|
}
|
|
|
|
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
|
|
|
|
|
|
|
const auto& surface{res_cache.TryFindFramebufferSurface(framebuffer_addr)};
|
|
|
|
if (!surface) {
|
|
|
|
return {};
|
|
|
|
}
|
|
|
|
|
|
|
|
// Verify that the cached surface is the same size and format as the requested framebuffer
|
|
|
|
const auto& params{surface->GetSurfaceParams()};
|
|
|
|
const auto& pixel_format{SurfaceParams::PixelFormatFromGPUPixelFormat(config.pixel_format)};
|
|
|
|
ASSERT_MSG(params.width == config.width, "Framebuffer width is different");
|
|
|
|
ASSERT_MSG(params.height == config.height, "Framebuffer height is different");
|
|
|
|
ASSERT_MSG(params.pixel_format == pixel_format, "Framebuffer pixel_format is different");
|
|
|
|
|
|
|
|
screen_info.display_texture = surface->Texture().handle;
|
|
|
|
|
|
|
|
return true;
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-03-27 04:42:54 +02:00
|
|
|
void RasterizerOpenGL::SamplerInfo::Create() {
|
|
|
|
sampler.Create();
|
|
|
|
mag_filter = min_filter = Tegra::Texture::TextureFilter::Linear;
|
|
|
|
wrap_u = wrap_v = Tegra::Texture::WrapMode::Wrap;
|
|
|
|
|
|
|
|
// default is GL_LINEAR_MIPMAP_LINEAR
|
|
|
|
glSamplerParameteri(sampler.handle, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
|
|
|
|
// Other attributes have correct defaults
|
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SamplerInfo::SyncWithConfig(const Tegra::Texture::TSCEntry& config) {
|
|
|
|
GLuint s = sampler.handle;
|
|
|
|
|
|
|
|
if (mag_filter != config.mag_filter) {
|
|
|
|
mag_filter = config.mag_filter;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_MAG_FILTER, MaxwellToGL::TextureFilterMode(mag_filter));
|
|
|
|
}
|
|
|
|
if (min_filter != config.min_filter) {
|
|
|
|
min_filter = config.min_filter;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_MIN_FILTER, MaxwellToGL::TextureFilterMode(min_filter));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (wrap_u != config.wrap_u) {
|
|
|
|
wrap_u = config.wrap_u;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_WRAP_S, MaxwellToGL::WrapMode(wrap_u));
|
|
|
|
}
|
|
|
|
if (wrap_v != config.wrap_v) {
|
|
|
|
wrap_v = config.wrap_v;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_WRAP_T, MaxwellToGL::WrapMode(wrap_v));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (wrap_u == Tegra::Texture::WrapMode::Border || wrap_v == Tegra::Texture::WrapMode::Border) {
|
2018-07-24 05:26:48 +02:00
|
|
|
const GLvec4 new_border_color = {{config.border_color_r, config.border_color_g,
|
|
|
|
config.border_color_b, config.border_color_a}};
|
|
|
|
if (border_color != new_border_color) {
|
|
|
|
border_color = new_border_color;
|
|
|
|
glSamplerParameterfv(s, GL_TEXTURE_BORDER_COLOR, border_color.data());
|
|
|
|
}
|
2018-03-27 04:42:54 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-04-15 21:14:57 +02:00
|
|
|
u32 RasterizerOpenGL::SetupConstBuffers(Maxwell::ShaderStage stage, GLuint program,
|
2018-04-15 21:42:23 +02:00
|
|
|
u32 current_bindpoint,
|
2018-04-15 21:14:57 +02:00
|
|
|
const std::vector<GLShader::ConstBufferEntry>& entries) {
|
2018-07-21 00:31:36 +02:00
|
|
|
const auto& gpu = Core::System::GetInstance().GPU();
|
|
|
|
const auto& maxwell3d = gpu.Maxwell3D();
|
2018-04-14 18:50:15 +02:00
|
|
|
|
2018-04-15 18:15:54 +02:00
|
|
|
// Reset all buffer draw state for this stage.
|
|
|
|
for (auto& buffer : state.draw.const_buffers[static_cast<size_t>(stage)]) {
|
|
|
|
buffer.bindpoint = 0;
|
|
|
|
buffer.enabled = false;
|
|
|
|
}
|
2018-04-14 18:50:15 +02:00
|
|
|
|
2018-04-15 18:15:54 +02:00
|
|
|
// Upload only the enabled buffers from the 16 constbuffers of each shader stage
|
2018-07-21 00:31:36 +02:00
|
|
|
const auto& shader_stage = maxwell3d.state.shader_stages[static_cast<size_t>(stage)];
|
2018-04-15 18:15:54 +02:00
|
|
|
|
|
|
|
for (u32 bindpoint = 0; bindpoint < entries.size(); ++bindpoint) {
|
|
|
|
const auto& used_buffer = entries[bindpoint];
|
|
|
|
const auto& buffer = shader_stage.const_buffers[used_buffer.GetIndex()];
|
|
|
|
auto& buffer_draw_state =
|
|
|
|
state.draw.const_buffers[static_cast<size_t>(stage)][used_buffer.GetIndex()];
|
|
|
|
|
2018-08-08 08:07:44 +02:00
|
|
|
if (!buffer.enabled) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2018-04-15 18:15:54 +02:00
|
|
|
buffer_draw_state.enabled = true;
|
2018-04-15 21:14:57 +02:00
|
|
|
buffer_draw_state.bindpoint = current_bindpoint + bindpoint;
|
2018-04-15 18:15:54 +02:00
|
|
|
|
2018-04-21 18:31:30 +02:00
|
|
|
boost::optional<VAddr> addr = gpu.memory_manager->GpuToCpuAddress(buffer.address);
|
2018-06-06 05:34:37 +02:00
|
|
|
|
2018-06-10 01:02:05 +02:00
|
|
|
size_t size = 0;
|
|
|
|
|
2018-06-06 05:34:37 +02:00
|
|
|
if (used_buffer.IsIndirect()) {
|
|
|
|
// Buffer is accessed indirectly, so upload the entire thing
|
2018-06-10 01:02:05 +02:00
|
|
|
size = buffer.size * sizeof(float);
|
2018-06-27 05:07:34 +02:00
|
|
|
|
|
|
|
if (size > MaxConstbufferSize) {
|
2018-07-02 18:13:26 +02:00
|
|
|
LOG_ERROR(HW_GPU, "indirect constbuffer size {} exceeds maximum {}", size,
|
2018-07-02 18:20:50 +02:00
|
|
|
MaxConstbufferSize);
|
2018-06-27 05:07:34 +02:00
|
|
|
size = MaxConstbufferSize;
|
|
|
|
}
|
2018-06-06 05:34:37 +02:00
|
|
|
} else {
|
|
|
|
// Buffer is accessed directly, upload just what we use
|
2018-06-10 01:02:05 +02:00
|
|
|
size = used_buffer.GetSize() * sizeof(float);
|
2018-06-06 05:34:37 +02:00
|
|
|
}
|
|
|
|
|
2018-06-10 01:02:05 +02:00
|
|
|
// Align the actual size so it ends up being a multiple of vec4 to meet the OpenGL std140
|
|
|
|
// UBO alignment requirements.
|
|
|
|
size = Common::AlignUp(size, sizeof(GLvec4));
|
|
|
|
ASSERT_MSG(size <= MaxConstbufferSize, "Constbuffer too big");
|
|
|
|
|
|
|
|
std::vector<u8> data(size);
|
2018-04-21 18:31:30 +02:00
|
|
|
Memory::ReadBlock(*addr, data.data(), data.size());
|
2018-04-15 18:18:09 +02:00
|
|
|
|
2018-06-10 01:02:05 +02:00
|
|
|
glBindBuffer(GL_UNIFORM_BUFFER, buffer_draw_state.ssbo);
|
|
|
|
glBufferData(GL_UNIFORM_BUFFER, data.size(), data.data(), GL_DYNAMIC_DRAW);
|
|
|
|
glBindBuffer(GL_UNIFORM_BUFFER, 0);
|
2018-04-15 21:14:57 +02:00
|
|
|
|
|
|
|
// Now configure the bindpoint of the buffer inside the shader
|
2018-07-24 18:19:39 +02:00
|
|
|
const std::string buffer_name = used_buffer.GetName();
|
|
|
|
const GLuint index =
|
|
|
|
glGetProgramResourceIndex(program, GL_UNIFORM_BLOCK, buffer_name.c_str());
|
|
|
|
if (index != GL_INVALID_INDEX) {
|
2018-06-10 01:02:05 +02:00
|
|
|
glUniformBlockBinding(program, index, buffer_draw_state.bindpoint);
|
2018-07-24 18:19:39 +02:00
|
|
|
}
|
2018-04-14 18:50:15 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
state.Apply();
|
2018-04-15 21:14:57 +02:00
|
|
|
|
2018-06-20 18:39:10 +02:00
|
|
|
return current_bindpoint + static_cast<u32>(entries.size());
|
2018-04-14 18:50:15 +02:00
|
|
|
}
|
|
|
|
|
2018-06-06 19:58:16 +02:00
|
|
|
u32 RasterizerOpenGL::SetupTextures(Maxwell::ShaderStage stage, GLuint program, u32 current_unit,
|
|
|
|
const std::vector<GLShader::SamplerEntry>& entries) {
|
2018-07-21 00:31:36 +02:00
|
|
|
const auto& gpu = Core::System::GetInstance().GPU();
|
|
|
|
const auto& maxwell3d = gpu.Maxwell3D();
|
2018-06-06 19:58:16 +02:00
|
|
|
|
|
|
|
ASSERT_MSG(current_unit + entries.size() <= std::size(state.texture_units),
|
|
|
|
"Exceeded the number of active textures.");
|
|
|
|
|
|
|
|
for (u32 bindpoint = 0; bindpoint < entries.size(); ++bindpoint) {
|
|
|
|
const auto& entry = entries[bindpoint];
|
|
|
|
u32 current_bindpoint = current_unit + bindpoint;
|
|
|
|
|
|
|
|
// Bind the uniform to the sampler.
|
|
|
|
GLint uniform = glGetUniformLocation(program, entry.GetName().c_str());
|
2018-07-04 22:20:12 +02:00
|
|
|
if (uniform == -1) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2018-06-06 19:58:16 +02:00
|
|
|
glProgramUniform1i(program, uniform, current_bindpoint);
|
|
|
|
|
|
|
|
const auto texture = maxwell3d.GetStageTexture(entry.GetStage(), entry.GetOffset());
|
2018-07-02 16:43:38 +02:00
|
|
|
|
|
|
|
if (!texture.enabled) {
|
|
|
|
state.texture_units[current_bindpoint].texture_2d = 0;
|
|
|
|
continue;
|
|
|
|
}
|
2018-06-06 19:58:16 +02:00
|
|
|
|
|
|
|
texture_samplers[current_bindpoint].SyncWithConfig(texture.tsc);
|
|
|
|
Surface surface = res_cache.GetTextureSurface(texture);
|
|
|
|
if (surface != nullptr) {
|
2018-06-22 01:36:01 +02:00
|
|
|
state.texture_units[current_bindpoint].texture_2d = surface->Texture().handle;
|
2018-06-07 01:28:09 +02:00
|
|
|
state.texture_units[current_bindpoint].swizzle.r =
|
|
|
|
MaxwellToGL::SwizzleSource(texture.tic.x_source);
|
|
|
|
state.texture_units[current_bindpoint].swizzle.g =
|
|
|
|
MaxwellToGL::SwizzleSource(texture.tic.y_source);
|
|
|
|
state.texture_units[current_bindpoint].swizzle.b =
|
|
|
|
MaxwellToGL::SwizzleSource(texture.tic.z_source);
|
|
|
|
state.texture_units[current_bindpoint].swizzle.a =
|
|
|
|
MaxwellToGL::SwizzleSource(texture.tic.w_source);
|
2018-06-06 19:58:16 +02:00
|
|
|
} else {
|
|
|
|
// Can occur when texture addr is null or its memory is unmapped/invalid
|
|
|
|
state.texture_units[current_bindpoint].texture_2d = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
state.Apply();
|
|
|
|
|
2018-06-20 18:39:10 +02:00
|
|
|
return current_unit + static_cast<u32>(entries.size());
|
2018-06-06 19:58:16 +02:00
|
|
|
}
|
|
|
|
|
2018-03-27 02:58:19 +02:00
|
|
|
void RasterizerOpenGL::BindFramebufferSurfaces(const Surface& color_surface,
|
|
|
|
const Surface& depth_surface, bool has_stencil) {
|
|
|
|
state.draw.draw_framebuffer = framebuffer.handle;
|
|
|
|
state.Apply();
|
|
|
|
|
|
|
|
glFramebufferTexture2D(GL_DRAW_FRAMEBUFFER, GL_COLOR_ATTACHMENT0, GL_TEXTURE_2D,
|
2018-06-22 01:36:01 +02:00
|
|
|
color_surface != nullptr ? color_surface->Texture().handle : 0, 0);
|
2018-03-27 02:58:19 +02:00
|
|
|
if (depth_surface != nullptr) {
|
|
|
|
if (has_stencil) {
|
|
|
|
// attach both depth and stencil
|
|
|
|
glFramebufferTexture2D(GL_DRAW_FRAMEBUFFER, GL_DEPTH_STENCIL_ATTACHMENT, GL_TEXTURE_2D,
|
2018-06-22 01:36:01 +02:00
|
|
|
depth_surface->Texture().handle, 0);
|
2018-03-27 02:58:19 +02:00
|
|
|
} else {
|
|
|
|
// attach depth
|
|
|
|
glFramebufferTexture2D(GL_DRAW_FRAMEBUFFER, GL_DEPTH_ATTACHMENT, GL_TEXTURE_2D,
|
2018-06-22 01:36:01 +02:00
|
|
|
depth_surface->Texture().handle, 0);
|
2018-03-27 02:58:19 +02:00
|
|
|
// clear stencil attachment
|
|
|
|
glFramebufferTexture2D(GL_DRAW_FRAMEBUFFER, GL_STENCIL_ATTACHMENT, GL_TEXTURE_2D, 0, 0);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// clear both depth and stencil attachment
|
|
|
|
glFramebufferTexture2D(GL_DRAW_FRAMEBUFFER, GL_DEPTH_STENCIL_ATTACHMENT, GL_TEXTURE_2D, 0,
|
|
|
|
0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-22 01:36:01 +02:00
|
|
|
void RasterizerOpenGL::SyncViewport(const MathUtil::Rectangle<u32>& surfaces_rect) {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-06-04 23:36:54 +02:00
|
|
|
const MathUtil::Rectangle<s32> viewport_rect{regs.viewport_transform[0].GetRect()};
|
2018-03-27 02:45:10 +02:00
|
|
|
|
2018-06-22 01:36:01 +02:00
|
|
|
state.viewport.x = static_cast<GLint>(surfaces_rect.left) + viewport_rect.left;
|
|
|
|
state.viewport.y = static_cast<GLint>(surfaces_rect.bottom) + viewport_rect.bottom;
|
|
|
|
state.viewport.width = static_cast<GLsizei>(viewport_rect.GetWidth());
|
|
|
|
state.viewport.height = static_cast<GLsizei>(viewport_rect.GetHeight());
|
2018-03-27 02:45:10 +02:00
|
|
|
}
|
|
|
|
|
2018-03-20 04:00:59 +01:00
|
|
|
void RasterizerOpenGL::SyncClipEnabled() {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncClipCoef() {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncCullMode() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-07-02 20:33:41 +02:00
|
|
|
|
2018-08-10 16:39:46 +02:00
|
|
|
state.cull.enabled = regs.cull.enabled != 0;
|
2018-07-03 04:22:25 +02:00
|
|
|
|
|
|
|
if (state.cull.enabled) {
|
|
|
|
state.cull.front_face = MaxwellToGL::FrontFace(regs.cull.front_face);
|
|
|
|
state.cull.mode = MaxwellToGL::CullFace(regs.cull.cull_face);
|
2018-07-04 17:26:46 +02:00
|
|
|
|
2018-07-08 18:27:15 +02:00
|
|
|
const bool flip_triangles{regs.screen_y_control.triangle_rast_flip == 0 ||
|
|
|
|
regs.viewport_transform[0].scale_y < 0.0f};
|
|
|
|
|
2018-07-04 17:26:46 +02:00
|
|
|
// If the GPU is configured to flip the rasterized triangles, then we need to flip the
|
|
|
|
// notion of front and back. Note: We flip the triangles when the value of the register is 0
|
|
|
|
// because OpenGL already does it for us.
|
2018-07-08 18:27:15 +02:00
|
|
|
if (flip_triangles) {
|
2018-07-04 17:26:46 +02:00
|
|
|
if (state.cull.front_face == GL_CCW)
|
|
|
|
state.cull.front_face = GL_CW;
|
|
|
|
else if (state.cull.front_face == GL_CW)
|
|
|
|
state.cull.front_face = GL_CCW;
|
|
|
|
}
|
2018-07-03 04:22:25 +02:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncDepthScale() {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncDepthOffset() {
|
2018-03-25 04:38:08 +02:00
|
|
|
UNREACHABLE();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-07-02 20:33:06 +02:00
|
|
|
void RasterizerOpenGL::SyncDepthTestState() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-07-02 20:33:06 +02:00
|
|
|
|
|
|
|
state.depth.test_enabled = regs.depth_test_enable != 0;
|
|
|
|
state.depth.write_mask = regs.depth_write_enabled ? GL_TRUE : GL_FALSE;
|
2018-07-03 04:02:46 +02:00
|
|
|
|
|
|
|
if (!state.depth.test_enabled)
|
|
|
|
return;
|
|
|
|
|
2018-07-02 20:33:06 +02:00
|
|
|
state.depth.test_func = MaxwellToGL::ComparisonOp(regs.depth_test_func);
|
|
|
|
}
|
|
|
|
|
2018-06-09 00:05:52 +02:00
|
|
|
void RasterizerOpenGL::SyncBlendState() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-06-09 00:05:52 +02:00
|
|
|
// TODO(Subv): Support more than just render target 0.
|
|
|
|
state.blend.enabled = regs.blend.enable[0] != 0;
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-06-09 00:05:52 +02:00
|
|
|
if (!state.blend.enabled)
|
|
|
|
return;
|
|
|
|
|
2018-06-18 09:24:52 +02:00
|
|
|
ASSERT_MSG(regs.independent_blend_enable == 1, "Only independent blending is implemented");
|
2018-06-09 00:05:52 +02:00
|
|
|
ASSERT_MSG(!regs.independent_blend[0].separate_alpha, "Unimplemented");
|
|
|
|
state.blend.rgb_equation = MaxwellToGL::BlendEquation(regs.independent_blend[0].equation_rgb);
|
|
|
|
state.blend.src_rgb_func = MaxwellToGL::BlendFunc(regs.independent_blend[0].factor_source_rgb);
|
|
|
|
state.blend.dst_rgb_func = MaxwellToGL::BlendFunc(regs.independent_blend[0].factor_dest_rgb);
|
|
|
|
state.blend.a_equation = MaxwellToGL::BlendEquation(regs.independent_blend[0].equation_a);
|
|
|
|
state.blend.src_a_func = MaxwellToGL::BlendFunc(regs.independent_blend[0].factor_source_a);
|
|
|
|
state.blend.dst_a_func = MaxwellToGL::BlendFunc(regs.independent_blend[0].factor_dest_a);
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|