2018-03-20 04:00:59 +01:00
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// Copyright 2015 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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2018-04-20 05:01:50 +02:00
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#include <algorithm>
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2018-09-13 02:27:43 +02:00
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#include <array>
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2018-03-20 04:00:59 +01:00
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#include <memory>
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#include <string>
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2018-07-24 18:10:35 +02:00
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#include <string_view>
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2018-03-20 04:00:59 +01:00
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#include <tuple>
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#include <utility>
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#include <glad/glad.h>
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#include "common/alignment.h"
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "common/math_util.h"
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#include "common/microprofile.h"
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2018-08-22 06:33:03 +02:00
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#include "common/scope_exit.h"
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2018-03-24 07:01:03 +01:00
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#include "core/core.h"
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2018-06-29 20:10:16 +02:00
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#include "core/frontend/emu_window.h"
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2018-03-24 07:01:03 +01:00
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#include "core/hle/kernel/process.h"
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2018-03-20 04:00:59 +01:00
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#include "core/settings.h"
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2018-03-24 07:01:03 +01:00
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#include "video_core/engines/maxwell_3d.h"
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2018-03-20 04:00:59 +01:00
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#include "video_core/renderer_opengl/gl_rasterizer.h"
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2019-01-14 02:05:53 +01:00
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#include "video_core/renderer_opengl/gl_shader_cache.h"
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2018-03-20 04:00:59 +01:00
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#include "video_core/renderer_opengl/gl_shader_gen.h"
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2018-03-25 04:38:08 +02:00
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#include "video_core/renderer_opengl/maxwell_to_gl.h"
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2018-03-20 04:00:59 +01:00
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#include "video_core/renderer_opengl/renderer_opengl.h"
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2018-06-29 20:10:16 +02:00
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#include "video_core/video_core.h"
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2018-03-20 04:00:59 +01:00
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2018-08-21 10:18:27 +02:00
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namespace OpenGL {
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2018-03-24 09:06:26 +01:00
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using Maxwell = Tegra::Engines::Maxwell3D::Regs;
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2018-10-29 02:14:25 +01:00
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using PixelFormat = VideoCore::Surface::PixelFormat;
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using SurfaceType = VideoCore::Surface::SurfaceType;
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2018-03-20 04:00:59 +01:00
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2018-11-06 19:37:10 +01:00
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MICROPROFILE_DEFINE(OpenGL_VAO, "OpenGL", "Vertex Format Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_VB, "OpenGL", "Vertex Buffer Setup", MP_RGB(128, 128, 192));
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2018-09-04 11:02:59 +02:00
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MICROPROFILE_DEFINE(OpenGL_Shader, "OpenGL", "Shader Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_UBO, "OpenGL", "Const Buffer Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_Index, "OpenGL", "Index Buffer Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_Texture, "OpenGL", "Texture Setup", MP_RGB(128, 128, 192));
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MICROPROFILE_DEFINE(OpenGL_Framebuffer, "OpenGL", "Framebuffer Setup", MP_RGB(128, 128, 192));
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2018-03-20 04:00:59 +01:00
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MICROPROFILE_DEFINE(OpenGL_Drawing, "OpenGL", "Drawing", MP_RGB(128, 128, 192));
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2018-09-04 11:02:59 +02:00
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MICROPROFILE_DEFINE(OpenGL_Blits, "OpenGL", "Blits", MP_RGB(128, 128, 192));
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2018-03-20 04:00:59 +01:00
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MICROPROFILE_DEFINE(OpenGL_CacheManagement, "OpenGL", "Cache Mgmt", MP_RGB(100, 255, 100));
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2018-10-02 19:47:26 +02:00
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MICROPROFILE_DEFINE(OpenGL_PrimitiveAssembly, "OpenGL", "Prim Asmbl", MP_RGB(255, 100, 100));
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struct DrawParameters {
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GLenum primitive_mode;
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GLsizei count;
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GLint current_instance;
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bool use_indexed;
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GLint vertex_first;
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GLenum index_format;
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GLint base_vertex;
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GLintptr index_buffer_offset;
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void DispatchDraw() const {
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if (use_indexed) {
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const auto index_buffer_ptr = reinterpret_cast<const void*>(index_buffer_offset);
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if (current_instance > 0) {
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glDrawElementsInstancedBaseVertexBaseInstance(primitive_mode, count, index_format,
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index_buffer_ptr, 1, base_vertex,
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current_instance);
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} else {
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glDrawElementsBaseVertex(primitive_mode, count, index_format, index_buffer_ptr,
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base_vertex);
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}
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} else {
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if (current_instance > 0) {
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glDrawArraysInstancedBaseInstance(primitive_mode, vertex_first, count, 1,
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current_instance);
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} else {
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glDrawArrays(primitive_mode, vertex_first, count);
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}
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}
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}
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};
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2018-03-20 04:00:59 +01:00
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2018-11-19 02:20:26 +01:00
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struct FramebufferCacheKey {
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bool is_single_buffer = false;
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bool stencil_enable = false;
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std::array<GLenum, Maxwell::NumRenderTargets> color_attachments{};
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std::array<GLuint, Tegra::Engines::Maxwell3D::Regs::NumRenderTargets> colors{};
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u32 colors_count = 0;
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GLuint zeta = 0;
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auto Tie() const {
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return std::tie(is_single_buffer, stencil_enable, color_attachments, colors, colors_count,
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zeta);
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}
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bool operator<(const FramebufferCacheKey& rhs) const {
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return Tie() < rhs.Tie();
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}
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};
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2018-08-21 01:34:02 +02:00
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RasterizerOpenGL::RasterizerOpenGL(Core::Frontend::EmuWindow& window, ScreenInfo& info)
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2018-11-08 12:08:00 +01:00
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: res_cache{*this}, shader_cache{*this}, emu_window{window}, screen_info{info},
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2019-01-08 21:30:10 +01:00
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buffer_cache(*this, STREAM_BUFFER_SIZE), global_cache{*this} {
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2018-03-27 04:44:03 +02:00
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// Create sampler objects
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2018-09-15 15:21:06 +02:00
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for (std::size_t i = 0; i < texture_samplers.size(); ++i) {
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2018-03-27 04:44:03 +02:00
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texture_samplers[i].Create();
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state.texture_units[i].sampler = texture_samplers[i].sampler.handle;
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}
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2018-10-30 04:55:53 +01:00
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OpenGLState::ApplyDefaultState();
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2018-03-20 04:00:59 +01:00
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2018-04-07 11:22:08 +02:00
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shader_program_manager = std::make_unique<GLShader::ProgramManager>();
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state.draw.shader_program = 0;
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state.Apply();
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2018-03-20 04:00:59 +01:00
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2018-08-10 09:45:38 +02:00
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glGetIntegerv(GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT, &uniform_buffer_alignment);
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2018-07-02 18:13:26 +02:00
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LOG_CRITICAL(Render_OpenGL, "Sync fixed function OpenGL state here!");
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2018-11-23 16:11:21 +01:00
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CheckExtensions();
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2018-03-20 04:00:59 +01:00
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}
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2018-08-09 21:31:46 +02:00
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RasterizerOpenGL::~RasterizerOpenGL() {}
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2018-03-20 04:00:59 +01:00
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2018-11-23 16:11:21 +01:00
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void RasterizerOpenGL::CheckExtensions() {
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if (!GLAD_GL_ARB_texture_filter_anisotropic && !GLAD_GL_EXT_texture_filter_anisotropic) {
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LOG_WARNING(
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Render_OpenGL,
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"Anisotropic filter is not supported! This can cause graphical issues in some games.");
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}
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if (!GLAD_GL_ARB_buffer_storage) {
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LOG_WARNING(
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Render_OpenGL,
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"Buffer storage control is not supported! This can cause performance degradation.");
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}
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}
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2019-01-06 05:53:27 +01:00
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GLuint RasterizerOpenGL::SetupVertexFormat() {
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2018-11-06 19:15:44 +01:00
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auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
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2018-08-18 21:42:26 +02:00
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const auto& regs = gpu.regs;
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2018-03-25 03:29:47 +02:00
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2019-01-06 05:53:27 +01:00
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if (!gpu.dirty_flags.vertex_attrib_format) {
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return state.draw.vertex_array;
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}
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2018-11-06 19:15:44 +01:00
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gpu.dirty_flags.vertex_attrib_format = false;
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MICROPROFILE_SCOPE(OpenGL_VAO);
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2018-09-05 11:36:50 +02:00
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auto [iter, is_cache_miss] = vertex_array_cache.try_emplace(regs.vertex_attrib_format);
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2019-01-06 05:53:27 +01:00
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auto& vao_entry = iter->second;
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2018-09-05 11:36:50 +02:00
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if (is_cache_miss) {
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2019-01-06 05:53:27 +01:00
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vao_entry.Create();
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const GLuint vao = vao_entry.handle;
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2018-09-05 11:36:50 +02:00
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2019-01-09 06:40:19 +01:00
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// Eventhough we are using DSA to create this vertex array, there is a bug on Intel's blob
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// that fails to properly create the vertex array if it's not bound even after creating it
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// with glCreateVertexArrays
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state.draw.vertex_array = vao;
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state.ApplyVertexArrayState();
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2019-01-06 05:53:27 +01:00
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glVertexArrayElementBuffer(vao, buffer_cache.GetHandle());
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2018-09-05 11:36:50 +02:00
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// Use the vertex array as-is, assumes that the data is formatted correctly for OpenGL.
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// Enables the first 16 vertex attributes always, as we don't know which ones are actually
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// used until shader time. Note, Tegra technically supports 32, but we're capping this to 16
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// for now to avoid OpenGL errors.
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// TODO(Subv): Analyze the shader to identify which attributes are actually used and don't
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// assume every shader uses them all.
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2019-01-06 05:53:27 +01:00
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for (u32 index = 0; index < 16; ++index) {
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2018-09-05 11:36:50 +02:00
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const auto& attrib = regs.vertex_attrib_format[index];
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// Ignore invalid attributes.
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if (!attrib.IsValid())
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continue;
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const auto& buffer = regs.vertex_array[attrib.buffer];
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LOG_TRACE(HW_GPU,
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"vertex attrib {}, count={}, size={}, type={}, offset={}, normalize={}",
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index, attrib.ComponentCount(), attrib.SizeString(), attrib.TypeString(),
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attrib.offset.Value(), attrib.IsNormalized());
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ASSERT(buffer.IsEnabled());
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2019-01-06 05:53:27 +01:00
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glEnableVertexArrayAttrib(vao, index);
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2018-09-05 11:36:50 +02:00
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if (attrib.type == Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::SignedInt ||
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attrib.type ==
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Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::UnsignedInt) {
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2019-01-06 05:53:27 +01:00
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glVertexArrayAttribIFormat(vao, index, attrib.ComponentCount(),
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MaxwellToGL::VertexType(attrib), attrib.offset);
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2018-09-05 11:36:50 +02:00
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} else {
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2019-01-06 05:53:27 +01:00
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glVertexArrayAttribFormat(
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vao, index, attrib.ComponentCount(), MaxwellToGL::VertexType(attrib),
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attrib.IsNormalized() ? GL_TRUE : GL_FALSE, attrib.offset);
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2018-09-05 11:36:50 +02:00
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}
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2019-01-06 05:53:27 +01:00
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glVertexArrayAttribBinding(vao, index, attrib.buffer);
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2018-09-05 11:36:50 +02:00
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}
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}
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2018-11-06 21:26:27 +01:00
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// Rebinding the VAO invalidates the vertex buffer bindings.
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gpu.dirty_flags.vertex_array = 0xFFFFFFFF;
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2019-01-06 05:53:27 +01:00
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state.draw.vertex_array = vao_entry.handle;
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return vao_entry.handle;
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2018-11-06 19:37:10 +01:00
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}
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2019-01-06 05:53:27 +01:00
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void RasterizerOpenGL::SetupVertexBuffer(GLuint vao) {
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2018-11-06 21:26:27 +01:00
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auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
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2018-11-06 19:37:10 +01:00
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const auto& regs = gpu.regs;
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2018-03-25 03:29:47 +02:00
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2018-11-06 21:26:27 +01:00
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if (!gpu.dirty_flags.vertex_array)
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return;
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MICROPROFILE_SCOPE(OpenGL_VB);
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2018-04-22 02:19:33 +02:00
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// Upload all guest vertex arrays sequentially to our buffer
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for (u32 index = 0; index < Maxwell::NumVertexArrays; ++index) {
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2018-11-06 21:26:27 +01:00
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if (~gpu.dirty_flags.vertex_array & (1u << index))
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continue;
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2018-04-22 02:19:33 +02:00
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const auto& vertex_array = regs.vertex_array[index];
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if (!vertex_array.IsEnabled())
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continue;
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2019-01-06 05:53:27 +01:00
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const Tegra::GPUVAddr start = vertex_array.StartAddress();
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2018-04-22 02:19:33 +02:00
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const Tegra::GPUVAddr end = regs.vertex_array_limit[index].LimitAddress();
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ASSERT(end > start);
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2018-09-08 08:59:59 +02:00
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const u64 size = end - start + 1;
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const GLintptr vertex_buffer_offset = buffer_cache.UploadMemory(start, size);
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2018-04-22 02:19:33 +02:00
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// Bind the vertex array to the buffer at the current offset.
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2019-01-06 05:53:27 +01:00
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glVertexArrayVertexBuffer(vao, index, buffer_cache.GetHandle(), vertex_buffer_offset,
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vertex_array.stride);
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2018-04-22 02:19:33 +02:00
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2018-08-18 21:42:26 +02:00
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if (regs.instanced_arrays.IsInstancingEnabled(index) && vertex_array.divisor != 0) {
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2018-09-08 10:05:56 +02:00
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// Enable vertex buffer instancing with the specified divisor.
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2019-01-06 05:53:27 +01:00
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glVertexArrayBindingDivisor(vao, index, vertex_array.divisor);
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2018-08-18 21:42:26 +02:00
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} else {
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// Disable the vertex buffer instancing.
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2019-01-06 05:53:27 +01:00
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glVertexArrayBindingDivisor(vao, index, 0);
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2018-08-18 21:42:26 +02:00
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}
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2018-03-25 03:29:47 +02:00
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}
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2018-11-06 19:37:10 +01:00
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2018-11-06 21:26:27 +01:00
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gpu.dirty_flags.vertex_array = 0;
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2018-03-20 04:00:59 +01:00
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}
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2018-10-02 19:47:26 +02:00
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DrawParameters RasterizerOpenGL::SetupDraw() {
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const auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
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const auto& regs = gpu.regs;
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const bool is_indexed = accelerate_draw == AccelDraw::Indexed;
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DrawParameters params{};
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params.current_instance = gpu.state.current_instance;
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if (regs.draw.topology == Maxwell::PrimitiveTopology::Quads) {
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MICROPROFILE_SCOPE(OpenGL_PrimitiveAssembly);
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params.use_indexed = true;
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params.primitive_mode = GL_TRIANGLES;
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if (is_indexed) {
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params.index_format = MaxwellToGL::IndexFormat(regs.index_array.format);
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params.count = (regs.index_array.count / 4) * 6;
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params.index_buffer_offset = primitive_assembler.MakeQuadIndexed(
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regs.index_array.IndexStart(), regs.index_array.FormatSizeInBytes(),
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regs.index_array.count);
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params.base_vertex = static_cast<GLint>(regs.vb_element_base);
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} else {
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// MakeQuadArray always generates u32 indexes
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params.index_format = GL_UNSIGNED_INT;
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params.count = (regs.vertex_buffer.count / 4) * 6;
|
|
|
|
params.index_buffer_offset =
|
|
|
|
primitive_assembler.MakeQuadArray(regs.vertex_buffer.first, params.count);
|
|
|
|
}
|
|
|
|
return params;
|
|
|
|
}
|
|
|
|
|
|
|
|
params.use_indexed = is_indexed;
|
|
|
|
params.primitive_mode = MaxwellToGL::PrimitiveTopology(regs.draw.topology);
|
|
|
|
|
|
|
|
if (is_indexed) {
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_Index);
|
|
|
|
params.index_format = MaxwellToGL::IndexFormat(regs.index_array.format);
|
|
|
|
params.count = regs.index_array.count;
|
|
|
|
params.index_buffer_offset =
|
|
|
|
buffer_cache.UploadMemory(regs.index_array.IndexStart(), CalculateIndexBufferSize());
|
|
|
|
params.base_vertex = static_cast<GLint>(regs.vb_element_base);
|
|
|
|
} else {
|
|
|
|
params.count = regs.vertex_buffer.count;
|
|
|
|
params.vertex_first = regs.vertex_buffer.first;
|
|
|
|
}
|
2018-10-07 04:22:48 +02:00
|
|
|
return params;
|
2018-10-02 19:47:26 +02:00
|
|
|
}
|
|
|
|
|
2018-10-07 04:17:31 +02:00
|
|
|
void RasterizerOpenGL::SetupShaders(GLenum primitive_mode) {
|
2018-09-04 11:02:59 +02:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_Shader);
|
2019-01-06 07:58:43 +01:00
|
|
|
auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
|
2018-04-08 06:00:11 +02:00
|
|
|
|
2019-01-05 05:00:06 +01:00
|
|
|
BaseBindings base_bindings;
|
2018-11-29 20:13:13 +01:00
|
|
|
std::array<bool, Maxwell::NumClipDistances> clip_distances{};
|
2018-04-15 21:14:57 +02:00
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
for (std::size_t index = 0; index < Maxwell::MaxShaderProgram; ++index) {
|
2018-09-08 08:59:59 +02:00
|
|
|
const auto& shader_config = gpu.regs.shader_config[index];
|
2018-04-08 06:00:11 +02:00
|
|
|
const Maxwell::ShaderProgram program{static_cast<Maxwell::ShaderProgram>(index)};
|
|
|
|
|
|
|
|
// Skip stages that are not enabled
|
2018-07-13 04:57:57 +02:00
|
|
|
if (!gpu.regs.IsShaderConfigEnabled(index)) {
|
2018-10-07 04:17:31 +02:00
|
|
|
switch (program) {
|
|
|
|
case Maxwell::ShaderProgram::Geometry:
|
|
|
|
shader_program_manager->UseTrivialGeometryShader();
|
|
|
|
break;
|
|
|
|
}
|
2018-04-08 06:00:11 +02:00
|
|
|
continue;
|
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
const std::size_t stage{index == 0 ? 0 : index - 1}; // Stage indices are 0 - 5
|
2018-07-13 04:57:57 +02:00
|
|
|
|
2018-06-07 15:33:23 +02:00
|
|
|
GLShader::MaxwellUniformData ubo{};
|
|
|
|
ubo.SetFromRegs(gpu.state.shader_stages[stage]);
|
2018-09-08 08:59:59 +02:00
|
|
|
const GLintptr offset = buffer_cache.UploadHostMemory(
|
2018-09-15 15:21:06 +02:00
|
|
|
&ubo, sizeof(ubo), static_cast<std::size_t>(uniform_buffer_alignment));
|
2018-06-07 15:33:23 +02:00
|
|
|
|
2019-01-05 05:00:06 +01:00
|
|
|
// Bind the emulation info buffer
|
|
|
|
glBindBufferRange(GL_UNIFORM_BUFFER, base_bindings.cbuf, buffer_cache.GetHandle(), offset,
|
|
|
|
static_cast<GLsizeiptr>(sizeof(ubo)));
|
2018-04-22 02:19:33 +02:00
|
|
|
|
2018-08-23 23:30:27 +02:00
|
|
|
Shader shader{shader_cache.GetStageProgram(program)};
|
2019-01-05 05:00:06 +01:00
|
|
|
const auto [program_handle, next_bindings] =
|
|
|
|
shader->GetProgramHandle(primitive_mode, base_bindings);
|
2018-04-15 18:15:54 +02:00
|
|
|
|
2018-04-08 06:00:11 +02:00
|
|
|
switch (program) {
|
2018-08-23 23:30:27 +02:00
|
|
|
case Maxwell::ShaderProgram::VertexA:
|
2019-01-05 05:00:06 +01:00
|
|
|
case Maxwell::ShaderProgram::VertexB:
|
|
|
|
shader_program_manager->UseProgrammableVertexShader(program_handle);
|
2018-10-07 04:17:31 +02:00
|
|
|
break;
|
2019-01-05 05:00:06 +01:00
|
|
|
case Maxwell::ShaderProgram::Geometry:
|
|
|
|
shader_program_manager->UseProgrammableGeometryShader(program_handle);
|
2018-04-08 06:00:11 +02:00
|
|
|
break;
|
2019-01-05 05:00:06 +01:00
|
|
|
case Maxwell::ShaderProgram::Fragment:
|
|
|
|
shader_program_manager->UseProgrammableFragmentShader(program_handle);
|
2018-04-08 06:00:11 +02:00
|
|
|
break;
|
|
|
|
default:
|
2018-07-02 18:20:50 +02:00
|
|
|
LOG_CRITICAL(HW_GPU, "Unimplemented shader index={}, enable={}, offset=0x{:08X}", index,
|
|
|
|
shader_config.enable.Value(), shader_config.offset);
|
2018-04-08 06:00:11 +02:00
|
|
|
UNREACHABLE();
|
|
|
|
}
|
2018-04-15 18:15:54 +02:00
|
|
|
|
2019-01-05 05:00:06 +01:00
|
|
|
const auto stage_enum = static_cast<Maxwell::ShaderStage>(stage);
|
|
|
|
SetupConstBuffers(stage_enum, shader, program_handle, base_bindings);
|
|
|
|
SetupGlobalRegions(stage_enum, shader, program_handle, base_bindings);
|
|
|
|
SetupTextures(stage_enum, shader, program_handle, base_bindings);
|
2018-07-13 04:25:03 +02:00
|
|
|
|
2018-11-29 20:13:13 +01:00
|
|
|
// Workaround for Intel drivers.
|
|
|
|
// When a clip distance is enabled but not set in the shader it crops parts of the screen
|
|
|
|
// (sometimes it's half the screen, sometimes three quarters). To avoid this, enable the
|
|
|
|
// clip distances only when it's written by a shader stage.
|
|
|
|
for (std::size_t i = 0; i < Maxwell::NumClipDistances; ++i) {
|
2019-01-18 07:25:28 +01:00
|
|
|
clip_distances[i] = clip_distances[i] || shader->GetShaderEntries().clip_distances[i];
|
2018-11-29 20:13:13 +01:00
|
|
|
}
|
|
|
|
|
2018-07-13 04:25:03 +02:00
|
|
|
// When VertexA is enabled, we have dual vertex shaders
|
|
|
|
if (program == Maxwell::ShaderProgram::VertexA) {
|
|
|
|
// VertexB was combined with VertexA, so we skip the VertexB iteration
|
|
|
|
index++;
|
|
|
|
}
|
2019-01-05 05:00:06 +01:00
|
|
|
|
|
|
|
base_bindings = next_bindings;
|
2018-04-08 06:00:11 +02:00
|
|
|
}
|
2018-11-29 20:13:13 +01:00
|
|
|
|
|
|
|
SyncClipEnabled(clip_distances);
|
2019-01-06 07:58:43 +01:00
|
|
|
|
|
|
|
gpu.dirty_flags.shaders = false;
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-11-19 02:20:26 +01:00
|
|
|
void RasterizerOpenGL::SetupCachedFramebuffer(const FramebufferCacheKey& fbkey,
|
|
|
|
OpenGLState& current_state) {
|
|
|
|
const auto [entry, is_cache_miss] = framebuffer_cache.try_emplace(fbkey);
|
|
|
|
auto& framebuffer = entry->second;
|
|
|
|
|
|
|
|
if (is_cache_miss)
|
|
|
|
framebuffer.Create();
|
|
|
|
|
|
|
|
current_state.draw.draw_framebuffer = framebuffer.handle;
|
|
|
|
current_state.ApplyFramebufferState();
|
|
|
|
|
|
|
|
if (!is_cache_miss)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (fbkey.is_single_buffer) {
|
|
|
|
if (fbkey.color_attachments[0] != GL_NONE) {
|
|
|
|
glFramebufferTexture(GL_DRAW_FRAMEBUFFER, fbkey.color_attachments[0], fbkey.colors[0],
|
|
|
|
0);
|
|
|
|
}
|
|
|
|
glDrawBuffer(fbkey.color_attachments[0]);
|
|
|
|
} else {
|
|
|
|
for (std::size_t index = 0; index < Maxwell::NumRenderTargets; ++index) {
|
|
|
|
if (fbkey.colors[index]) {
|
|
|
|
glFramebufferTexture(GL_DRAW_FRAMEBUFFER,
|
|
|
|
GL_COLOR_ATTACHMENT0 + static_cast<GLenum>(index),
|
|
|
|
fbkey.colors[index], 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
glDrawBuffers(fbkey.colors_count, fbkey.color_attachments.data());
|
|
|
|
}
|
|
|
|
|
|
|
|
if (fbkey.zeta) {
|
|
|
|
GLenum zeta_attachment =
|
|
|
|
fbkey.stencil_enable ? GL_DEPTH_STENCIL_ATTACHMENT : GL_DEPTH_ATTACHMENT;
|
|
|
|
glFramebufferTexture(GL_DRAW_FRAMEBUFFER, zeta_attachment, fbkey.zeta, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
std::size_t RasterizerOpenGL::CalculateVertexArraysSize() const {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-04-22 02:19:33 +02:00
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
std::size_t size = 0;
|
2018-04-22 02:19:33 +02:00
|
|
|
for (u32 index = 0; index < Maxwell::NumVertexArrays; ++index) {
|
|
|
|
if (!regs.vertex_array[index].IsEnabled())
|
|
|
|
continue;
|
|
|
|
|
|
|
|
const Tegra::GPUVAddr start = regs.vertex_array[index].StartAddress();
|
|
|
|
const Tegra::GPUVAddr end = regs.vertex_array_limit[index].LimitAddress();
|
|
|
|
|
|
|
|
ASSERT(end > start);
|
|
|
|
size += end - start + 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
2018-10-02 19:47:26 +02:00
|
|
|
std::size_t RasterizerOpenGL::CalculateIndexBufferSize() const {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
|
|
|
return static_cast<std::size_t>(regs.index_array.count) *
|
|
|
|
static_cast<std::size_t>(regs.index_array.FormatSizeInBytes());
|
|
|
|
}
|
|
|
|
|
2018-03-20 04:00:59 +01:00
|
|
|
bool RasterizerOpenGL::AccelerateDrawBatch(bool is_indexed) {
|
|
|
|
accelerate_draw = is_indexed ? AccelDraw::Indexed : AccelDraw::Arrays;
|
2018-03-25 04:50:21 +02:00
|
|
|
DrawArrays();
|
2018-03-20 04:00:59 +01:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2018-08-29 00:43:08 +02:00
|
|
|
template <typename Map, typename Interval>
|
|
|
|
static constexpr auto RangeFromInterval(Map& map, const Interval& interval) {
|
|
|
|
return boost::make_iterator_range(map.equal_range(interval));
|
|
|
|
}
|
|
|
|
|
2018-08-28 03:35:15 +02:00
|
|
|
void RasterizerOpenGL::UpdatePagesCachedCount(VAddr addr, u64 size, int delta) {
|
|
|
|
const u64 page_start{addr >> Memory::PAGE_BITS};
|
|
|
|
const u64 page_end{(addr + size + Memory::PAGE_SIZE - 1) >> Memory::PAGE_BITS};
|
2018-08-29 00:43:08 +02:00
|
|
|
|
|
|
|
// Interval maps will erase segments if count reaches 0, so if delta is negative we have to
|
|
|
|
// subtract after iterating
|
|
|
|
const auto pages_interval = CachedPageMap::interval_type::right_open(page_start, page_end);
|
|
|
|
if (delta > 0)
|
|
|
|
cached_pages.add({pages_interval, delta});
|
|
|
|
|
|
|
|
for (const auto& pair : RangeFromInterval(cached_pages, pages_interval)) {
|
|
|
|
const auto interval = pair.first & pages_interval;
|
|
|
|
const int count = pair.second;
|
|
|
|
|
2018-08-28 03:35:15 +02:00
|
|
|
const VAddr interval_start_addr = boost::icl::first(interval) << Memory::PAGE_BITS;
|
|
|
|
const VAddr interval_end_addr = boost::icl::last_next(interval) << Memory::PAGE_BITS;
|
2018-08-29 00:43:08 +02:00
|
|
|
const u64 interval_size = interval_end_addr - interval_start_addr;
|
|
|
|
|
|
|
|
if (delta > 0 && count == delta)
|
|
|
|
Memory::RasterizerMarkRegionCached(interval_start_addr, interval_size, true);
|
|
|
|
else if (delta < 0 && count == -delta)
|
|
|
|
Memory::RasterizerMarkRegionCached(interval_start_addr, interval_size, false);
|
|
|
|
else
|
|
|
|
ASSERT(count >= 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (delta < 0)
|
|
|
|
cached_pages.add({pages_interval, delta});
|
|
|
|
}
|
|
|
|
|
2019-01-14 02:05:53 +01:00
|
|
|
void RasterizerOpenGL::LoadDiskResources() {
|
|
|
|
shader_cache.LoadDiskCache();
|
|
|
|
}
|
|
|
|
|
2019-01-29 06:01:05 +01:00
|
|
|
std::pair<bool, bool> RasterizerOpenGL::ConfigureFramebuffers(
|
|
|
|
OpenGLState& current_state, bool using_color_fb, bool using_depth_fb, bool preserve_contents,
|
|
|
|
std::optional<std::size_t> single_color_target) {
|
2018-09-04 11:02:59 +02:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_Framebuffer);
|
2019-01-07 06:22:00 +01:00
|
|
|
const auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
|
|
|
|
const auto& regs = gpu.regs;
|
|
|
|
|
|
|
|
const FramebufferConfigState fb_config_state{using_color_fb, using_depth_fb, preserve_contents,
|
|
|
|
single_color_target};
|
|
|
|
if (fb_config_state == current_framebuffer_config_state && gpu.dirty_flags.color_buffer == 0 &&
|
|
|
|
!gpu.dirty_flags.zeta_buffer) {
|
|
|
|
// Only skip if the previous ConfigureFramebuffers call was from the same kind (multiple or
|
|
|
|
// single color targets). This is done because the guest registers may not change but the
|
|
|
|
// host framebuffer may contain different attachments
|
2019-01-29 06:01:05 +01:00
|
|
|
return current_depth_stencil_usage;
|
2019-01-07 06:22:00 +01:00
|
|
|
}
|
|
|
|
current_framebuffer_config_state = fb_config_state;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
|
|
|
Surface depth_surface;
|
2018-09-10 01:01:21 +02:00
|
|
|
if (using_depth_fb) {
|
|
|
|
depth_surface = res_cache.GetDepthBufferSurface(preserve_contents);
|
|
|
|
}
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2019-01-22 08:14:29 +01:00
|
|
|
UNIMPLEMENTED_IF(regs.rt_separate_frag_data == 0);
|
2018-03-24 08:59:51 +01:00
|
|
|
|
|
|
|
// Bind the framebuffer surfaces
|
2018-11-08 02:27:47 +01:00
|
|
|
current_state.framebuffer_srgb.enabled = regs.framebuffer_srgb != 0;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-11-19 02:20:26 +01:00
|
|
|
FramebufferCacheKey fbkey;
|
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
if (using_color_fb) {
|
|
|
|
if (single_color_target) {
|
|
|
|
// Used when just a single color attachment is enabled, e.g. for clearing a color buffer
|
|
|
|
Surface color_surface =
|
|
|
|
res_cache.GetColorBufferSurface(*single_color_target, preserve_contents);
|
2018-10-13 04:31:04 +02:00
|
|
|
|
|
|
|
if (color_surface) {
|
|
|
|
// Assume that a surface will be written to if it is used as a framebuffer, even if
|
|
|
|
// the shader doesn't actually write to it.
|
2018-10-16 22:51:53 +02:00
|
|
|
color_surface->MarkAsModified(true, res_cache);
|
2018-10-24 22:09:40 +02:00
|
|
|
// Workaround for and issue in nvidia drivers
|
|
|
|
// https://devtalk.nvidia.com/default/topic/776591/opengl/gl_framebuffer_srgb-functions-incorrectly/
|
|
|
|
state.framebuffer_srgb.enabled |= color_surface->GetSurfaceParams().srgb_conversion;
|
2018-10-13 04:31:04 +02:00
|
|
|
}
|
|
|
|
|
2018-11-19 02:20:26 +01:00
|
|
|
fbkey.is_single_buffer = true;
|
|
|
|
fbkey.color_attachments[0] =
|
|
|
|
GL_COLOR_ATTACHMENT0 + static_cast<GLenum>(*single_color_target);
|
|
|
|
fbkey.colors[0] = color_surface != nullptr ? color_surface->Texture().handle : 0;
|
2018-09-10 06:36:13 +02:00
|
|
|
} else {
|
|
|
|
// Multiple color attachments are enabled
|
2018-09-15 15:21:06 +02:00
|
|
|
for (std::size_t index = 0; index < Maxwell::NumRenderTargets; ++index) {
|
2018-09-10 06:36:13 +02:00
|
|
|
Surface color_surface = res_cache.GetColorBufferSurface(index, preserve_contents);
|
2018-10-13 04:31:04 +02:00
|
|
|
|
|
|
|
if (color_surface) {
|
|
|
|
// Assume that a surface will be written to if it is used as a framebuffer, even
|
|
|
|
// if the shader doesn't actually write to it.
|
2018-10-16 22:51:53 +02:00
|
|
|
color_surface->MarkAsModified(true, res_cache);
|
2018-10-24 22:09:40 +02:00
|
|
|
// Enable sRGB only for supported formats
|
|
|
|
// Workaround for and issue in nvidia drivers
|
|
|
|
// https://devtalk.nvidia.com/default/topic/776591/opengl/gl_framebuffer_srgb-functions-incorrectly/
|
|
|
|
state.framebuffer_srgb.enabled |=
|
|
|
|
color_surface->GetSurfaceParams().srgb_conversion;
|
2018-10-13 04:31:04 +02:00
|
|
|
}
|
|
|
|
|
2018-11-19 02:20:26 +01:00
|
|
|
fbkey.color_attachments[index] =
|
|
|
|
GL_COLOR_ATTACHMENT0 + regs.rt_control.GetMap(index);
|
|
|
|
fbkey.colors[index] =
|
|
|
|
color_surface != nullptr ? color_surface->Texture().handle : 0;
|
2018-09-10 06:36:13 +02:00
|
|
|
}
|
2018-11-19 02:20:26 +01:00
|
|
|
fbkey.is_single_buffer = false;
|
|
|
|
fbkey.colors_count = regs.rt_control.count;
|
2018-09-10 06:36:13 +02:00
|
|
|
}
|
|
|
|
} else {
|
2018-11-19 02:20:26 +01:00
|
|
|
// No color attachments are enabled - leave them as zero
|
|
|
|
fbkey.is_single_buffer = true;
|
2018-09-10 01:01:21 +02:00
|
|
|
}
|
2018-03-27 04:54:16 +02:00
|
|
|
|
2018-09-10 01:01:21 +02:00
|
|
|
if (depth_surface) {
|
2018-10-13 04:31:04 +02:00
|
|
|
// Assume that a surface will be written to if it is used as a framebuffer, even if
|
|
|
|
// the shader doesn't actually write to it.
|
2018-10-16 22:51:53 +02:00
|
|
|
depth_surface->MarkAsModified(true, res_cache);
|
2018-10-13 04:31:04 +02:00
|
|
|
|
2018-11-19 02:20:26 +01:00
|
|
|
fbkey.zeta = depth_surface->Texture().handle;
|
2019-01-29 06:01:05 +01:00
|
|
|
fbkey.stencil_enable = regs.stencil_enable &&
|
|
|
|
depth_surface->GetSurfaceParams().type == SurfaceType::DepthStencil;
|
2018-09-10 01:01:21 +02:00
|
|
|
}
|
2018-11-19 02:20:26 +01:00
|
|
|
|
|
|
|
SetupCachedFramebuffer(fbkey, current_state);
|
2018-11-08 02:27:47 +01:00
|
|
|
SyncViewport(current_state);
|
2019-01-29 06:01:05 +01:00
|
|
|
|
|
|
|
return current_depth_stencil_usage = {static_cast<bool>(depth_surface), fbkey.stencil_enable};
|
2018-07-03 23:55:44 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::Clear() {
|
2018-08-22 06:33:03 +02:00
|
|
|
const auto prev_state{state};
|
|
|
|
SCOPE_EXIT({ prev_state.Apply(); });
|
2018-07-03 23:55:44 +02:00
|
|
|
|
2018-08-22 06:33:03 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-09-10 06:36:13 +02:00
|
|
|
bool use_color{};
|
|
|
|
bool use_depth{};
|
|
|
|
bool use_stencil{};
|
2018-07-04 05:32:59 +02:00
|
|
|
|
2018-08-22 06:33:03 +02:00
|
|
|
OpenGLState clear_state;
|
|
|
|
if (regs.clear_buffers.R || regs.clear_buffers.G || regs.clear_buffers.B ||
|
2018-07-03 23:55:44 +02:00
|
|
|
regs.clear_buffers.A) {
|
2018-09-10 06:36:13 +02:00
|
|
|
use_color = true;
|
2018-07-03 23:55:44 +02:00
|
|
|
}
|
2018-11-08 02:27:47 +01:00
|
|
|
if (use_color) {
|
|
|
|
clear_state.color_mask[0].red_enabled = regs.clear_buffers.R ? GL_TRUE : GL_FALSE;
|
|
|
|
clear_state.color_mask[0].green_enabled = regs.clear_buffers.G ? GL_TRUE : GL_FALSE;
|
|
|
|
clear_state.color_mask[0].blue_enabled = regs.clear_buffers.B ? GL_TRUE : GL_FALSE;
|
|
|
|
clear_state.color_mask[0].alpha_enabled = regs.clear_buffers.A ? GL_TRUE : GL_FALSE;
|
|
|
|
}
|
2018-07-04 05:32:59 +02:00
|
|
|
if (regs.clear_buffers.Z) {
|
2018-08-22 06:33:03 +02:00
|
|
|
ASSERT_MSG(regs.zeta_enable != 0, "Tried to clear Z but buffer is not enabled!");
|
2018-09-10 06:36:13 +02:00
|
|
|
use_depth = true;
|
2018-07-14 07:52:23 +02:00
|
|
|
|
|
|
|
// Always enable the depth write when clearing the depth buffer. The depth write mask is
|
2018-11-08 02:27:47 +01:00
|
|
|
// ignored when clearing the buffer in the Switch, but OpenGL obeys it so we set it to
|
|
|
|
// true.
|
2018-08-22 06:33:03 +02:00
|
|
|
clear_state.depth.test_enabled = true;
|
|
|
|
clear_state.depth.test_func = GL_ALWAYS;
|
|
|
|
}
|
|
|
|
if (regs.clear_buffers.S) {
|
|
|
|
ASSERT_MSG(regs.zeta_enable != 0, "Tried to clear stencil but buffer is not enabled!");
|
2018-09-10 06:36:13 +02:00
|
|
|
use_stencil = true;
|
2018-08-22 06:33:03 +02:00
|
|
|
clear_state.stencil.test_enabled = true;
|
2018-11-21 04:40:32 +01:00
|
|
|
if (regs.clear_flags.stencil) {
|
|
|
|
// Stencil affects the clear so fill it with the used masks
|
|
|
|
clear_state.stencil.front.test_func = GL_ALWAYS;
|
|
|
|
clear_state.stencil.front.test_mask = regs.stencil_front_func_mask;
|
|
|
|
clear_state.stencil.front.action_stencil_fail = GL_KEEP;
|
|
|
|
clear_state.stencil.front.action_depth_fail = GL_KEEP;
|
|
|
|
clear_state.stencil.front.action_depth_pass = GL_KEEP;
|
|
|
|
clear_state.stencil.front.write_mask = regs.stencil_front_mask;
|
|
|
|
if (regs.stencil_two_side_enable) {
|
|
|
|
clear_state.stencil.back.test_func = GL_ALWAYS;
|
|
|
|
clear_state.stencil.back.test_mask = regs.stencil_back_func_mask;
|
|
|
|
clear_state.stencil.back.action_stencil_fail = GL_KEEP;
|
|
|
|
clear_state.stencil.back.action_depth_fail = GL_KEEP;
|
|
|
|
clear_state.stencil.back.action_depth_pass = GL_KEEP;
|
|
|
|
clear_state.stencil.back.write_mask = regs.stencil_back_mask;
|
|
|
|
} else {
|
|
|
|
clear_state.stencil.back.test_func = GL_ALWAYS;
|
|
|
|
clear_state.stencil.back.test_mask = 0xFFFFFFFF;
|
|
|
|
clear_state.stencil.back.write_mask = 0xFFFFFFFF;
|
|
|
|
clear_state.stencil.back.action_stencil_fail = GL_KEEP;
|
|
|
|
clear_state.stencil.back.action_depth_fail = GL_KEEP;
|
|
|
|
clear_state.stencil.back.action_depth_pass = GL_KEEP;
|
|
|
|
}
|
|
|
|
}
|
2018-07-04 05:32:59 +02:00
|
|
|
}
|
2018-07-03 23:55:44 +02:00
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
if (!use_color && !use_depth && !use_stencil) {
|
2018-08-22 06:33:03 +02:00
|
|
|
// No color surface nor depth/stencil surface are enabled
|
2018-07-03 23:55:44 +02:00
|
|
|
return;
|
2018-08-22 06:33:03 +02:00
|
|
|
}
|
|
|
|
|
2019-01-29 06:01:05 +01:00
|
|
|
const auto [clear_depth, clear_stencil] = ConfigureFramebuffers(
|
|
|
|
clear_state, use_color, use_depth || use_stencil, false, regs.clear_buffers.RT.Value());
|
2018-11-21 04:40:32 +01:00
|
|
|
if (regs.clear_flags.scissor) {
|
|
|
|
SyncScissorTest(clear_state);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (regs.clear_flags.viewport) {
|
|
|
|
clear_state.EmulateViewportWithScissor();
|
|
|
|
}
|
|
|
|
|
2018-08-22 06:33:03 +02:00
|
|
|
clear_state.Apply();
|
|
|
|
|
2018-09-10 06:36:13 +02:00
|
|
|
if (use_color) {
|
|
|
|
glClearBufferfv(GL_COLOR, regs.clear_buffers.RT, regs.clear_color);
|
|
|
|
}
|
2018-06-07 06:54:25 +02:00
|
|
|
|
2019-01-29 06:01:05 +01:00
|
|
|
if (clear_depth && clear_stencil) {
|
2018-09-10 06:36:13 +02:00
|
|
|
glClearBufferfi(GL_DEPTH_STENCIL, 0, regs.clear_depth, regs.clear_stencil);
|
2019-01-29 06:01:05 +01:00
|
|
|
} else if (clear_depth) {
|
2018-09-10 06:36:13 +02:00
|
|
|
glClearBufferfv(GL_DEPTH, 0, ®s.clear_depth);
|
2019-01-29 06:01:05 +01:00
|
|
|
} else if (clear_stencil) {
|
2018-09-10 06:36:13 +02:00
|
|
|
glClearBufferiv(GL_STENCIL, 0, ®s.clear_stencil);
|
|
|
|
}
|
2018-06-07 06:54:25 +02:00
|
|
|
}
|
|
|
|
|
2018-03-25 04:50:21 +02:00
|
|
|
void RasterizerOpenGL::DrawArrays() {
|
2018-03-24 08:59:51 +01:00
|
|
|
if (accelerate_draw == AccelDraw::Disabled)
|
|
|
|
return;
|
|
|
|
|
2018-03-20 04:00:59 +01:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_Drawing);
|
2018-11-06 21:26:27 +01:00
|
|
|
auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
|
2018-09-08 10:05:56 +02:00
|
|
|
const auto& regs = gpu.regs;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-11-08 02:27:47 +01:00
|
|
|
ConfigureFramebuffers(state);
|
2018-11-05 03:46:06 +01:00
|
|
|
SyncColorMask();
|
2018-11-14 02:09:01 +01:00
|
|
|
SyncFragmentColorClampState();
|
2018-11-14 04:02:54 +01:00
|
|
|
SyncMultiSampleState();
|
2018-07-14 07:52:23 +02:00
|
|
|
SyncDepthTestState();
|
2018-08-22 06:35:31 +02:00
|
|
|
SyncStencilTestState();
|
2018-06-09 00:05:52 +02:00
|
|
|
SyncBlendState();
|
2018-08-21 01:44:47 +02:00
|
|
|
SyncLogicOpState();
|
2018-07-02 20:33:41 +02:00
|
|
|
SyncCullMode();
|
2018-10-26 01:04:13 +02:00
|
|
|
SyncPrimitiveRestart();
|
2018-11-21 04:40:32 +01:00
|
|
|
SyncScissorTest(state);
|
2018-10-10 15:45:22 +02:00
|
|
|
// Alpha Testing is synced on shaders.
|
2018-09-26 00:41:21 +02:00
|
|
|
SyncTransformFeedback();
|
2018-09-28 06:31:01 +02:00
|
|
|
SyncPointState();
|
2018-10-12 02:29:11 +02:00
|
|
|
CheckAlphaTests();
|
2018-11-27 00:31:44 +01:00
|
|
|
SyncPolygonOffset();
|
2018-03-24 08:59:51 +01:00
|
|
|
// TODO(bunnei): Sync framebuffer_scale uniform here
|
|
|
|
// TODO(bunnei): Sync scissorbox uniform(s) here
|
2018-03-27 04:54:16 +02:00
|
|
|
|
2018-03-24 08:59:51 +01:00
|
|
|
// Draw the vertex batch
|
|
|
|
const bool is_indexed = accelerate_draw == AccelDraw::Indexed;
|
2018-04-13 20:18:37 +02:00
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
std::size_t buffer_size = CalculateVertexArraysSize();
|
2018-04-22 02:19:33 +02:00
|
|
|
|
2018-10-02 19:47:26 +02:00
|
|
|
// Add space for index buffer (keeping in mind non-core primitives)
|
|
|
|
switch (regs.draw.topology) {
|
|
|
|
case Maxwell::PrimitiveTopology::Quads:
|
|
|
|
buffer_size = Common::AlignUp<std::size_t>(buffer_size, 4) +
|
|
|
|
primitive_assembler.CalculateQuadSize(regs.vertex_buffer.count);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
if (is_indexed) {
|
|
|
|
buffer_size = Common::AlignUp<std::size_t>(buffer_size, 4) + CalculateIndexBufferSize();
|
|
|
|
}
|
|
|
|
break;
|
2018-03-24 08:59:51 +01:00
|
|
|
}
|
2018-04-08 06:00:11 +02:00
|
|
|
|
|
|
|
// Uniform space for the 5 shader stages
|
2018-08-10 09:45:38 +02:00
|
|
|
buffer_size =
|
2018-09-15 15:21:06 +02:00
|
|
|
Common::AlignUp<std::size_t>(buffer_size, 4) +
|
2018-08-10 09:45:38 +02:00
|
|
|
(sizeof(GLShader::MaxwellUniformData) + uniform_buffer_alignment) * Maxwell::MaxShaderStage;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-08-10 10:29:37 +02:00
|
|
|
// Add space for at least 18 constant buffers
|
|
|
|
buffer_size += Maxwell::MaxConstBuffers * (MaxConstbufferSize + uniform_buffer_alignment);
|
|
|
|
|
2018-11-06 21:26:27 +01:00
|
|
|
bool invalidate = buffer_cache.Map(buffer_size);
|
|
|
|
if (invalidate) {
|
|
|
|
// As all cached buffers are invalidated, we need to recheck their state.
|
2018-11-27 10:30:39 +01:00
|
|
|
gpu.dirty_flags.vertex_array = 0xFFFFFFFF;
|
2018-11-06 21:26:27 +01:00
|
|
|
}
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2019-01-06 05:53:27 +01:00
|
|
|
const GLuint vao = SetupVertexFormat();
|
|
|
|
SetupVertexBuffer(vao);
|
|
|
|
|
2018-10-02 19:47:26 +02:00
|
|
|
DrawParameters params = SetupDraw();
|
2018-10-07 04:17:31 +02:00
|
|
|
SetupShaders(params.primitive_mode);
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-08-29 00:27:03 +02:00
|
|
|
buffer_cache.Unmap();
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-04-07 11:22:08 +02:00
|
|
|
shader_program_manager->ApplyTo(state);
|
|
|
|
state.Apply();
|
2018-03-24 08:59:51 +01:00
|
|
|
|
2018-10-02 19:47:26 +02:00
|
|
|
// Execute draw call
|
|
|
|
params.DispatchDraw();
|
2018-03-24 08:59:51 +01:00
|
|
|
|
|
|
|
// Disable scissor test
|
2018-11-14 00:13:16 +01:00
|
|
|
state.viewports[0].scissor.enabled = false;
|
2018-03-24 08:59:51 +01:00
|
|
|
|
|
|
|
accelerate_draw = AccelDraw::Disabled;
|
|
|
|
|
|
|
|
// Unbind textures for potential future use as framebuffer attachments
|
|
|
|
for (auto& texture_unit : state.texture_units) {
|
2018-06-26 22:58:35 +02:00
|
|
|
texture_unit.Unbind();
|
2018-03-24 08:59:51 +01:00
|
|
|
}
|
|
|
|
state.Apply();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-09-08 10:05:56 +02:00
|
|
|
void RasterizerOpenGL::FlushAll() {}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-10-13 04:31:04 +02:00
|
|
|
void RasterizerOpenGL::FlushRegion(VAddr addr, u64 size) {
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
2018-10-14 22:09:01 +02:00
|
|
|
|
2018-10-16 23:02:29 +02:00
|
|
|
if (Settings::values.use_accurate_gpu_emulation) {
|
|
|
|
// Only flush if use_accurate_gpu_emulation is enabled, as it incurs a performance hit
|
2018-10-14 22:09:01 +02:00
|
|
|
res_cache.FlushRegion(addr, size);
|
|
|
|
}
|
2018-10-13 04:31:04 +02:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-08-28 03:35:15 +02:00
|
|
|
void RasterizerOpenGL::InvalidateRegion(VAddr addr, u64 size) {
|
2018-06-26 22:14:14 +02:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
|
|
|
res_cache.InvalidateRegion(addr, size);
|
2018-08-23 23:30:27 +02:00
|
|
|
shader_cache.InvalidateRegion(addr, size);
|
2019-01-08 21:30:10 +01:00
|
|
|
global_cache.InvalidateRegion(addr, size);
|
2018-08-29 00:27:03 +02:00
|
|
|
buffer_cache.InvalidateRegion(addr, size);
|
2018-06-26 22:14:14 +02:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-08-28 03:35:15 +02:00
|
|
|
void RasterizerOpenGL::FlushAndInvalidateRegion(VAddr addr, u64 size) {
|
2018-10-13 04:31:04 +02:00
|
|
|
FlushRegion(addr, size);
|
2018-08-23 21:44:41 +02:00
|
|
|
InvalidateRegion(addr, size);
|
2018-06-26 22:14:14 +02:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-10-06 05:39:03 +02:00
|
|
|
bool RasterizerOpenGL::AccelerateSurfaceCopy(const Tegra::Engines::Fermi2D::Regs::Surface& src,
|
|
|
|
const Tegra::Engines::Fermi2D::Regs::Surface& dst) {
|
2018-03-20 04:00:59 +01:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_Blits);
|
2018-10-18 02:32:29 +02:00
|
|
|
|
|
|
|
if (Settings::values.use_accurate_gpu_emulation) {
|
|
|
|
// Skip the accelerated copy and perform a slow but more accurate copy
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2018-10-06 05:39:03 +02:00
|
|
|
res_cache.FermiCopySurface(src, dst);
|
2018-03-20 04:00:59 +01:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2018-06-24 23:42:29 +02:00
|
|
|
bool RasterizerOpenGL::AccelerateDisplay(const Tegra::FramebufferConfig& config,
|
2018-08-21 01:34:02 +02:00
|
|
|
VAddr framebuffer_addr, u32 pixel_stride) {
|
2018-06-24 23:42:29 +02:00
|
|
|
if (!framebuffer_addr) {
|
|
|
|
return {};
|
|
|
|
}
|
|
|
|
|
|
|
|
MICROPROFILE_SCOPE(OpenGL_CacheManagement);
|
|
|
|
|
|
|
|
const auto& surface{res_cache.TryFindFramebufferSurface(framebuffer_addr)};
|
|
|
|
if (!surface) {
|
|
|
|
return {};
|
|
|
|
}
|
|
|
|
|
|
|
|
// Verify that the cached surface is the same size and format as the requested framebuffer
|
|
|
|
const auto& params{surface->GetSurfaceParams()};
|
2018-10-29 02:14:25 +01:00
|
|
|
const auto& pixel_format{
|
|
|
|
VideoCore::Surface::PixelFormatFromGPUPixelFormat(config.pixel_format)};
|
2018-06-24 23:42:29 +02:00
|
|
|
ASSERT_MSG(params.width == config.width, "Framebuffer width is different");
|
|
|
|
ASSERT_MSG(params.height == config.height, "Framebuffer height is different");
|
|
|
|
ASSERT_MSG(params.pixel_format == pixel_format, "Framebuffer pixel_format is different");
|
|
|
|
|
|
|
|
screen_info.display_texture = surface->Texture().handle;
|
|
|
|
|
|
|
|
return true;
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-03-27 04:42:54 +02:00
|
|
|
void RasterizerOpenGL::SamplerInfo::Create() {
|
|
|
|
sampler.Create();
|
|
|
|
mag_filter = min_filter = Tegra::Texture::TextureFilter::Linear;
|
2018-09-06 05:25:06 +02:00
|
|
|
wrap_u = wrap_v = wrap_p = Tegra::Texture::WrapMode::Wrap;
|
2018-09-19 07:18:20 +02:00
|
|
|
uses_depth_compare = false;
|
|
|
|
depth_compare_func = Tegra::Texture::DepthCompareFunc::Never;
|
2018-03-27 04:42:54 +02:00
|
|
|
|
|
|
|
// default is GL_LINEAR_MIPMAP_LINEAR
|
|
|
|
glSamplerParameteri(sampler.handle, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
|
|
|
|
// Other attributes have correct defaults
|
2018-09-19 07:18:20 +02:00
|
|
|
glSamplerParameteri(sampler.handle, GL_TEXTURE_COMPARE_FUNC, GL_NEVER);
|
2018-03-27 04:42:54 +02:00
|
|
|
}
|
|
|
|
|
2018-11-17 23:58:48 +01:00
|
|
|
void RasterizerOpenGL::SamplerInfo::SyncWithConfig(const Tegra::Texture::TSCEntry& config) {
|
2018-09-08 08:59:59 +02:00
|
|
|
const GLuint s = sampler.handle;
|
2018-03-27 04:42:54 +02:00
|
|
|
if (mag_filter != config.mag_filter) {
|
|
|
|
mag_filter = config.mag_filter;
|
2018-10-25 01:25:28 +02:00
|
|
|
glSamplerParameteri(
|
|
|
|
s, GL_TEXTURE_MAG_FILTER,
|
|
|
|
MaxwellToGL::TextureFilterMode(mag_filter, Tegra::Texture::TextureMipmapFilter::None));
|
2018-03-27 04:42:54 +02:00
|
|
|
}
|
2018-10-25 01:25:28 +02:00
|
|
|
if (min_filter != config.min_filter || mip_filter != config.mip_filter) {
|
2018-03-27 04:42:54 +02:00
|
|
|
min_filter = config.min_filter;
|
2018-10-25 01:25:28 +02:00
|
|
|
mip_filter = config.mip_filter;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_MIN_FILTER,
|
|
|
|
MaxwellToGL::TextureFilterMode(min_filter, mip_filter));
|
2018-03-27 04:42:54 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
if (wrap_u != config.wrap_u) {
|
|
|
|
wrap_u = config.wrap_u;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_WRAP_S, MaxwellToGL::WrapMode(wrap_u));
|
|
|
|
}
|
|
|
|
if (wrap_v != config.wrap_v) {
|
|
|
|
wrap_v = config.wrap_v;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_WRAP_T, MaxwellToGL::WrapMode(wrap_v));
|
|
|
|
}
|
2018-09-06 05:25:06 +02:00
|
|
|
if (wrap_p != config.wrap_p) {
|
|
|
|
wrap_p = config.wrap_p;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_WRAP_R, MaxwellToGL::WrapMode(wrap_p));
|
|
|
|
}
|
2018-03-27 04:42:54 +02:00
|
|
|
|
2018-09-19 07:18:20 +02:00
|
|
|
if (uses_depth_compare != (config.depth_compare_enabled == 1)) {
|
|
|
|
uses_depth_compare = (config.depth_compare_enabled == 1);
|
|
|
|
if (uses_depth_compare) {
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_COMPARE_MODE, GL_COMPARE_REF_TO_TEXTURE);
|
|
|
|
} else {
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_COMPARE_MODE, GL_NONE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (depth_compare_func != config.depth_compare_func) {
|
|
|
|
depth_compare_func = config.depth_compare_func;
|
|
|
|
glSamplerParameteri(s, GL_TEXTURE_COMPARE_FUNC,
|
|
|
|
MaxwellToGL::DepthCompareFunc(depth_compare_func));
|
|
|
|
}
|
|
|
|
|
2018-11-17 23:58:48 +01:00
|
|
|
GLvec4 new_border_color;
|
|
|
|
if (config.srgb_conversion) {
|
|
|
|
new_border_color[0] = config.srgb_border_color_r / 255.0f;
|
|
|
|
new_border_color[1] = config.srgb_border_color_g / 255.0f;
|
|
|
|
new_border_color[2] = config.srgb_border_color_g / 255.0f;
|
|
|
|
} else {
|
|
|
|
new_border_color[0] = config.border_color_r;
|
|
|
|
new_border_color[1] = config.border_color_g;
|
|
|
|
new_border_color[2] = config.border_color_b;
|
2018-03-27 04:42:54 +02:00
|
|
|
}
|
2018-11-17 23:58:48 +01:00
|
|
|
new_border_color[3] = config.border_color_a;
|
|
|
|
|
2018-11-14 01:23:23 +01:00
|
|
|
if (border_color != new_border_color) {
|
|
|
|
border_color = new_border_color;
|
|
|
|
glSamplerParameterfv(s, GL_TEXTURE_BORDER_COLOR, border_color.data());
|
2018-03-27 04:42:54 +02:00
|
|
|
}
|
2018-11-14 01:23:23 +01:00
|
|
|
|
2018-11-17 23:58:48 +01:00
|
|
|
const float anisotropic_max = static_cast<float>(1 << config.max_anisotropy.Value());
|
|
|
|
if (anisotropic_max != max_anisotropic) {
|
|
|
|
max_anisotropic = anisotropic_max;
|
2018-11-08 13:51:53 +01:00
|
|
|
if (GLAD_GL_ARB_texture_filter_anisotropic) {
|
2018-11-17 23:58:48 +01:00
|
|
|
glSamplerParameterf(s, GL_TEXTURE_MAX_ANISOTROPY, max_anisotropic);
|
2018-11-08 13:51:53 +01:00
|
|
|
} else if (GLAD_GL_EXT_texture_filter_anisotropic) {
|
2018-11-17 23:58:48 +01:00
|
|
|
glSamplerParameterf(s, GL_TEXTURE_MAX_ANISOTROPY_EXT, max_anisotropic);
|
2018-11-08 13:51:53 +01:00
|
|
|
}
|
2018-11-17 23:58:48 +01:00
|
|
|
}
|
|
|
|
const float lod_min = static_cast<float>(config.min_lod_clamp.Value()) / 256.0f;
|
|
|
|
if (lod_min != min_lod) {
|
|
|
|
min_lod = lod_min;
|
|
|
|
glSamplerParameterf(s, GL_TEXTURE_MIN_LOD, min_lod);
|
|
|
|
}
|
|
|
|
|
|
|
|
const float lod_max = static_cast<float>(config.max_lod_clamp.Value()) / 256.0f;
|
|
|
|
if (lod_max != max_lod) {
|
|
|
|
max_lod = lod_max;
|
|
|
|
glSamplerParameterf(s, GL_TEXTURE_MAX_LOD, max_lod);
|
|
|
|
}
|
|
|
|
const u32 bias = config.mip_lod_bias.Value();
|
|
|
|
// Sign extend the 13-bit value.
|
2018-11-21 04:40:32 +01:00
|
|
|
constexpr u32 mask = 1U << (13 - 1);
|
2018-11-17 23:58:48 +01:00
|
|
|
const float bias_lod = static_cast<s32>((bias ^ mask) - mask) / 256.f;
|
|
|
|
if (lod_bias != bias_lod) {
|
|
|
|
lod_bias = bias_lod;
|
|
|
|
glSamplerParameterf(s, GL_TEXTURE_LOD_BIAS, lod_bias);
|
2018-11-07 04:25:16 +01:00
|
|
|
}
|
2018-03-27 04:42:54 +02:00
|
|
|
}
|
|
|
|
|
2019-01-05 05:00:06 +01:00
|
|
|
void RasterizerOpenGL::SetupConstBuffers(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage,
|
|
|
|
const Shader& shader, GLuint program_handle,
|
|
|
|
BaseBindings base_bindings) {
|
2018-09-04 11:02:59 +02:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_UBO);
|
2018-07-21 00:31:36 +02:00
|
|
|
const auto& gpu = Core::System::GetInstance().GPU();
|
|
|
|
const auto& maxwell3d = gpu.Maxwell3D();
|
2018-09-15 15:21:06 +02:00
|
|
|
const auto& shader_stage = maxwell3d.state.shader_stages[static_cast<std::size_t>(stage)];
|
2018-12-21 02:29:15 +01:00
|
|
|
const auto& entries = shader->GetShaderEntries().const_buffers;
|
2018-04-15 18:15:54 +02:00
|
|
|
|
2018-09-13 02:27:43 +02:00
|
|
|
constexpr u64 max_binds = Tegra::Engines::Maxwell3D::Regs::MaxConstBuffers;
|
|
|
|
std::array<GLuint, max_binds> bind_buffers;
|
|
|
|
std::array<GLintptr, max_binds> bind_offsets;
|
|
|
|
std::array<GLsizeiptr, max_binds> bind_sizes;
|
|
|
|
|
|
|
|
ASSERT_MSG(entries.size() <= max_binds, "Exceeded expected number of binding points.");
|
|
|
|
|
2018-08-23 23:30:27 +02:00
|
|
|
// Upload only the enabled buffers from the 16 constbuffers of each shader stage
|
2018-04-15 18:15:54 +02:00
|
|
|
for (u32 bindpoint = 0; bindpoint < entries.size(); ++bindpoint) {
|
|
|
|
const auto& used_buffer = entries[bindpoint];
|
|
|
|
const auto& buffer = shader_stage.const_buffers[used_buffer.GetIndex()];
|
|
|
|
|
2018-08-08 08:07:44 +02:00
|
|
|
if (!buffer.enabled) {
|
2018-09-13 02:27:43 +02:00
|
|
|
// With disabled buffers set values as zero to unbind them
|
|
|
|
bind_buffers[bindpoint] = 0;
|
|
|
|
bind_offsets[bindpoint] = 0;
|
|
|
|
bind_sizes[bindpoint] = 0;
|
2018-08-08 08:07:44 +02:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2018-09-15 15:21:06 +02:00
|
|
|
std::size_t size = 0;
|
2018-06-10 01:02:05 +02:00
|
|
|
|
2018-06-06 05:34:37 +02:00
|
|
|
if (used_buffer.IsIndirect()) {
|
|
|
|
// Buffer is accessed indirectly, so upload the entire thing
|
2018-08-15 00:54:05 +02:00
|
|
|
size = buffer.size;
|
2018-06-27 05:07:34 +02:00
|
|
|
|
|
|
|
if (size > MaxConstbufferSize) {
|
2018-08-15 00:54:05 +02:00
|
|
|
LOG_CRITICAL(HW_GPU, "indirect constbuffer size {} exceeds maximum {}", size,
|
|
|
|
MaxConstbufferSize);
|
2018-06-27 05:07:34 +02:00
|
|
|
size = MaxConstbufferSize;
|
|
|
|
}
|
2018-06-06 05:34:37 +02:00
|
|
|
} else {
|
|
|
|
// Buffer is accessed directly, upload just what we use
|
2019-01-28 22:11:23 +01:00
|
|
|
size = used_buffer.GetSize();
|
2018-06-06 05:34:37 +02:00
|
|
|
}
|
|
|
|
|
2018-06-10 01:02:05 +02:00
|
|
|
// Align the actual size so it ends up being a multiple of vec4 to meet the OpenGL std140
|
|
|
|
// UBO alignment requirements.
|
|
|
|
size = Common::AlignUp(size, sizeof(GLvec4));
|
|
|
|
ASSERT_MSG(size <= MaxConstbufferSize, "Constbuffer too big");
|
|
|
|
|
2019-01-05 05:00:06 +01:00
|
|
|
const GLintptr const_buffer_offset = buffer_cache.UploadMemory(
|
2018-09-15 15:21:06 +02:00
|
|
|
buffer.address, size, static_cast<std::size_t>(uniform_buffer_alignment));
|
2018-04-15 18:18:09 +02:00
|
|
|
|
2018-09-13 02:27:43 +02:00
|
|
|
// Prepare values for multibind
|
|
|
|
bind_buffers[bindpoint] = buffer_cache.GetHandle();
|
|
|
|
bind_offsets[bindpoint] = const_buffer_offset;
|
|
|
|
bind_sizes[bindpoint] = size;
|
2018-04-14 18:50:15 +02:00
|
|
|
}
|
|
|
|
|
2019-01-05 05:00:06 +01:00
|
|
|
// The first binding is reserved for emulation values
|
|
|
|
const GLuint ubo_base_binding = base_bindings.cbuf + 1;
|
|
|
|
glBindBuffersRange(GL_UNIFORM_BUFFER, ubo_base_binding, static_cast<GLsizei>(entries.size()),
|
2018-09-13 02:27:43 +02:00
|
|
|
bind_buffers.data(), bind_offsets.data(), bind_sizes.data());
|
2018-04-14 18:50:15 +02:00
|
|
|
}
|
|
|
|
|
2019-01-05 05:00:06 +01:00
|
|
|
void RasterizerOpenGL::SetupGlobalRegions(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage,
|
|
|
|
const Shader& shader, GLenum primitive_mode,
|
|
|
|
BaseBindings base_bindings) {
|
|
|
|
// TODO(Rodrigo): Use ARB_multi_bind here
|
|
|
|
const auto& entries = shader->GetShaderEntries().global_memory_entries;
|
|
|
|
|
|
|
|
for (u32 bindpoint = 0; bindpoint < static_cast<u32>(entries.size()); ++bindpoint) {
|
|
|
|
const auto& entry = entries[bindpoint];
|
|
|
|
const u32 current_bindpoint = base_bindings.gmem + bindpoint;
|
|
|
|
const auto& region = global_cache.GetGlobalRegion(entry, stage);
|
2019-01-05 05:01:38 +01:00
|
|
|
|
|
|
|
glBindBufferBase(GL_SHADER_STORAGE_BUFFER, current_bindpoint, region->GetBufferHandle());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-01-05 05:00:06 +01:00
|
|
|
void RasterizerOpenGL::SetupTextures(Maxwell::ShaderStage stage, const Shader& shader,
|
|
|
|
GLuint program_handle, BaseBindings base_bindings) {
|
2018-09-04 11:02:59 +02:00
|
|
|
MICROPROFILE_SCOPE(OpenGL_Texture);
|
2018-07-21 00:31:36 +02:00
|
|
|
const auto& gpu = Core::System::GetInstance().GPU();
|
|
|
|
const auto& maxwell3d = gpu.Maxwell3D();
|
2018-12-21 02:29:15 +01:00
|
|
|
const auto& entries = shader->GetShaderEntries().samplers;
|
2018-06-06 19:58:16 +02:00
|
|
|
|
2019-01-05 05:00:06 +01:00
|
|
|
ASSERT_MSG(base_bindings.sampler + entries.size() <= std::size(state.texture_units),
|
2018-06-06 19:58:16 +02:00
|
|
|
"Exceeded the number of active textures.");
|
|
|
|
|
|
|
|
for (u32 bindpoint = 0; bindpoint < entries.size(); ++bindpoint) {
|
|
|
|
const auto& entry = entries[bindpoint];
|
2019-01-15 05:07:57 +01:00
|
|
|
const auto texture = maxwell3d.GetStageTexture(stage, entry.GetOffset());
|
2019-01-05 05:00:06 +01:00
|
|
|
const u32 current_bindpoint = base_bindings.sampler + bindpoint;
|
2018-06-06 19:58:16 +02:00
|
|
|
|
2018-11-17 23:58:48 +01:00
|
|
|
texture_samplers[current_bindpoint].SyncWithConfig(texture.tsc);
|
2019-01-05 05:00:06 +01:00
|
|
|
|
2018-09-14 17:42:28 +02:00
|
|
|
Surface surface = res_cache.GetTextureSurface(texture, entry);
|
2018-06-06 19:58:16 +02:00
|
|
|
if (surface != nullptr) {
|
2019-01-15 05:07:57 +01:00
|
|
|
state.texture_units[current_bindpoint].texture =
|
2018-12-29 21:51:32 +01:00
|
|
|
entry.IsArray() ? surface->TextureLayer().handle : surface->Texture().handle;
|
2019-01-07 03:02:27 +01:00
|
|
|
surface->UpdateSwizzle(texture.tic.x_source, texture.tic.y_source, texture.tic.z_source,
|
|
|
|
texture.tic.w_source);
|
2018-06-06 19:58:16 +02:00
|
|
|
} else {
|
|
|
|
// Can occur when texture addr is null or its memory is unmapped/invalid
|
2019-01-15 05:07:57 +01:00
|
|
|
state.texture_units[current_bindpoint].texture = 0;
|
2018-06-06 19:58:16 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-11-08 02:27:47 +01:00
|
|
|
void RasterizerOpenGL::SyncViewport(OpenGLState& current_state) {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-11-25 16:18:29 +01:00
|
|
|
const bool geometry_shaders_enabled =
|
|
|
|
regs.IsShaderConfigEnabled(static_cast<size_t>(Maxwell::ShaderProgram::Geometry));
|
|
|
|
const std::size_t viewport_count =
|
|
|
|
geometry_shaders_enabled ? Tegra::Engines::Maxwell3D::Regs::NumViewports : 1;
|
|
|
|
for (std::size_t i = 0; i < viewport_count; i++) {
|
2018-11-08 02:27:47 +01:00
|
|
|
auto& viewport = current_state.viewports[i];
|
2018-11-24 17:15:14 +01:00
|
|
|
const auto& src = regs.viewports[i];
|
2018-11-27 04:04:33 +01:00
|
|
|
const MathUtil::Rectangle<s32> viewport_rect{regs.viewport_transform[i].GetRect()};
|
|
|
|
viewport.x = viewport_rect.left;
|
|
|
|
viewport.y = viewport_rect.bottom;
|
|
|
|
viewport.width = viewport_rect.GetWidth();
|
|
|
|
viewport.height = viewport_rect.GetHeight();
|
2018-11-14 00:13:16 +01:00
|
|
|
viewport.depth_range_far = regs.viewports[i].depth_range_far;
|
|
|
|
viewport.depth_range_near = regs.viewports[i].depth_range_near;
|
2018-11-02 04:21:25 +01:00
|
|
|
}
|
2018-11-23 16:11:21 +01:00
|
|
|
state.depth_clamp.far_plane = regs.view_volume_clip_control.depth_clamp_far != 0;
|
|
|
|
state.depth_clamp.near_plane = regs.view_volume_clip_control.depth_clamp_near != 0;
|
2018-03-27 02:45:10 +02:00
|
|
|
}
|
|
|
|
|
2018-11-29 20:13:13 +01:00
|
|
|
void RasterizerOpenGL::SyncClipEnabled(
|
|
|
|
const std::array<bool, Maxwell::Regs::NumClipDistances>& clip_mask) {
|
|
|
|
|
2018-11-27 00:45:21 +01:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-11-29 20:13:13 +01:00
|
|
|
const std::array<bool, Maxwell::Regs::NumClipDistances> reg_state{
|
|
|
|
regs.clip_distance_enabled.c0 != 0, regs.clip_distance_enabled.c1 != 0,
|
|
|
|
regs.clip_distance_enabled.c2 != 0, regs.clip_distance_enabled.c3 != 0,
|
|
|
|
regs.clip_distance_enabled.c4 != 0, regs.clip_distance_enabled.c5 != 0,
|
|
|
|
regs.clip_distance_enabled.c6 != 0, regs.clip_distance_enabled.c7 != 0};
|
|
|
|
|
|
|
|
for (std::size_t i = 0; i < Maxwell::Regs::NumClipDistances; ++i) {
|
|
|
|
state.clip_distance[i] = reg_state[i] && clip_mask[i];
|
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncClipCoef() {
|
2018-11-29 20:13:13 +01:00
|
|
|
UNIMPLEMENTED();
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncCullMode() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-07-02 20:33:41 +02:00
|
|
|
|
2018-08-10 16:39:46 +02:00
|
|
|
state.cull.enabled = regs.cull.enabled != 0;
|
2018-07-03 04:22:25 +02:00
|
|
|
|
|
|
|
if (state.cull.enabled) {
|
|
|
|
state.cull.front_face = MaxwellToGL::FrontFace(regs.cull.front_face);
|
|
|
|
state.cull.mode = MaxwellToGL::CullFace(regs.cull.cull_face);
|
2018-07-04 17:26:46 +02:00
|
|
|
|
2018-07-08 18:27:15 +02:00
|
|
|
const bool flip_triangles{regs.screen_y_control.triangle_rast_flip == 0 ||
|
|
|
|
regs.viewport_transform[0].scale_y < 0.0f};
|
|
|
|
|
2018-07-04 17:26:46 +02:00
|
|
|
// If the GPU is configured to flip the rasterized triangles, then we need to flip the
|
|
|
|
// notion of front and back. Note: We flip the triangles when the value of the register is 0
|
|
|
|
// because OpenGL already does it for us.
|
2018-07-08 18:27:15 +02:00
|
|
|
if (flip_triangles) {
|
2018-07-04 17:26:46 +02:00
|
|
|
if (state.cull.front_face == GL_CCW)
|
|
|
|
state.cull.front_face = GL_CW;
|
|
|
|
else if (state.cull.front_face == GL_CW)
|
|
|
|
state.cull.front_face = GL_CCW;
|
|
|
|
}
|
2018-07-03 04:22:25 +02:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
|
|
|
|
2018-10-26 01:04:13 +02:00
|
|
|
void RasterizerOpenGL::SyncPrimitiveRestart() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
|
|
|
state.primitive_restart.enabled = regs.primitive_restart.enabled;
|
|
|
|
state.primitive_restart.index = regs.primitive_restart.index;
|
|
|
|
}
|
|
|
|
|
2018-07-02 20:33:06 +02:00
|
|
|
void RasterizerOpenGL::SyncDepthTestState() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-07-02 20:33:06 +02:00
|
|
|
|
|
|
|
state.depth.test_enabled = regs.depth_test_enable != 0;
|
|
|
|
state.depth.write_mask = regs.depth_write_enabled ? GL_TRUE : GL_FALSE;
|
2018-07-03 04:02:46 +02:00
|
|
|
|
|
|
|
if (!state.depth.test_enabled)
|
|
|
|
return;
|
|
|
|
|
2018-07-02 20:33:06 +02:00
|
|
|
state.depth.test_func = MaxwellToGL::ComparisonOp(regs.depth_test_func);
|
|
|
|
}
|
|
|
|
|
2018-08-22 06:35:31 +02:00
|
|
|
void RasterizerOpenGL::SyncStencilTestState() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
state.stencil.test_enabled = regs.stencil_enable != 0;
|
|
|
|
|
|
|
|
if (!regs.stencil_enable) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
state.stencil.front.test_func = MaxwellToGL::ComparisonOp(regs.stencil_front_func_func);
|
|
|
|
state.stencil.front.test_ref = regs.stencil_front_func_ref;
|
|
|
|
state.stencil.front.test_mask = regs.stencil_front_func_mask;
|
|
|
|
state.stencil.front.action_stencil_fail = MaxwellToGL::StencilOp(regs.stencil_front_op_fail);
|
|
|
|
state.stencil.front.action_depth_fail = MaxwellToGL::StencilOp(regs.stencil_front_op_zfail);
|
|
|
|
state.stencil.front.action_depth_pass = MaxwellToGL::StencilOp(regs.stencil_front_op_zpass);
|
|
|
|
state.stencil.front.write_mask = regs.stencil_front_mask;
|
2018-11-07 04:27:12 +01:00
|
|
|
if (regs.stencil_two_side_enable) {
|
2018-11-07 04:25:16 +01:00
|
|
|
state.stencil.back.test_func = MaxwellToGL::ComparisonOp(regs.stencil_back_func_func);
|
|
|
|
state.stencil.back.test_ref = regs.stencil_back_func_ref;
|
|
|
|
state.stencil.back.test_mask = regs.stencil_back_func_mask;
|
|
|
|
state.stencil.back.action_stencil_fail = MaxwellToGL::StencilOp(regs.stencil_back_op_fail);
|
|
|
|
state.stencil.back.action_depth_fail = MaxwellToGL::StencilOp(regs.stencil_back_op_zfail);
|
|
|
|
state.stencil.back.action_depth_pass = MaxwellToGL::StencilOp(regs.stencil_back_op_zpass);
|
|
|
|
state.stencil.back.write_mask = regs.stencil_back_mask;
|
2018-11-07 04:27:12 +01:00
|
|
|
} else {
|
|
|
|
state.stencil.back.test_func = GL_ALWAYS;
|
|
|
|
state.stencil.back.test_ref = 0;
|
|
|
|
state.stencil.back.test_mask = 0xFFFFFFFF;
|
|
|
|
state.stencil.back.write_mask = 0xFFFFFFFF;
|
|
|
|
state.stencil.back.action_stencil_fail = GL_KEEP;
|
|
|
|
state.stencil.back.action_depth_fail = GL_KEEP;
|
|
|
|
state.stencil.back.action_depth_pass = GL_KEEP;
|
|
|
|
}
|
2018-08-22 06:35:31 +02:00
|
|
|
}
|
|
|
|
|
2018-11-05 03:46:06 +01:00
|
|
|
void RasterizerOpenGL::SyncColorMask() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-11-16 17:48:10 +01:00
|
|
|
const std::size_t count =
|
2018-11-14 01:23:23 +01:00
|
|
|
regs.independent_blend_enable ? Tegra::Engines::Maxwell3D::Regs::NumRenderTargets : 1;
|
2018-11-16 17:48:10 +01:00
|
|
|
for (std::size_t i = 0; i < count; i++) {
|
2018-11-05 03:46:06 +01:00
|
|
|
const auto& source = regs.color_mask[regs.color_mask_common ? 0 : i];
|
|
|
|
auto& dest = state.color_mask[i];
|
|
|
|
dest.red_enabled = (source.R == 0) ? GL_FALSE : GL_TRUE;
|
|
|
|
dest.green_enabled = (source.G == 0) ? GL_FALSE : GL_TRUE;
|
|
|
|
dest.blue_enabled = (source.B == 0) ? GL_FALSE : GL_TRUE;
|
|
|
|
dest.alpha_enabled = (source.A == 0) ? GL_FALSE : GL_TRUE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-11-14 04:02:54 +01:00
|
|
|
void RasterizerOpenGL::SyncMultiSampleState() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
state.multisample_control.alpha_to_coverage = regs.multisample_control.alpha_to_coverage != 0;
|
|
|
|
state.multisample_control.alpha_to_one = regs.multisample_control.alpha_to_one != 0;
|
|
|
|
}
|
|
|
|
|
2018-11-14 02:09:01 +01:00
|
|
|
void RasterizerOpenGL::SyncFragmentColorClampState() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
state.fragment_color_clamp.enabled = regs.frag_color_clamp != 0;
|
|
|
|
}
|
|
|
|
|
2018-06-09 00:05:52 +02:00
|
|
|
void RasterizerOpenGL::SyncBlendState() {
|
2018-07-19 00:10:06 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-03-20 04:00:59 +01:00
|
|
|
|
2018-11-02 04:21:25 +01:00
|
|
|
state.blend_color.red = regs.blend_color.r;
|
|
|
|
state.blend_color.green = regs.blend_color.g;
|
|
|
|
state.blend_color.blue = regs.blend_color.b;
|
|
|
|
state.blend_color.alpha = regs.blend_color.a;
|
|
|
|
|
|
|
|
state.independant_blend.enabled = regs.independent_blend_enable;
|
|
|
|
if (!state.independant_blend.enabled) {
|
|
|
|
auto& blend = state.blend[0];
|
2018-11-18 07:44:48 +01:00
|
|
|
const auto& src = regs.blend;
|
|
|
|
blend.enabled = src.enable[0] != 0;
|
|
|
|
if (blend.enabled) {
|
|
|
|
blend.rgb_equation = MaxwellToGL::BlendEquation(src.equation_rgb);
|
|
|
|
blend.src_rgb_func = MaxwellToGL::BlendFunc(src.factor_source_rgb);
|
|
|
|
blend.dst_rgb_func = MaxwellToGL::BlendFunc(src.factor_dest_rgb);
|
|
|
|
blend.a_equation = MaxwellToGL::BlendEquation(src.equation_a);
|
|
|
|
blend.src_a_func = MaxwellToGL::BlendFunc(src.factor_source_a);
|
|
|
|
blend.dst_a_func = MaxwellToGL::BlendFunc(src.factor_dest_a);
|
2018-11-02 04:21:25 +01:00
|
|
|
}
|
2018-11-16 17:48:10 +01:00
|
|
|
for (std::size_t i = 1; i < Tegra::Engines::Maxwell3D::Regs::NumRenderTargets; i++) {
|
2018-11-02 04:21:25 +01:00
|
|
|
state.blend[i].enabled = false;
|
|
|
|
}
|
2018-06-09 00:05:52 +02:00
|
|
|
return;
|
2018-11-02 04:21:25 +01:00
|
|
|
}
|
2018-06-09 00:05:52 +02:00
|
|
|
|
2018-11-16 17:48:10 +01:00
|
|
|
for (std::size_t i = 0; i < Tegra::Engines::Maxwell3D::Regs::NumRenderTargets; i++) {
|
2018-11-02 04:21:25 +01:00
|
|
|
auto& blend = state.blend[i];
|
2018-11-18 07:44:48 +01:00
|
|
|
const auto& src = regs.independent_blend[i];
|
2018-11-02 04:21:25 +01:00
|
|
|
blend.enabled = regs.blend.enable[i] != 0;
|
|
|
|
if (!blend.enabled)
|
|
|
|
continue;
|
2018-11-18 07:44:48 +01:00
|
|
|
blend.rgb_equation = MaxwellToGL::BlendEquation(src.equation_rgb);
|
|
|
|
blend.src_rgb_func = MaxwellToGL::BlendFunc(src.factor_source_rgb);
|
|
|
|
blend.dst_rgb_func = MaxwellToGL::BlendFunc(src.factor_dest_rgb);
|
|
|
|
blend.a_equation = MaxwellToGL::BlendEquation(src.equation_a);
|
|
|
|
blend.src_a_func = MaxwellToGL::BlendFunc(src.factor_source_a);
|
|
|
|
blend.dst_a_func = MaxwellToGL::BlendFunc(src.factor_dest_a);
|
2018-11-02 04:21:25 +01:00
|
|
|
}
|
2018-03-20 04:00:59 +01:00
|
|
|
}
|
2018-08-21 01:44:47 +02:00
|
|
|
|
|
|
|
void RasterizerOpenGL::SyncLogicOpState() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
|
|
|
state.logic_op.enabled = regs.logic_op.enable != 0;
|
|
|
|
|
|
|
|
if (!state.logic_op.enabled)
|
|
|
|
return;
|
|
|
|
|
2018-08-24 04:59:50 +02:00
|
|
|
ASSERT_MSG(regs.blend.enable[0] == 0,
|
|
|
|
"Blending and logic op can't be enabled at the same time.");
|
2018-08-21 01:44:47 +02:00
|
|
|
|
|
|
|
state.logic_op.operation = MaxwellToGL::LogicOp(regs.logic_op.operation);
|
|
|
|
}
|
2018-08-21 10:18:27 +02:00
|
|
|
|
2018-11-21 04:40:32 +01:00
|
|
|
void RasterizerOpenGL::SyncScissorTest(OpenGLState& current_state) {
|
2018-10-09 02:49:36 +02:00
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-11-25 16:18:29 +01:00
|
|
|
const bool geometry_shaders_enabled =
|
|
|
|
regs.IsShaderConfigEnabled(static_cast<size_t>(Maxwell::ShaderProgram::Geometry));
|
|
|
|
const std::size_t viewport_count =
|
|
|
|
geometry_shaders_enabled ? Tegra::Engines::Maxwell3D::Regs::NumViewports : 1;
|
|
|
|
for (std::size_t i = 0; i < viewport_count; i++) {
|
2018-11-14 00:13:16 +01:00
|
|
|
const auto& src = regs.scissor_test[i];
|
2018-11-21 04:40:32 +01:00
|
|
|
auto& dst = current_state.viewports[i].scissor;
|
2018-11-14 00:13:16 +01:00
|
|
|
dst.enabled = (src.enable != 0);
|
|
|
|
if (dst.enabled == 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
const u32 width = src.max_x - src.min_x;
|
|
|
|
const u32 height = src.max_y - src.min_y;
|
|
|
|
dst.x = src.min_x;
|
|
|
|
dst.y = src.min_y;
|
|
|
|
dst.width = width;
|
|
|
|
dst.height = height;
|
2018-10-09 02:49:36 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-09-26 00:41:21 +02:00
|
|
|
void RasterizerOpenGL::SyncTransformFeedback() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
|
|
|
if (regs.tfb_enabled != 0) {
|
|
|
|
LOG_CRITICAL(Render_OpenGL, "Transform feedbacks are not implemented");
|
|
|
|
UNREACHABLE();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-09-28 06:31:01 +02:00
|
|
|
void RasterizerOpenGL::SyncPointState() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
2018-11-14 00:15:13 +01:00
|
|
|
state.point.size = regs.point_size;
|
2018-09-28 06:31:01 +02:00
|
|
|
}
|
|
|
|
|
2018-11-27 00:31:44 +01:00
|
|
|
void RasterizerOpenGL::SyncPolygonOffset() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
state.polygon_offset.fill_enable = regs.polygon_offset_fill_enable != 0;
|
|
|
|
state.polygon_offset.line_enable = regs.polygon_offset_line_enable != 0;
|
|
|
|
state.polygon_offset.point_enable = regs.polygon_offset_point_enable != 0;
|
|
|
|
state.polygon_offset.units = regs.polygon_offset_units;
|
|
|
|
state.polygon_offset.factor = regs.polygon_offset_factor;
|
|
|
|
state.polygon_offset.clamp = regs.polygon_offset_clamp;
|
|
|
|
}
|
|
|
|
|
2018-10-12 02:29:11 +02:00
|
|
|
void RasterizerOpenGL::CheckAlphaTests() {
|
|
|
|
const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
|
|
|
|
|
|
|
|
if (regs.alpha_test_enabled != 0 && regs.rt_control.count > 1) {
|
2018-11-08 02:27:47 +01:00
|
|
|
LOG_CRITICAL(Render_OpenGL, "Alpha Testing is enabled with Multiple Render Targets, "
|
|
|
|
"this behavior is undefined.");
|
2018-10-12 02:29:11 +02:00
|
|
|
UNREACHABLE();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-08-21 10:18:27 +02:00
|
|
|
} // namespace OpenGL
|