Now that we fuzz against Unicorn, we aren't just restricted to VFPv2.
VFPv3 and VFPv4 facilities can now be implemented. This renames
constructs mentioning VFPv2 to just refer to VFP.
Implements the ARM-mode variants of the CRC32 instructions introduced
within ARMv8. This is also one of the instruction cases where there is
UNPREDICTABLE behavior that is constrained (we must do one of the
options indicated by the reference manual).
In both documented cases of constrained unpredictable behavior, we treat
the instructions as unpredictable in order to allow library users to
hook the unpredictable exception to provide the intended behavior they
desire.
We also make the arrays static here, as MSVC tends to load the whole
array every time the function is called, instead of storing the data
within rodata.
This also line breaks the elements a little earlier for readability.
With deduction guides, we can eliminate the need to explicitly size the
array. Also newlines the elements based off their relation, making it
slightly nicer to read.
Replaces type aliases of raw integral types with the more type-safe Imm
template, like how the AArch64 frontend has been using it.
This makes the two frontends more consistent with one another.
Avoids potentially dumping boost, fmt, and xbyak targets into a
top-level namespace without any qualification, which can lead to build
errors in projects that already make use of them.
The SetRegister() IR function doesn't allow specifying the PC as a
register. This is a discrepancy that slipped through (my bad). Instead,
we can use BranchWritePC(), like how the other similar PC modifying
locations do it.
This'll reduce the amount of noise necessary in changes implementing
half-precision instructions, as the type can just be prepended to the
switch cases, instead of rewriting the whole if/else branch.
Provides basic implementations of the barrier instruction introduced
within ARMv7. Currently these simply mirror the behavior of the AArch64
equivalents.
Performs a similar tidying up of the Thumb translator, like what was
done with the regular ARM translator to make it consistent with the rest
of the codebase.
The A32 backend (both Thumb and ARM), will likely see more changes to it
in the near future, so this just acts as a "dusting off".
Now that the constructor and destructors have been placed within the cpp
file, we can forward declare the memory pool data structures. Now, a
change to the memory pool code won't ripple across the entirety of the
IR emitter.
While initially done to potentially prevent creating bugs due to C++
having a silly type-promotion mechanism involving types < sizeof(int)
and unsignedness, given that the bulk of these functions' usages
are on exit paths, these can return the correct type to avoid the need
to cast at every usage point.
Prevents potentially inlining allocation code everywhere. While we're at
it, also explicitly delete/default the copy/move constructor/assignment
operators to be explicit about them.
