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1087 commits

Author SHA1 Message Date
Lioncash
bfa8035414 A32/A64: Make public header inclusions consistent 
For all public header inclusions, we use the <> form of including them
as opposed to "", which we typically use for internal headers.
 2020-04-22 21:04:22 +01:00
Lioncash
fb7d33830c A32: Make includes consistent 
Normalizes includes to be relative to the project root, like the rest of
the includes in the project.
 2020-04-22 21:04:22 +01:00
MerryMage
7d20f3b861 A32/translate_thumb: Split off implementation into thumb16 and thumb32 2020-04-22 21:04:22 +01:00
MerryMage
e639aa1583 A32/translate: Rename translate_arm directory to impl 
Mirror what the A64 frontend does.
 2020-04-22 21:04:22 +01:00
MerryMage
5f8eb7c51c A32/location_descriptor: Add CPSR.IT to A32::LocationDescriptor 2020-04-22 21:04:22 +01:00
MerryMage
13f65f55eb PSR: Use Common::ModifyBit{,s} 2020-04-22 21:04:22 +01:00
MerryMage
74633301c1 A32: Add ITState 2020-04-22 21:04:22 +01:00
MerryMage
6e2cd35e4f a32_jitstate: Optimize runtime location descriptor calculation 
Calculation is now one unaligned 64-bit load.
 2020-04-22 21:04:22 +01:00
MerryMage
f178562ee7 a32_jitstate: Remove exception trap enables from FPSCR_MODE_MASK 
We don't currently use this for anything (we do not currently trap
floating point exceptions).

This frees these bits up for other purposes.
 2020-04-22 21:04:21 +01:00
Merry
fd6222f0a1 Merge pull request #500 from lioncash/cbz 
A32: Implement Thumb-1's CBZ/CBNZ instructions
 2020-04-22 21:04:21 +01:00
Merry
bab4e29075 Merge pull request #498 from lioncash/ahp 
A32/location_descriptor: Add AHP bit to the FPSCR mask
 2020-04-22 21:04:21 +01:00
Lioncash
87083af733 general: Remove trailing spaces 
General code-related cleanup. Gets rid of trailing spaces in the
codebase.
 2020-04-22 21:04:21 +01:00
Lioncash
03e6899fd7 A32: Implement Thumb-1's CBZ/CBNZ instructions 
Introduced in ARMv6T2, this allows for short forward branches.
 2020-04-22 21:02:47 +01:00
Lioncash
d02a4e6fc9 A32/location_descriptor: Add AHP bit to the FPSCR mask 
Ensures the alternate half-precision state is preserved within the
location descriptors, which will be necessary when implementing the
half-precision extensions for VFP and NEON.
 2020-04-22 21:02:47 +01:00
Merry
f4990a5f6b Merge pull request #499 from lioncash/movw 
A32: Implement ARM-mode MOVW
 2020-04-22 21:02:47 +01:00
Lioncash
bd755ae494 frontend/ir/ir_emitter: Add A32 equivalent to A64's SetCheckBit 
This will be used in a subsequent change to implement ARMv6T2's CBZ/CBNZ
Thumb-1 instructions.
 2020-04-22 21:02:47 +01:00
Lioncash
106c8c2473 A32: Implement ARM-mode MOVW 
Introduced to the ISA in ARMv6T2
 2020-04-22 21:02:47 +01:00
Lioncash
9935f3aa28 A32: Implement Thumb-1 variant of SEVL 
While we're at it, also add the Thumb-2 encoding to the encoding table
to make sure it isn't forgotten about in the future.
 2020-04-22 21:02:47 +01:00
Lioncash
9a097e307f A32: Implement the ARM-mode variant of SEVL 2020-04-22 21:02:47 +01:00
Lioncash
e89ca42048 A32: Implement Thumb-1 variant of YIELD 2020-04-22 21:02:47 +01:00
Lioncash
ebab7ede55 A32: Implement Thumb-1 variant of WFI 2020-04-22 21:02:47 +01:00
Lioncash
b4110af22a A32: Implement Thumb-1 variant of WFE 2020-04-22 21:02:47 +01:00
Lioncash
57675fe592 A32: Implement Thumb-1 variant of SEV 2020-04-22 21:02:47 +01:00
Lioncash
07699b47ba A32/translate_thumb: Add helper function for raising exceptions 
Similar to the variant within the ARM-mode translator visitor. This will
be used in subsequent changes to implement the hint instructions
introduced in ARMv7.
 2020-04-22 21:02:47 +01:00
Lioncash
f74762ae4e frontend/decoder/decoder_detail: Replace std::is_same, with std::is_same_v 
Same thing, same readability, less characters.
 2020-04-22 21:02:47 +01:00
Lioncash
64879396f6 A32: Implement Thumb-1 variant of NOP 2020-04-22 21:02:47 +01:00
Merry
6a67da1225 Merge pull request #493 from lioncash/ir 
frontend/ir/ir_emitter: Remove unnecessary logical shift overloads
 2020-04-22 21:02:47 +01:00
Merry
81b908b077 Merge pull request #495 from lioncash/bkpt 
A32: Implement Thumb-16's variant of BKPT
 2020-04-22 21:02:47 +01:00
Merry
30d28029a8 Merge pull request #492 from lioncash/vfp 
A32: Rename vfp2-related files to vfp
 2020-04-22 21:02:47 +01:00
Lioncash
b17a5d3365 A32: Implement Thumb-16's variant of BKPT 2020-04-22 21:02:47 +01:00
Lioncash
b902f72001 A32/disassembler_arm: Remove <unimplemented> from hint instruction output 
Given we now support hooking these hint instructions, we can consider
them implemented.
 2020-04-22 21:02:47 +01:00
Lioncash
0fa0bca22a A32: Handle different variants of PLD 2020-04-22 21:02:47 +01:00
Lioncash
c6f99235e1 frontend/ir/ir_emitter: Remove unnecessary logical shift overloads 
These aren't necessary anymore, now that the U32U64 overload already
exists.
 2020-04-22 21:02:46 +01:00
Merry
9ba503e394 Merge pull request #491 from lioncash/hint 
A32: Allow hooking of hint instructions in ARM mode.
 2020-04-22 21:02:46 +01:00
Lioncash
97277c598b A32: Rename vfp2-related files to vfp 
Now that we fuzz against Unicorn, we aren't just restricted to VFPv2.
VFPv3 and VFPv4 facilities can now be implemented. This renames
constructs mentioning VFPv2 to just refer to VFP.
 2020-04-22 21:02:46 +01:00
Lioncash
8c3122ff46 A64/translate/impl/impl: Mark locals const where applicable in DecodeBitMasks() 
Follows the convention of making immutable state explicit.
 2020-04-22 21:02:46 +01:00
Merry
a132b56d57 Merge pull request #490 from lioncash/crc32 
A32: Implement ARM-mode CRC32 instructions
 2020-04-22 21:02:46 +01:00
Lioncash
966e04d03d A32: Allow hooking of hint instructions in ARM mode. 
Mirrors the hooking functionality from the AArch64 frontend to make the
behavior of both consistent.
 2020-04-22 21:02:46 +01:00
Lioncash
134b586c5c frontend/ir/ir_emitter: Amend arguments to conversion opcodes 
Accidentally caused within 967d1fcc8d6f60749a162a96b997439450fed687.
That one's on me. My bad.
 2020-04-22 21:02:46 +01:00
Lioncash
e37689315d A32: Implement ARM-mode CRC32 instructions 
Implements the ARM-mode variants of the CRC32 instructions introduced
within ARMv8. This is also one of the instruction cases where there is
UNPREDICTABLE behavior that is constrained (we must do one of the
options indicated by the reference manual).

In both documented cases of constrained unpredictable behavior, we treat
the instructions as unpredictable in order to allow library users to
hook the unpredictable exception to provide the intended behavior they
desire.
 2020-04-22 21:02:46 +01:00
Lioncash
95d9baea67 {A32, A64}/types: Use std::array deduction guides where applicable 
We also make the arrays static here, as MSVC tends to load the whole
array every time the function is called, instead of storing the data
within rodata.

This also line breaks the elements a little earlier for readability.
 2020-04-22 21:02:46 +01:00
Lioncash
bac945f2d8 A32: Resolve parameter discrepancies discovered via use of the Imm template 2020-04-22 21:02:46 +01:00
Lioncash
e4c65721fe frontend/ir/type: Generify std::array declaration 
With deduction guides, we can eliminate the need to explicitly size the
array. Also newlines the elements based off their relation, making it
slightly nicer to read.
 2020-04-22 21:02:46 +01:00
Lioncash
4ba2318b2e A32: Replace immediate type aliases with the Imm template 
Replaces type aliases of raw integral types with the more type-safe Imm
template, like how the AArch64 frontend has been using it.

This makes the two frontends more consistent with one another.
 2020-04-22 21:02:46 +01:00
Lioncash
f96036b3f1 A32/barrier: Correct PC assignment within ISB 
The SetRegister() IR function doesn't allow specifying the PC as a
register. This is a discrepancy that slipped through (my bad). Instead,
we can use BranchWritePC(), like how the other similar PC modifying
locations do it.
 2020-04-22 21:02:46 +01:00
Lioncash
196e7b5e35 frontend/A32/ir_emitter: Mark locals as const where applicable 
Makes const usage consistent within the source file.
 2020-04-22 21:02:46 +01:00
Lioncash
511613c736 frontend/A32/types: Use helper function in operator+ overload 
Allows deduplicating an assert and a cast.
 2020-04-22 21:02:46 +01:00
Lioncash
8103652a91 frontend: Move imm.h to the top-level directory of the frontends 
Preparation to utilize the immediate type within the A32 backend as
well, which will allow eliminating numerous type aliases like Imm4,
Imm5, etc.
 2020-04-22 21:02:46 +01:00
Lioncash
796bb8a7f7 frontend/A64/types: Make RegNumber() and VecNumber() constexpr 
Given they simply perform casting, they can be safely made constexpr.
 2020-04-22 21:02:46 +01:00
Lioncash
64e51a6d4d A32/disassembler_arm: Mark utility functions as static where applicable 
These don't depend on class state and can be marked static to make that
explicit.
 2020-04-22 21:02:46 +01:00