Lioncash
99c494bae9
common/fp/unpacked: Add FPRoundCV
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Corresponds to the equivalent pseudocode within the ARMv8 reference
manual. This will be necessary for supporting half-precision
floating-point.
This also makes use of it within FPConvert
2020-04-22 20:58:11 +01:00
Lioncash
8f9fe8690a
common/fp/unpacked: Adjust FPUnpack to operate like ARM pseudocode
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This function is defined as always disabling the AHP bit in the fpcr
before performing any operations.
At the same time, rename the original FPUnpack function to FPUnpackBase
to match the pseudocode in the ARM reference manual.
2020-04-22 20:58:11 +01:00
Lioncash
a829c93406
common/fp/unpacked: Correct edge-cases within FPUnpack for half-precision floating point
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This corrects one case where floating-point exceptions could be set when
they're not supposed to be.
This also corrects a case where values were being treated as NaNs when
they weren't supposed to be.
2020-04-22 20:58:11 +01:00
Merry
fb039e232c
Merge pull request #442 from lioncash/fcvtxn
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A64: Implement scalar and vector variants of FCVTXN
2020-04-22 20:58:11 +01:00
Lioncash
6aed4036ef
ir_opt/a64_get_set_elimination_pass: Add handling for NZCV raw get and set operations
2020-04-22 20:58:11 +01:00
Lioncash
490bebbd9a
common/fp/unpacked: Add FPUnpackCV
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Adds a template function that performs the same behavior as in the ARM
pseudocode, and utilizes it in FPConvert, which will be necessary for
half-float support.
2020-04-22 20:58:11 +01:00
Merry
4f937c1ee1
Merge pull request #446 from lioncash/sqshl
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A64: Implement scalar variants of SQSHL (register) and UQSHL (register)
2020-04-22 20:58:11 +01:00
Lioncash
aa22db534b
A64: Implement AXFlag and XAFlag
2020-04-22 20:58:11 +01:00
Merry
d74cccbc84
Merge pull request #445 from lioncash/sqrt
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A64: Implement single and double-precision vector variant of FSQRT
2020-04-22 20:58:11 +01:00
Lioncash
20ffe568d0
A64: Implement RMIF
2020-04-22 20:58:11 +01:00
Merry
6d7e7c3269
Merge pull request #443 from lioncash/flag
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A64: Rearrange flag format/manipulation instructions
2020-04-22 20:58:11 +01:00
Lioncash
51b526e453
A64: Implement CFINV
2020-04-22 20:58:11 +01:00
Merry
5d01f1b462
Merge pull request #441 from lioncash/constexpr
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common/bit_util: Mark a few functions as constexpr
2020-04-22 20:58:11 +01:00
Lioncash
597a8be5d5
ir: Add A64-specific opcodes for getting and setting raw NZCV values
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This will be necessary to implement the flag manipulation and flag
format instructions.
2020-04-22 20:58:11 +01:00
Merry
743c52fdc5
Merge pull request #440 from lioncash/include
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common/fp: Remove unnecessary includes
2020-04-22 20:58:11 +01:00
Merry
46922b9138
Merge pull request #444 from lioncash/interpret
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A64: Fall back to interpreting for FCADD and FCMLA half-precision variants
2020-04-22 20:58:11 +01:00
Lioncash
d3515279df
A64: Implement the vector version of FCVTXN
2020-04-22 20:58:10 +01:00
Lioncash
17aea0b997
A64: Implement UQSHL (register)'s scalar variant
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This can be implemented in terms of the vector variant.
2020-04-22 20:58:10 +01:00
Lioncash
c99d4b762e
A64: Implement single and double-precision vector variant of FSQRT
2020-04-22 20:58:10 +01:00
Lioncash
54e0b487f3
A64: Rearrange flag format/manipulation instructions
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Gives these instructions better categorical labeling.
2020-04-22 20:58:10 +01:00
Lioncash
88d1977cb9
common/bit_util: Make a few functions as constexpr
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These four functions can be made constexpr with no issue.
2020-04-22 20:58:10 +01:00
Lioncash
f33e5939b7
common/fp: Remove unnecessary includes
2020-04-22 20:58:10 +01:00
Lioncash
36027ebef5
frontend/ir/microinstruction: Add missing cases for FPRecipExponent{32,64} for ReadsFromAndWritesToFPSRCumulativeExceptionBits()
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This was intended to be added within #437 , but was missed
2020-04-22 20:58:10 +01:00
Lioncash
302f56b36a
A64: Fall back to interpreting for FCADD and FCMLA half-precision variants
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Rather than straight-up treating them as undefined, we can fall back to an
interpreter in this case.
2020-04-22 20:58:10 +01:00
Lioncash
4339a8fff6
A64: Implement the scalar version of FCVTXN
2020-04-22 20:58:10 +01:00
Lioncash
35ddf68ad5
A64: Implement SQSHL (register)'s scalar variant
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We can implement this in terms of the vector variant.
2020-04-22 20:58:10 +01:00
Lioncash
5cf1478620
frontend/ir: Add opcodes for vector square roots
2020-04-22 20:58:10 +01:00
Merry
40b081438a
Merge pull request #439 from lioncash/fcmla
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A64: Implement FCADD and FCMLA
2020-04-22 20:58:10 +01:00
Lioncash
7c81a58ed3
frontend/ir/ir_emitter: Alter parameters of FPDoubleToSingle() and FPSingleToDouble() to pass along desired rounding mode
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This will be necessary to special-case the non-IEEE Von Neumann rounding
to odd rounding mode.
2020-04-22 20:58:10 +01:00
Merry
d91192681a
Merge pull request #438 from lioncash/fmulx
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A64: Implement scalar double/single precision FMULX (by element)
2020-04-22 20:58:10 +01:00
Lioncash
ed29ef8cca
A64: Implement FCMLA
2020-04-22 20:58:10 +01:00
Lioncash
95af9dafbe
common/fp/op: Add FP conversion functions
2020-04-22 20:58:10 +01:00
Merry
9f11720a69
Merge pull request #437 from lioncash/frecpx
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A64: Implement FRECPX (single, double precision)
2020-04-22 20:58:10 +01:00
Lioncash
bdcea0b0dc
A64: Implement scalar double/single precision FMULX (by element)
2020-04-22 20:58:10 +01:00
Lioncash
5ce17574f9
A64: Implement FCADD
2020-04-22 20:58:10 +01:00
Merry
34d917f34e
Merge pull request #436 from lioncash/no-alloc
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A64: Implement LDNP/STNP
2020-04-22 20:58:10 +01:00
Lioncash
e44730ba6d
A64: Implement FRECPX (single, double precision)
2020-04-22 20:58:10 +01:00
Merry
f48049e0a5
Merge pull request #435 from lioncash/a32
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tests/a32/testenv: Make A32TestEnv's code_mem member a std::vector
2020-04-22 20:58:10 +01:00
Lioncash
bfaeb08d3c
A64: Implement LDNP/STNP
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LDNP and STNP indicate that a memory access is non-temporal/streaming
(i.e. unlikely to be repeated), allowing data caching to not be
performed. However, given this is only a hint, we can treat these two
instructions as regular LDP and STP instructions for the time being.
2020-04-22 20:58:10 +01:00
Lioncash
9cf3c25811
frontend/ir/ir_emitter: Add opcodes for floating point reciprocal exponents
2020-04-22 20:58:10 +01:00
Merry
dbf47db713
Merge pull request #434 from lioncash/format
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A32/translate_arm: Formatting/tidying up
2020-04-22 20:58:10 +01:00
Lioncash
9faed40a34
tests/a32/testenv: Make A32TestEnv's code_mem member a std::vector
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Makes the data member consistent with the A64 test environment.
2020-04-22 20:58:10 +01:00
Lioncash
b168c2a9f9
common/fp/op: Add operations for floating-point reciprocal exponents
2020-04-22 20:58:10 +01:00
Merry
503190c44c
Merge pull request #433 from lioncash/unicorn
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tests/unicorn_emu: Add getters and setters for PC/SP
2020-04-22 20:58:10 +01:00
Lioncash
05a6ab691d
translate_arm/coprocessor: Minor tidying up
2020-04-22 20:58:10 +01:00
Merry
1c70ef7333
Merge pull request #432 from lioncash/catch
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externals: Update Catch to 2.6.1
2020-04-22 20:58:10 +01:00
Lioncash
1e32a09c03
translate_arm/vfp2: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Merry
24b0622093
Merge pull request #431 from lioncash/noexcept
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backend/x64/a32_interface: Mark Context move constructor and move assignment as noexcept
2020-04-22 20:58:10 +01:00
Lioncash
e209b31073
translate_arm/synchronization: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00
Lioncash
9514e3602e
translate_arm/status_register_access: Invert conditionals where applicable
2020-04-22 20:58:10 +01:00