MerryMage
49fcfe040c
reg_alloc: Explicitly specify GPR and XMM order
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This allows each backend to modify what registers they want to use and their preferred orderings
2020-04-22 21:06:17 +01:00
MerryMage
c232ad7971
a32_emit_x64: Make {Read,Write}Memory member functions of A32EmitX64
2020-04-22 21:06:17 +01:00
MerryMage
5267dbb8cf
emit_x64_saturation: Prefer changeBit to setBit
2020-04-22 21:06:17 +01:00
MerryMage
9d60d92692
backend/x64: Make ExceptionHandler its own class
2020-04-22 21:06:17 +01:00
MerryMage
325808949f
backend/x64: Rename namespace BackendX64 -> Backend::X64
2020-04-22 21:06:17 +01:00
MerryMage
f569d7913c
block_of_code: Reduce jmps in dispatcher loop
2020-04-22 21:06:17 +01:00
MerryMage
7e0c415473
block_of_code: Always specify codeptr to run from
2020-04-22 21:06:17 +01:00
MerryMage
b6536115ef
A32: Add Step
2020-04-22 21:06:17 +01:00
MerryMage
f69c77391e
A64: Add Step
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Allow for stepping instruction-by-instruction
2020-04-22 21:06:17 +01:00
MerryMage
09d3c77d74
IR: Add masked shift IR instructions
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Also use these in the A64 frontend to avoid the need to mask the shift amount.
2020-04-22 21:06:17 +01:00
MerryMage
bd88286b21
cast_util: Add FptrCast
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Reduce unnecessary type duplication when casting a lambda to a function pointer.
2020-04-22 21:06:17 +01:00
MerryMage
fe583aa076
lut_from_list: Reduce number of required template arguments
2020-04-22 21:06:17 +01:00
MerryMage
81fcb4e537
mp: Migrate to shared version of mp library
2020-04-22 21:06:17 +01:00
MerryMage
25e27282e3
a64_emit_x64: Reduce patchpoint sizes
2020-04-22 21:04:23 +01:00
MerryMage
a59c335b05
A64: Add options for detecting misaligned loads and stores
2020-04-22 21:04:23 +01:00
Marshall Mohror
1ebc1895ee
A32/x64: Create a global_offset optimization for the page table ( #507 )
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Instead of looking up the page table like:
table[addr >> 12][addr & 0xFFF]
We can use a global offset on the table to query the memory like:
table[addr >> 12][addr]
This saves two instructions on *every* memory access within the recompiler.
Original change by degasus in A64 emitter
2020-04-22 21:04:23 +01:00
Markus Wick
93668c24be
A64/x64: Create a global_offset optimization for the page table.
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Instead of looking up the page table like:
table[addr >> 12][addr & 0xFFF]
We can use a global offset on the table to query the memory like:
table[addr >> 12][addr]
This saves two instructions on *every* memory access within the recompiler.
Thanks at skmp for the idea.
2020-04-22 21:04:23 +01:00
MerryMage
6325ac23eb
a32_emit_x64: Use std::get_if in EmitA32Coproc*
2020-04-22 21:04:23 +01:00
MerryMage
ada66d7092
a32_interface: Remove unused TransferJitState function
2020-04-22 21:04:23 +01:00
MerryMage
b4884a51e0
a32_jitstate: Only transfer required state
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Importantly, reset exclusive state upon transfer.
2020-04-22 21:04:23 +01:00
MerryMage
c7d20f3f2f
fuzz_arm: Test MSR and MRS instructions against unicorn
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* Add always_little_endian option to mach unicorn behavior.
* Correct CPSR.Mode = Usermode
2020-04-22 21:04:23 +01:00
MerryMage
2f06ef5d4e
a32_emit_x64: EmitA32SetCpsr: BUGFIX: Actually set CPSR.GE
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Was unintentionally masking the writing of CPSR.GE due to 32-bit immediate sign extension.
2020-04-22 21:04:23 +01:00
MerryMage
0a6f822d76
a32_emit_x64: GenTerminalHandlers: Remove unnecessary mov
2020-04-22 21:04:23 +01:00
MerryMage
396116ee61
A32: Add hook_hint_instructions option
2020-04-22 21:04:23 +01:00
MerryMage
2f2a859615
a32_jitstate: Consolidate upper bits of location descriptor into upper_location_descriptor
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Also solves a performance regression initially introduced by b6e8297e369f2dc4758bafe944e51efb8d1a2552,
primarily due to excessively mismatched load/store sizes causing less than optimal load-to-store forwarding.
2020-04-22 21:04:23 +01:00
Merry
1c97edac77
Merge pull request #503 from lioncash/cmp
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A64: Implement half-precision variants of FCMEQ
2020-04-22 21:04:22 +01:00
Merry
f252a62c1b
Merge pull request #502 from lioncash/header
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General: Remove unnecessary includes
2020-04-22 21:04:22 +01:00
Lioncash
22bd95902d
backend/x64/reg_alloc: Apply const where applicable
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Also tidies up bracing where applicable along the way.
2020-04-22 21:04:22 +01:00
Lioncash
349d4b577a
General: Remove unnecessary includes
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Removes unnecessary header dependencies that have accumulated over time
as changes have been made. Lessens the amount of files that need to be
rebuilt when the headers change.
2020-04-22 21:04:22 +01:00
Lioncash
43fd2b400a
frontend/ir_emitter: Add half-precision opcode for FPVectorEquals
2020-04-22 21:04:22 +01:00
Lioncash
cba9351b82
backend/x64/emit_*: Apply const where applicable
2020-04-22 21:04:22 +01:00
Lioncash
23f56bdb67
x64/exception_handler_windows: Join namespace declaration
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Uses a nested namespace declaration like the rest of the codebase.
2020-04-22 21:04:22 +01:00
Lioncash
3bbb06c34a
a64_emit_x64: Apply [[maybe_unused]] to unused lambda parameter
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This can result in an unused variable warning on Windows otherwise.
2020-04-22 21:04:22 +01:00
Lioncash
bfa8035414
A32/A64: Make public header inclusions consistent
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For all public header inclusions, we use the <> form of including them
as opposed to "", which we typically use for internal headers.
2020-04-22 21:04:22 +01:00
Lioncash
ccf923305c
a32_interface: Remove duplicated documentation comments
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These already exist in the header, so these ones can be removed.
2020-04-22 21:04:22 +01:00
Lioncash
182ceb2807
General: Make parameter names from declarations and implementations consistent
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Most of the time when this occurs, it's a bug. Thankfully this isn't the
case. However, we can resolve these cases to make the codebase more
consistent.
2020-04-22 21:04:22 +01:00
Lioncash
6b9bf7868a
General: Correct typos is code comments
2020-04-22 21:04:22 +01:00
Lioncash
6187de7ca7
a32_interface: std::move UserConfig where applicable
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UserConfig instances contain up to 16 std::shared_ptr<Coprocessor>
instances. We can std::move here to avoid performing 16 redundant atomic
reference increment and decrement operations.
Mostly inconsequential on x64, but we may as well signify intent.
2020-04-22 21:04:22 +01:00
Lioncash
b13b6610b5
a32_interface: Default destructor in the cpp file
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Makes it more consistent with code throughout the codebase.
2020-04-22 21:04:22 +01:00
MerryMage
5f8eb7c51c
A32/location_descriptor: Add CPSR.IT to A32::LocationDescriptor
2020-04-22 21:04:22 +01:00
MerryMage
6e2cd35e4f
a32_jitstate: Optimize runtime location descriptor calculation
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Calculation is now one unaligned 64-bit load.
2020-04-22 21:04:22 +01:00
MerryMage
0de3993373
a32_jitstate: Remove fpsr_idc
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We do not really have accurate FPSR state in any case.
2020-04-22 21:04:22 +01:00
MerryMage
6f49c0ef8e
{a32,a64}_jitstate: Rename CPSR_* to cpsr_*
2020-04-22 21:04:22 +01:00
MerryMage
8cd7837839
a32_jitstate: Remove old_FPSCR
2020-04-22 21:04:22 +01:00
MerryMage
b3bb544bca
a32_jitstate: Rename FPSCR_nzcv to fpsr_nzcv
2020-04-22 21:04:22 +01:00
MerryMage
76f986979d
a32_jitstate: Rename FPSCR_mode to fpcr_mode
2020-04-22 21:04:22 +01:00
MerryMage
49fca15f90
{a32,a64}_jitstate: Rename FPSCR_IDC to fpsr_idc
2020-04-22 21:04:21 +01:00
MerryMage
622c02f537
{a32,a64}_jitstate: Remove FPSCR_UFC
2020-04-22 21:04:21 +01:00
MerryMage
366d63f4b4
a32_jitstate: Enable SSE FTZ and DAZ
2020-04-22 21:04:21 +01:00
MerryMage
f178562ee7
a32_jitstate: Remove exception trap enables from FPSCR_MODE_MASK
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We don't currently use this for anything (we do not currently trap
floating point exceptions).
This frees these bits up for other purposes.
2020-04-22 21:04:21 +01:00