Merry
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c6667997bc
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emit_arm64_vector: Implement VectorSignedSaturatedDoublingMultiply{High,HighRounding,Long}
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
600f8e29c1
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emit_arm64_cryptography: Implement most
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
a97105c296
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IR: Split VectorSignedSaturatedDoublingMultiply into VectorSignedSaturatedDoublingMultiply{High,HighRounding}
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2022-10-18 15:04:30 +01:00 |
|
Merry
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aaf7c41ab3
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emit_arm64_vector_saturation: Implement all
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
6306e3462e
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emit_arm64_vector: Implement most IR insturctions
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
61d509dda2
|
IR: Add VectorMultiply{Signed,Unsigned}Widen instructions
Polyfill for x86-64 backend
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
bbf0179d30
|
test_generator: Enable vfp testing
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
11c02e5a62
|
backend/arm64/fpsr_manager: Bugfixes
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
2ab0e64be4
|
backend/arm64/reg_alloc: Update uses on all locations
Trying to optimize just for args is incorrect when inst has zero uses
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
2c75ca746b
|
backend/arm64/stack_layout: Remove unused variable
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
72357aba04
|
emit_arm64_vector: Implement VectorBroadcast
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
3c3f30c0ac
|
emit_arm64_vector: Implement Vector{Get,Set}Element
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
ee6433889e
|
emit_arm64_floating_point: Implement a majority of floating point instructions
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
2cc5b09bdf
|
emit_arm64_data_processing: Implement ConditionalSelect
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
a4a665148c
|
emit_arm64_a32: Get/Set ext_reg state
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2022-10-18 15:04:30 +01:00 |
|
Merry
|
0288540155
|
backend/arm64/reg_alloc: Implement ReadWrite mode
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
208b19b89a
|
backend/arm64: FPCR/FPSR handling
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
60a119da6a
|
backend: Implement FpsrManager
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
72026c91b5
|
oaknut: fpsimd MOV and UMOV corrections
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
3b98af5810
|
test_generator: Generate Arm instructions
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
2ac12562ab
|
emit_arm64: Handle cond prologue
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
aa6b31f2b8
|
emit_arm64: Handle 64-bit values in GetNZFromOp
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
5086432f19
|
a32_emit_x64: EmitA32SetCpsr: Correct cpsr_jaifm mask
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
23c23fbca3
|
arm64/reg_alloc: Bugfix in ValueInfo
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
6dfd94f3fb
|
arm64/reg_alloc: Ban materialization of U1 constants
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
73b48448cb
|
emit_arm64_data_processing: Handle immediate carry in for shift instructions
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
db5db43fd4
|
emit_arm64_a32: A32SetCpsrNZC: Handle immediate
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
65a7d9be8d
|
emit_arm64_a32: A32SetCheckBit: Handle immediate
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
49589168c9
|
oaknut: MOV: Fix MOVN case
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
8649345886
|
emit_arm64_cryptography: Implement CRC
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
f84e489969
|
test_generator: Expand testing to thumb32
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
6d6cbe2e66
|
emit_arm64_saturation: Fix UnsignedSaturation for < 0
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
b059384bc0
|
emit_arm64_saturation: Implement SignedSaturatedSubWithFlag32
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
090e79add2
|
emit_arm64_data_processing: Implement CountLeadingZeros
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
e921c397ac
|
emit_arm64_data_processing: Fix BitImms for exceptional immediates
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
f642f49b93
|
emit_arm64_data_processing: Implement RotateRightExtended
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
22d87bcbe5
|
emit_arm64_a32: Implement A32SetGEFlagsCompressed
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
735f5b787a
|
emit_arm64_a32: Fix A32SetCpsrNZC for immediate carry
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
33b3376fb1
|
emit_arm64_a32: Implement A32SetCpsrNZCVRaw, A32SetCpsrNZCVQ
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
11b665c027
|
emit_arm64_a32: Implement A32SetCpsr (temporary implementation)
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
950400fb6b
|
arm64/a32_jitstate: Adjust structure
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
726e116e28
|
emit_arm64_saturation: Implement SignedSaturatedAddWithFlag32
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
babfb7d7b8
|
IR/saturation: Revamp saturated add/sub IR instructions
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
2d0bf7ca9b
|
emit_arm64_data_processing: Implement overflow output for Add
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
adb18fd0a7
|
emit_arm64_data_processing: Implement LogicalShift{Left,Right}64
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
0692f1d40e
|
emit_arm64_data_processing: EmitAddSub: Handle zero immediate w/ flag output
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
cd537dc711
|
IR: Rename PackedAbsDiffSumS8 to PackedAbsDiffSumU8
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
ee2bc92993
|
emit_arm64_saturation: Implement SignedSaturation
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
e73c390927
|
emit_arm64_packed: Fix signed packed add sub
|
2022-10-18 15:04:30 +01:00 |
|
Merry
|
c8b3be5512
|
emit_arm64_data_processing: Implement Div
|
2022-10-18 15:04:30 +01:00 |
|