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backend/arm64: Implement LeastSignificantByte

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Merry 2022-07-23 00:00:59 +01:00 committed by merry
parent a33d186fea
commit ec3c597591
1 changed files with 7 additions and 4 deletions
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src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
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@ -95,10 +95,13 @@ void EmitIR<IR::Opcode::LeastSignificantHalf>(oaknut::CodeGenerator& code, EmitC
template<> template<>
void EmitIR<IR::Opcode::LeastSignificantByte>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::LeastSignificantByte>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; auto args = ctx.reg_alloc.GetArgumentInfo(inst);
(void)ctx;
(void)inst; auto Wresult = ctx.reg_alloc.WriteW(inst);
ASSERT_FALSE("Unimplemented"); auto Woperand = ctx.reg_alloc.ReadW(args[0]);
RegAlloc::Realize(Wresult, Woperand);
code.UXTB(Wresult, Woperand); // TODO: Zext elimination
} }
template<> template<>