suyu/dynarmic
26
1
Fork 1
Code Issues Pull requests Projects Releases Packages Wiki Activity

backend/arm64: Implement LeastSignificantByte

Browse source
This commit is contained in:
Merry 2022-07-23 00:00:59 +01:00 committed by merry
parent a33d186fea
commit ec3c597591
1 changed files with 7 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
View file

@ -95,10 +95,13 @@ void EmitIR<IR::Opcode::LeastSignificantHalf>(oaknut::CodeGenerator& code, EmitC
template<>
void EmitIR<IR::Opcode::LeastSignificantByte>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code;
(void)ctx;
(void)inst;
ASSERT_FALSE("Unimplemented");
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
auto Wresult = ctx.reg_alloc.WriteW(inst);
auto Woperand = ctx.reg_alloc.ReadW(args[0]);
RegAlloc::Realize(Wresult, Woperand);
code.UXTB(Wresult, Woperand); // TODO: Zext elimination
}
template<>