diff --git a/src/frontend/A32/decoder/thumb32.h b/src/frontend/A32/decoder/thumb32.h index 18331827..09da4857 100644 --- a/src/frontend/A32/decoder/thumb32.h +++ b/src/frontend/A32/decoder/thumb32.h @@ -244,7 +244,7 @@ std::optional>> DecodeThumb32(u32 INST(&V::thumb32_QADD16, "QADD16", "111110101001nnnn1111dddd0001mmmm"), INST(&V::thumb32_QASX, "QASX", "111110101010nnnn1111dddd0001mmmm"), INST(&V::thumb32_QSAX, "QSAX", "111110101110nnnn1111dddd0001mmmm"), - //INST(&V::thumb32_QSUB16, "QSUB16", "111110101101----1111----0001----"), + INST(&V::thumb32_QSUB16, "QSUB16", "111110101101nnnn1111dddd0001mmmm"), //INST(&V::thumb32_QADD8, "QADD8", "111110101000----1111----0001----"), //INST(&V::thumb32_QSUB8, "QSUB8", "111110101100----1111----0001----"), //INST(&V::thumb32_SHADD16, "SHADD16", "111110101001----1111----0010----"), @@ -264,7 +264,7 @@ std::optional>> DecodeThumb32(u32 INST(&V::thumb32_UQADD16, "UQADD16", "111110101001nnnn1111dddd0101mmmm"), INST(&V::thumb32_UQASX, "UQASX", "111110101010nnnn1111dddd0101mmmm"), INST(&V::thumb32_UQSAX, "UQSAX", "111110101110nnnn1111dddd0101mmmm"), - //INST(&V::thumb32_UQSUB16, "UQSUB16", "111110101101----1111----0101----"), + INST(&V::thumb32_UQSUB16, "UQSUB16", "111110101101nnnn1111dddd0101mmmm"), //INST(&V::thumb32_UQADD8, "UQADD8", "111110101000----1111----0101----"), //INST(&V::thumb32_UQSUB8, "UQSUB8", "111110101100----1111----0101----"), //INST(&V::thumb32_UHADD16, "UHADD16", "111110101001----1111----0110----"), diff --git a/src/frontend/A32/translate/impl/thumb32_parallel.cpp b/src/frontend/A32/translate/impl/thumb32_parallel.cpp index 9bd865ae..26373fad 100644 --- a/src/frontend/A32/translate/impl/thumb32_parallel.cpp +++ b/src/frontend/A32/translate/impl/thumb32_parallel.cpp @@ -233,6 +233,19 @@ bool ThumbTranslatorVisitor::thumb32_QSAX(Reg n, Reg d, Reg m) { return true; } +bool ThumbTranslatorVisitor::thumb32_QSUB16(Reg n, Reg d, Reg m) { + if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto reg_m = ir.GetRegister(m); + const auto reg_n = ir.GetRegister(n); + const auto result = ir.PackedSaturatedSubS16(reg_n, reg_m); + + ir.SetRegister(d, result); + return true; +} + bool ThumbTranslatorVisitor::thumb32_UQADD16(Reg n, Reg d, Reg m) { if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { return UnpredictableInstruction(); @@ -284,4 +297,17 @@ bool ThumbTranslatorVisitor::thumb32_UQSAX(Reg n, Reg d, Reg m) { return true; } +bool ThumbTranslatorVisitor::thumb32_UQSUB16(Reg n, Reg d, Reg m) { + if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { + return UnpredictableInstruction(); + } + + const auto reg_m = ir.GetRegister(m); + const auto reg_n = ir.GetRegister(n); + const auto result = ir.PackedSaturatedSubU16(reg_n, reg_m); + + ir.SetRegister(d, result); + return true; +} + } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h index 16e1233e..6ef23c0d 100644 --- a/src/frontend/A32/translate/impl/translate_thumb.h +++ b/src/frontend/A32/translate/impl/translate_thumb.h @@ -145,9 +145,11 @@ struct ThumbTranslatorVisitor final { bool thumb32_QADD16(Reg n, Reg d, Reg m); bool thumb32_QASX(Reg n, Reg d, Reg m); bool thumb32_QSAX(Reg n, Reg d, Reg m); + bool thumb32_QSUB16(Reg n, Reg d, Reg m); bool thumb32_UQADD16(Reg n, Reg d, Reg m); bool thumb32_UQASX(Reg n, Reg d, Reg m); bool thumb32_UQSAX(Reg n, Reg d, Reg m); + bool thumb32_UQSUB16(Reg n, Reg d, Reg m); }; } // namespace Dynarmic::A32 diff --git a/tests/A32/fuzz_thumb.cpp b/tests/A32/fuzz_thumb.cpp index 9d9fda33..700193f9 100644 --- a/tests/A32/fuzz_thumb.cpp +++ b/tests/A32/fuzz_thumb.cpp @@ -390,6 +390,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") { three_reg_not_r15), ThumbInstGen("111110101000nnnn1111dddd1010mmmm", // QSUB three_reg_not_r15), + ThumbInstGen("111110101101nnnn1111dddd0001mmmm", // QSUB16 + three_reg_not_r15), ThumbInstGen("111110101001nnnn1111dddd1010mmmm", // RBIT [](u32 inst) { const auto d = Common::Bits<8, 11>(inst); @@ -444,6 +446,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") { three_reg_not_r15), ThumbInstGen("111110101110nnnn1111dddd0101mmmm", // UQSAX three_reg_not_r15), + ThumbInstGen("111110101101nnnn1111dddd0101mmmm", // UQSUB16 + three_reg_not_r15), ThumbInstGen("111110101110nnnn1111dddd0100mmmm", // USAX three_reg_not_r15), ThumbInstGen("111110101100nnnn1111dddd0100mmmm", // USUB8