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GetNZCVFromOp: Ensure NZ00

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This commit is contained in:
Merry 2022-11-27 14:15:06 +00:00 committed by Liam
parent 890deb17ce
commit bcb5948ea2
2 changed files with 5 additions and 5 deletions
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4
src/dynarmic/backend/arm64/emit_arm64.cpp
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@ -82,7 +82,7 @@ void EmitIR<IR::Opcode::GetNZCVFromOp>(oaknut::CodeGenerator& code, EmitContext&
auto flags = ctx.reg_alloc.WriteFlags(inst);
RegAlloc::Realize(Wvalue, flags);
code.CMP(*Wvalue, WZR.toW());
code.TST(*Wvalue, Wvalue);
break;
}
case IR::Type::U64: {
@ -90,7 +90,7 @@ void EmitIR<IR::Opcode::GetNZCVFromOp>(oaknut::CodeGenerator& code, EmitContext&
auto flags = ctx.reg_alloc.WriteFlags(inst);
RegAlloc::Realize(Xvalue, flags);
code.CMP(*Xvalue, XZR.toX());
code.TST(*Xvalue, Xvalue);
break;
}
default:

6
src/dynarmic/backend/x64/emit_x64.cpp
View file

@ -154,7 +154,7 @@ void EmitX64::EmitGetNZFromOp(EmitContext& ctx, IR::Inst* inst) {
const Xbyak::Reg64 nz = ctx.reg_alloc.ScratchGpr(HostLoc::RAX);
const Xbyak::Reg value = ctx.reg_alloc.UseGpr(args[0]).changeBit(bitsize);
code.cmp(value, 0);
code.test(value, value);
code.lahf();
code.movzx(eax, ah);
ctx.reg_alloc.DefineValue(inst, nz);
@ -180,9 +180,9 @@ void EmitX64::EmitGetNZCVFromOp(EmitContext& ctx, IR::Inst* inst) {
const Xbyak::Reg64 nzcv = ctx.reg_alloc.ScratchGpr(HostLoc::RAX);
const Xbyak::Reg value = ctx.reg_alloc.UseGpr(args[0]).changeBit(bitsize);
code.cmp(value, 0);
code.test(value, value);
code.lahf();
code.seto(code.al);
code.mov(al, 0);
ctx.reg_alloc.DefineValue(inst, nzcv);
}