From bcb5948ea2cdd99c2eb6fb5ad6c8552b64427ec5 Mon Sep 17 00:00:00 2001 From: Merry Date: Sun, 27 Nov 2022 14:15:06 +0000 Subject: [PATCH] GetNZCVFromOp: Ensure NZ00 --- src/dynarmic/backend/arm64/emit_arm64.cpp | 4 ++-- src/dynarmic/backend/x64/emit_x64.cpp | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/dynarmic/backend/arm64/emit_arm64.cpp b/src/dynarmic/backend/arm64/emit_arm64.cpp index 065f2184..625bb379 100644 --- a/src/dynarmic/backend/arm64/emit_arm64.cpp +++ b/src/dynarmic/backend/arm64/emit_arm64.cpp @@ -82,7 +82,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitContext& auto flags = ctx.reg_alloc.WriteFlags(inst); RegAlloc::Realize(Wvalue, flags); - code.CMP(*Wvalue, WZR.toW()); + code.TST(*Wvalue, Wvalue); break; } case IR::Type::U64: { @@ -90,7 +90,7 @@ void EmitIR(oaknut::CodeGenerator& code, EmitContext& auto flags = ctx.reg_alloc.WriteFlags(inst); RegAlloc::Realize(Xvalue, flags); - code.CMP(*Xvalue, XZR.toX()); + code.TST(*Xvalue, Xvalue); break; } default: diff --git a/src/dynarmic/backend/x64/emit_x64.cpp b/src/dynarmic/backend/x64/emit_x64.cpp index c3a7c80b..62af1ad4 100644 --- a/src/dynarmic/backend/x64/emit_x64.cpp +++ b/src/dynarmic/backend/x64/emit_x64.cpp @@ -154,7 +154,7 @@ void EmitX64::EmitGetNZFromOp(EmitContext& ctx, IR::Inst* inst) { const Xbyak::Reg64 nz = ctx.reg_alloc.ScratchGpr(HostLoc::RAX); const Xbyak::Reg value = ctx.reg_alloc.UseGpr(args[0]).changeBit(bitsize); - code.cmp(value, 0); + code.test(value, value); code.lahf(); code.movzx(eax, ah); ctx.reg_alloc.DefineValue(inst, nz); @@ -180,9 +180,9 @@ void EmitX64::EmitGetNZCVFromOp(EmitContext& ctx, IR::Inst* inst) { const Xbyak::Reg64 nzcv = ctx.reg_alloc.ScratchGpr(HostLoc::RAX); const Xbyak::Reg value = ctx.reg_alloc.UseGpr(args[0]).changeBit(bitsize); - code.cmp(value, 0); + code.test(value, value); code.lahf(); - code.seto(code.al); + code.mov(al, 0); ctx.reg_alloc.DefineValue(inst, nzcv); }