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Replace (void)(...); idiom with UNUSED macro

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This commit is contained in:
MerryMage 2016-12-15 21:32:20 +00:00
parent 276873bf70
commit b178ab3bec
5 changed files with 36 additions and 34 deletions
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2
src/common/common_types.h
View file

@ -27,3 +27,5 @@ using f32 = float;
using f64 = double;
static_assert(sizeof(f32) == sizeof(u32), "f32 must be 32 bits wide");
static_assert(sizeof(f64) == sizeof(u64), "f64 must be 64 bits wide");
#define UNUSED(...) (void)([__VA_ARGS__](){})

2
src/frontend/translate/translate_arm/exception_generating.cpp
View file

@ -10,7 +10,7 @@ namespace Dynarmic {
namespace Arm {
bool ArmTranslatorVisitor::arm_BKPT(Cond cond, Imm12 imm12, Imm4 imm4) {
(void)(cond, imm12, imm4); // Unused
UNUSED(cond, imm12, imm4);
return InterpretThisInstruction();
}

6
src/frontend/translate/translate_arm/extension.cpp
View file

@ -40,7 +40,7 @@ bool ArmTranslatorVisitor::arm_SXTAB(Cond cond, Reg n, Reg d, SignExtendRotation
}
bool ArmTranslatorVisitor::arm_SXTAB16(Cond cond, Reg n, Reg d, SignExtendRotation rotate, Reg m) {
(void)(cond, n, d, rotate, m); // Unused
UNUSED(cond, n, d, rotate, m);
return InterpretThisInstruction();
}
@ -68,7 +68,7 @@ bool ArmTranslatorVisitor::arm_SXTB(Cond cond, Reg d, SignExtendRotation rotate,
}
bool ArmTranslatorVisitor::arm_SXTB16(Cond cond, Reg d, SignExtendRotation rotate, Reg m) {
(void)(cond, d, rotate, m); // Unused
UNUSED(cond, d, rotate, m);
return InterpretThisInstruction();
}
@ -96,7 +96,7 @@ bool ArmTranslatorVisitor::arm_UXTAB(Cond cond, Reg n, Reg d, SignExtendRotation
}
bool ArmTranslatorVisitor::arm_UXTAB16(Cond cond, Reg n, Reg d, SignExtendRotation rotate, Reg m) {
(void)(cond, n, d, rotate, m); // Unused
UNUSED(cond, n, d, rotate, m);
return InterpretThisInstruction();
}

40
src/frontend/translate/translate_arm/parallel.cpp
View file

@ -11,32 +11,32 @@ namespace Arm {
// Parallel Add/Subtract (Modulo arithmetic) instructions
bool ArmTranslatorVisitor::arm_SADD8(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_SADD16(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_SASX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_SSAX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_SSUB8(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_SSUB16(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
@ -52,17 +52,17 @@ bool ArmTranslatorVisitor::arm_UADD8(Cond cond, Reg n, Reg d, Reg m) {
}
bool ArmTranslatorVisitor::arm_UADD16(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_UASX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_USAX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
@ -78,7 +78,7 @@ bool ArmTranslatorVisitor::arm_USUB8(Cond cond, Reg n, Reg d, Reg m) {
}
bool ArmTranslatorVisitor::arm_USUB16(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
@ -105,12 +105,12 @@ bool ArmTranslatorVisitor::arm_QADD16(Cond cond, Reg n, Reg d, Reg m) {
}
bool ArmTranslatorVisitor::arm_QASX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_QSAX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
@ -151,12 +151,12 @@ bool ArmTranslatorVisitor::arm_UQADD16(Cond cond, Reg n, Reg d, Reg m) {
}
bool ArmTranslatorVisitor::arm_UQASX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_UQSAX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
@ -203,22 +203,22 @@ bool ArmTranslatorVisitor::arm_SHADD16(Cond cond, Reg n, Reg d, Reg m) {
}
bool ArmTranslatorVisitor::arm_SHASX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_SHSAX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_SHSUB8(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_SHSUB16(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
@ -243,12 +243,12 @@ bool ArmTranslatorVisitor::arm_UHADD16(Cond cond, Reg n, Reg d, Reg m) {
}
bool ArmTranslatorVisitor::arm_UHASX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}
bool ArmTranslatorVisitor::arm_UHSAX(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, n, d, m); // Unused
UNUSED(cond, n, d, m);
return InterpretThisInstruction();
}

20
src/frontend/translate/translate_arm/translate_arm.h
View file

@ -215,11 +215,11 @@ struct ArmTranslatorVisitor final {
// Unsigned sum of absolute difference functions
bool arm_USAD8(Cond cond, Reg d, Reg m, Reg n) {
(void)(cond, d, m, n); // Unused
UNUSED(cond, d, m, n);
return InterpretThisInstruction();
}
bool arm_USADA8(Cond cond, Reg d, Reg a, Reg m, Reg n) {
(void)(cond, d, a, m, n); // Unused
UNUSED(cond, d, a, m, n);
return InterpretThisInstruction();
}
@ -234,19 +234,19 @@ struct ArmTranslatorVisitor final {
// Saturation instructions
bool arm_SSAT(Cond cond, Imm5 sat_imm, Reg d, Imm5 imm5, bool sh, Reg n) {
(void)(cond, sat_imm, d, imm5, sh, n); // Unused
UNUSED(cond, sat_imm, d, imm5, sh, n);
return InterpretThisInstruction();
}
bool arm_SSAT16(Cond cond, Imm4 sat_imm, Reg d, Reg n) {
(void)(cond, sat_imm, d, n); // Unused
UNUSED(cond, sat_imm, d, n);
return InterpretThisInstruction();
}
bool arm_USAT(Cond cond, Imm5 sat_imm, Reg d, Imm5 imm5, bool sh, Reg n) {
(void)(cond, sat_imm, d, imm5, sh, n); // Unused
UNUSED(cond, sat_imm, d, imm5, sh, n);
return InterpretThisInstruction();
}
bool arm_USAT16(Cond cond, Imm4 sat_imm, Reg d, Reg n) {
(void)(cond, sat_imm, d, n); // Unused
UNUSED(cond, sat_imm, d, n);
return InterpretThisInstruction();
}
@ -327,19 +327,19 @@ struct ArmTranslatorVisitor final {
// Saturated Add/Subtract instructions
bool arm_QADD(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, d, m, n); // Unused
UNUSED(cond, d, m, n);
return InterpretThisInstruction();
}
bool arm_QSUB(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, d, m, n); // Unused
UNUSED(cond, d, m, n);
return InterpretThisInstruction();
}
bool arm_QDADD(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, d, m, n); // Unused
UNUSED(cond, d, m, n);
return InterpretThisInstruction();
}
bool arm_QDSUB(Cond cond, Reg n, Reg d, Reg m) {
(void)(cond, d, m, n); // Unused
UNUSED(cond, d, m, n);
return InterpretThisInstruction();
}