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A32: Add immediate creation helper

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Provides the same helper function that exists within the A64 frontend
for creating immediate values.
This commit is contained in:
Lioncash 2020-06-15 22:23:25 -04:00 committed by merry
parent 93ed3441b7
commit aabd0d824d
3 changed files with 19 additions and 12 deletions
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13
src/frontend/A32/translate/impl/asimd_two_regs_misc.cpp
View file

@ -23,21 +23,10 @@ bool ArmTranslatorVisitor::asimd_VCLS(bool D, size_t sz, size_t Vd, bool Q, bool
const auto result = [this, m, sz] {
const auto reg_m = ir.GetVector(m);
const size_t esize = 8U << sz;
const auto one = [this, esize]() -> IR::UAny {
switch (esize) {
case 8:
return ir.Imm8(1);
case 16:
return ir.Imm16(1);
default:
return ir.Imm32(1);
}
}();
const auto shifted = ir.VectorArithmeticShiftRight(esize, reg_m, static_cast<u8>(esize));
const auto xored = ir.VectorEor(reg_m, shifted);
const auto clz = ir.VectorCountLeadingZeros(esize, xored);
return ir.VectorSub(esize, clz, ir.VectorBroadcast(esize, one));
return ir.VectorSub(esize, clz, ir.VectorBroadcast(esize, I(esize, 1)));
}();
ir.SetVector(d, result);

3
src/frontend/A32/translate/impl/translate_arm.h
View file

@ -64,6 +64,9 @@ struct ArmTranslatorVisitor final {
return {imm32, carry_out};
}
// Creates an immediate of the given value
IR::UAny I(size_t bitsize, u64 value);
IR::ResultAndCarry<IR::U32> EmitImmShift(IR::U32 value, ShiftType type, Imm<5> imm5, IR::U1 carry_in);
IR::ResultAndCarry<IR::U32> EmitRegShift(IR::U32 value, ShiftType type, IR::U8 amount, IR::U1 carry_in);
template <typename FnT> bool EmitVfpVectorOperation(bool sz, ExtReg d, ExtReg n, ExtReg m, const FnT& fn);

15
src/frontend/A32/translate/translate_arm.cpp
View file

@ -175,6 +175,21 @@ bool ArmTranslatorVisitor::RaiseException(Exception exception) {
return false;
}
IR::UAny ArmTranslatorVisitor::I(size_t bitsize, u64 value) {
switch (bitsize) {
case 8:
return ir.Imm8(static_cast<u8>(value));
case 16:
return ir.Imm16(static_cast<u16>(value));
case 32:
return ir.Imm32(static_cast<u32>(value));
case 64:
return ir.Imm64(value);
default:
ASSERT_FALSE("Imm - get: Invalid bitsize");
}
}
IR::ResultAndCarry<IR::U32> ArmTranslatorVisitor::EmitImmShift(IR::U32 value, ShiftType type, Imm<5> imm5, IR::U1 carry_in) {
u8 imm5_value = imm5.ZeroExtend<u8>();
switch (type) {