diff --git a/src/frontend/A32/translate/impl/asimd_two_regs_misc.cpp b/src/frontend/A32/translate/impl/asimd_two_regs_misc.cpp
index 944b2d44..11b0d0dd 100644
--- a/src/frontend/A32/translate/impl/asimd_two_regs_misc.cpp
+++ b/src/frontend/A32/translate/impl/asimd_two_regs_misc.cpp
@@ -23,21 +23,10 @@ bool ArmTranslatorVisitor::asimd_VCLS(bool D, size_t sz, size_t Vd, bool Q, bool
     const auto result = [this, m, sz] {
         const auto reg_m = ir.GetVector(m);
         const size_t esize = 8U << sz;
-        const auto one = [this, esize]() -> IR::UAny {
-            switch (esize) {
-            case 8:
-                return ir.Imm8(1);
-            case 16:
-                return ir.Imm16(1);
-            default:
-                return ir.Imm32(1);
-            }
-        }();
-
         const auto shifted = ir.VectorArithmeticShiftRight(esize, reg_m, static_cast<u8>(esize));
         const auto xored = ir.VectorEor(reg_m, shifted);
         const auto clz = ir.VectorCountLeadingZeros(esize, xored);
-        return ir.VectorSub(esize, clz, ir.VectorBroadcast(esize, one));
+        return ir.VectorSub(esize, clz, ir.VectorBroadcast(esize, I(esize, 1)));
     }();
 
     ir.SetVector(d, result);
diff --git a/src/frontend/A32/translate/impl/translate_arm.h b/src/frontend/A32/translate/impl/translate_arm.h
index 5a679f04..8d72bdc5 100644
--- a/src/frontend/A32/translate/impl/translate_arm.h
+++ b/src/frontend/A32/translate/impl/translate_arm.h
@@ -64,6 +64,9 @@ struct ArmTranslatorVisitor final {
         return {imm32, carry_out};
     }
 
+    // Creates an immediate of the given value
+    IR::UAny I(size_t bitsize, u64 value);
+
     IR::ResultAndCarry<IR::U32> EmitImmShift(IR::U32 value, ShiftType type, Imm<5> imm5, IR::U1 carry_in);
     IR::ResultAndCarry<IR::U32> EmitRegShift(IR::U32 value, ShiftType type, IR::U8 amount, IR::U1 carry_in);
     template <typename FnT> bool EmitVfpVectorOperation(bool sz, ExtReg d, ExtReg n, ExtReg m, const FnT& fn);
diff --git a/src/frontend/A32/translate/translate_arm.cpp b/src/frontend/A32/translate/translate_arm.cpp
index 7239042b..1405a492 100644
--- a/src/frontend/A32/translate/translate_arm.cpp
+++ b/src/frontend/A32/translate/translate_arm.cpp
@@ -175,6 +175,21 @@ bool ArmTranslatorVisitor::RaiseException(Exception exception) {
     return false;
 }
 
+IR::UAny ArmTranslatorVisitor::I(size_t bitsize, u64 value) {
+    switch (bitsize) {
+    case 8:
+        return ir.Imm8(static_cast<u8>(value));
+    case 16:
+        return ir.Imm16(static_cast<u16>(value));
+    case 32:
+        return ir.Imm32(static_cast<u32>(value));
+    case 64:
+        return ir.Imm64(value);
+    default:
+        ASSERT_FALSE("Imm - get: Invalid bitsize");
+    }
+}
+
 IR::ResultAndCarry<IR::U32> ArmTranslatorVisitor::EmitImmShift(IR::U32 value, ShiftType type, Imm<5> imm5, IR::U1 carry_in) {
     u8 imm5_value = imm5.ZeroExtend<u8>();
     switch (type) {