Implement thumb1_MOV_imm

This commit is contained in:
MerryMage 2016-07-08 21:16:40 +08:00
parent 34be20e4d6
commit 98f300144b
3 changed files with 16 additions and 2 deletions

View file

@ -56,7 +56,7 @@ private:
}; };
template <typename V> template <typename V>
static const std::array<Thumb1Matcher<V>, 14> g_thumb1_instruction_table {{ static const std::array<Thumb1Matcher<V>, 15> g_thumb1_instruction_table {{
#define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring) #define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring)
@ -68,7 +68,7 @@ static const std::array<Thumb1Matcher<V>, 14> g_thumb1_instruction_table {{
{ INST(&V::thumb1_SUB_reg, "SUB (reg)", "0001101mmmnnnddd") }, { INST(&V::thumb1_SUB_reg, "SUB (reg)", "0001101mmmnnnddd") },
{ INST(&V::thumb1_ADD_imm, "ADD (imm)", "0001110vvvnnnddd") }, { INST(&V::thumb1_ADD_imm, "ADD (imm)", "0001110vvvnnnddd") },
{ INST(&V::thumb1_SUB_imm, "SUB (imm)", "0001111vvvnnnddd") }, { INST(&V::thumb1_SUB_imm, "SUB (imm)", "0001111vvvnnnddd") },
//{ INST(&V::thumb1_MOV_ri, "MOV (ri)", "00100dddvvvvvvvv") }, { INST(&V::thumb1_MOV_imm, "MOV (imm)", "00100dddvvvvvvvv") },
//{ INST(&V::thumb1_CMP_ri, "CMP (ri)", "00101dddvvvvvvvv") }, //{ INST(&V::thumb1_CMP_ri, "CMP (ri)", "00101dddvvvvvvvv") },
//{ INST(&V::thumb1_ADD_ri, "ADD (ri)", "00110dddvvvvvvvv") }, //{ INST(&V::thumb1_ADD_ri, "ADD (ri)", "00110dddvvvvvvvv") },
//{ INST(&V::thumb1_SUB_ri, "SUB (ri)", "00111dddvvvvvvvv") }, //{ INST(&V::thumb1_SUB_ri, "SUB (ri)", "00111dddvvvvvvvv") },

View file

@ -130,6 +130,10 @@ public:
return Common::StringFromFormat("subs %s, %s, #%u", RegStr(d), RegStr(n), imm3); return Common::StringFromFormat("subs %s, %s, #%u", RegStr(d), RegStr(n), imm3);
} }
std::string thumb1_MOV_imm(Reg d, Imm8 imm8) {
return Common::StringFromFormat("movs %s, #%u", RegStr(d), imm8);
}
std::string thumb1_AND_reg(Reg m, Reg d_n) { std::string thumb1_AND_reg(Reg m, Reg d_n) {
return Common::StringFromFormat("ands %s, %s", RegStr(d_n), RegStr(m)); return Common::StringFromFormat("ands %s, %s", RegStr(d_n), RegStr(m));
} }

View file

@ -110,6 +110,16 @@ struct TranslatorVisitor final {
ir.SetVFlag(result.overflow); ir.SetVFlag(result.overflow);
return true; return true;
} }
bool thumb1_MOV_imm(Reg d, Imm8 imm8) {
u32 imm32 = imm8 & 0xFF;
// MOVS <Rd>, #<imm8>
// Rd can never encode R15.
auto result = ir.Imm32(imm32);
ir.SetRegister(d, result);
ir.SetNFlag(ir.MostSignificantBit(result));
ir.SetZFlag(ir.IsZero(result));
return true;
}
bool thumb1_AND_reg(Reg m, Reg d_n) { bool thumb1_AND_reg(Reg m, Reg d_n) {
const Reg d = d_n, n = d_n; const Reg d = d_n, n = d_n;