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exception_handler: Minimize arm64 FakeCall

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This commit is contained in:
Merry 2022-12-11 17:32:37 +00:00
parent e07dde9ed5
commit 7a2083b603
3 changed files with 1 additions and 18 deletions
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2
src/dynarmic/backend/arm64/emit_arm64_memory.cpp
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@ -503,7 +503,6 @@ void FastmemEmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::In
.marker = marker, .marker = marker,
.fc = FakeCall{ .fc = FakeCall{
.call_pc = mcl::bit_cast<u64>(code.ptr<void*>()), .call_pc = mcl::bit_cast<u64>(code.ptr<void*>()),
.ret_pc = 0,
}, },
.recompile = ctx.conf.recompile_on_fastmem_failure, .recompile = ctx.conf.recompile_on_fastmem_failure,
}); });
@ -554,7 +553,6 @@ void FastmemEmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::I
.marker = marker, .marker = marker,
.fc = FakeCall{ .fc = FakeCall{
.call_pc = mcl::bit_cast<u64>(code.ptr<void*>()), .call_pc = mcl::bit_cast<u64>(code.ptr<void*>()),
.ret_pc = 0,
}, },
.recompile = ctx.conf.recompile_on_fastmem_failure, .recompile = ctx.conf.recompile_on_fastmem_failure,
}); });

4
src/dynarmic/backend/exception_handler.h
View file

@ -34,10 +34,6 @@ struct FakeCall {
#elif defined(MCL_ARCHITECTURE_ARM64) #elif defined(MCL_ARCHITECTURE_ARM64)
struct FakeCall { struct FakeCall {
u64 call_pc; u64 call_pc;
u64 ret_pc;
std::optional<int> load_xscratch0;
std::optional<int> load_xscratch1;
std::optional<int> load_q0;
}; };
#else #else
# error "Invalid architecture" # error "Invalid architecture"

13
src/dynarmic/backend/exception_handler_posix.cpp
View file

@ -178,7 +178,7 @@ void SigHandler::SigAction(int sig, siginfo_t* info, void* raw_context) {
# define CTX_LR (mctx.regs[30]) # define CTX_LR (mctx.regs[30])
# define CTX_X(i) (mctx.regs[i]) # define CTX_X(i) (mctx.regs[i])
# define CTX_Q(i) (fpctx->vregs[i]) # define CTX_Q(i) (fpctx->vregs[i])
const auto fpctx = [&mctx] { [[maybe_unused]] const auto fpctx = [&mctx] {
_aarch64_ctx* header = (_aarch64_ctx*)&mctx.__reserved; _aarch64_ctx* header = (_aarch64_ctx*)&mctx.__reserved;
while (header->magic != FPSIMD_MAGIC) { while (header->magic != FPSIMD_MAGIC) {
ASSERT(header->magic && header->size); ASSERT(header->magic && header->size);
@ -203,19 +203,8 @@ void SigHandler::SigAction(int sig, siginfo_t* info, void* raw_context) {
if (iter != sig_handler.code_block_infos.end()) { if (iter != sig_handler.code_block_infos.end()) {
FakeCall fc = iter->cb(CTX_PC); FakeCall fc = iter->cb(CTX_PC);
CTX_LR = fc.ret_pc;
CTX_PC = fc.call_pc; CTX_PC = fc.call_pc;
if (fc.load_xscratch0) {
CTX_X(Arm64::Xscratch0.index()) = CTX_X(*fc.load_xscratch0);
}
if (fc.load_xscratch1) {
CTX_X(Arm64::Xscratch1.index()) = CTX_X(*fc.load_xscratch1);
}
if (fc.load_q0) {
CTX_Q(0) = CTX_Q(*fc.load_q0);
}
return; return;
} }
} }