From 7a2083b6032fa989b45087fc0c013db4f9e38885 Mon Sep 17 00:00:00 2001 From: Merry Date: Sun, 11 Dec 2022 17:32:37 +0000 Subject: [PATCH] exception_handler: Minimize arm64 FakeCall --- src/dynarmic/backend/arm64/emit_arm64_memory.cpp | 2 -- src/dynarmic/backend/exception_handler.h | 4 ---- src/dynarmic/backend/exception_handler_posix.cpp | 13 +------------ 3 files changed, 1 insertion(+), 18 deletions(-) diff --git a/src/dynarmic/backend/arm64/emit_arm64_memory.cpp b/src/dynarmic/backend/arm64/emit_arm64_memory.cpp index 1f36a7a0..4aff79f2 100644 --- a/src/dynarmic/backend/arm64/emit_arm64_memory.cpp +++ b/src/dynarmic/backend/arm64/emit_arm64_memory.cpp @@ -503,7 +503,6 @@ void FastmemEmitReadMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::In .marker = marker, .fc = FakeCall{ .call_pc = mcl::bit_cast(code.ptr()), - .ret_pc = 0, }, .recompile = ctx.conf.recompile_on_fastmem_failure, }); @@ -554,7 +553,6 @@ void FastmemEmitWriteMemory(oaknut::CodeGenerator& code, EmitContext& ctx, IR::I .marker = marker, .fc = FakeCall{ .call_pc = mcl::bit_cast(code.ptr()), - .ret_pc = 0, }, .recompile = ctx.conf.recompile_on_fastmem_failure, }); diff --git a/src/dynarmic/backend/exception_handler.h b/src/dynarmic/backend/exception_handler.h index 2268297e..179433ba 100644 --- a/src/dynarmic/backend/exception_handler.h +++ b/src/dynarmic/backend/exception_handler.h @@ -34,10 +34,6 @@ struct FakeCall { #elif defined(MCL_ARCHITECTURE_ARM64) struct FakeCall { u64 call_pc; - u64 ret_pc; - std::optional load_xscratch0; - std::optional load_xscratch1; - std::optional load_q0; }; #else # error "Invalid architecture" diff --git a/src/dynarmic/backend/exception_handler_posix.cpp b/src/dynarmic/backend/exception_handler_posix.cpp index eba2168f..eb7c02f8 100644 --- a/src/dynarmic/backend/exception_handler_posix.cpp +++ b/src/dynarmic/backend/exception_handler_posix.cpp @@ -178,7 +178,7 @@ void SigHandler::SigAction(int sig, siginfo_t* info, void* raw_context) { # define CTX_LR (mctx.regs[30]) # define CTX_X(i) (mctx.regs[i]) # define CTX_Q(i) (fpctx->vregs[i]) - const auto fpctx = [&mctx] { + [[maybe_unused]] const auto fpctx = [&mctx] { _aarch64_ctx* header = (_aarch64_ctx*)&mctx.__reserved; while (header->magic != FPSIMD_MAGIC) { ASSERT(header->magic && header->size); @@ -203,19 +203,8 @@ void SigHandler::SigAction(int sig, siginfo_t* info, void* raw_context) { if (iter != sig_handler.code_block_infos.end()) { FakeCall fc = iter->cb(CTX_PC); - CTX_LR = fc.ret_pc; CTX_PC = fc.call_pc; - if (fc.load_xscratch0) { - CTX_X(Arm64::Xscratch0.index()) = CTX_X(*fc.load_xscratch0); - } - if (fc.load_xscratch1) { - CTX_X(Arm64::Xscratch1.index()) = CTX_X(*fc.load_xscratch1); - } - if (fc.load_q0) { - CTX_Q(0) = CTX_Q(*fc.load_q0); - } - return; } }