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Fix IC/DC, FABS

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This commit is contained in:
Liam 2022-11-15 16:36:57 -05:00
parent 0df7dccf93
commit 6dea8c7875
2 changed files with 14 additions and 6 deletions
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4
src/dynarmic/backend/arm64/emit_arm64_a64.cpp
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@ -385,14 +385,14 @@ void EmitIR<IR::Opcode::A64ExceptionRaised>(oaknut::CodeGenerator& code, EmitCon
template<> template<>
void EmitIR<IR::Opcode::A64DataCacheOperationRaised>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::A64DataCacheOperationRaised>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto args = ctx.reg_alloc.GetArgumentInfo(inst);
ctx.reg_alloc.PrepareForCall(nullptr, args[1], args[2]); ctx.reg_alloc.PrepareForCall(nullptr, {}, args[1], args[2]);
EmitRelocation(code, ctx, LinkTarget::DataCacheOperationRaised); EmitRelocation(code, ctx, LinkTarget::DataCacheOperationRaised);
} }
template<> template<>
void EmitIR<IR::Opcode::A64InstructionCacheOperationRaised>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::A64InstructionCacheOperationRaised>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto args = ctx.reg_alloc.GetArgumentInfo(inst);
ctx.reg_alloc.PrepareForCall(nullptr, args[1], args[2]); ctx.reg_alloc.PrepareForCall(nullptr, {}, args[0], args[1]);
EmitRelocation(code, ctx, LinkTarget::InstructionCacheOperationRaised); EmitRelocation(code, ctx, LinkTarget::InstructionCacheOperationRaised);
} }

16
src/dynarmic/backend/arm64/emit_arm64_vector_floating_point.cpp
View file

@ -11,6 +11,7 @@
#include "dynarmic/backend/arm64/emit_context.h" #include "dynarmic/backend/arm64/emit_context.h"
#include "dynarmic/backend/arm64/fpsr_manager.h" #include "dynarmic/backend/arm64/fpsr_manager.h"
#include "dynarmic/backend/arm64/reg_alloc.h" #include "dynarmic/backend/arm64/reg_alloc.h"
#include "dynarmic/common/fp/info.h"
#include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/basic_block.h"
#include "dynarmic/ir/microinstruction.h" #include "dynarmic/ir/microinstruction.h"
#include "dynarmic/ir/opcodes.h" #include "dynarmic/ir/opcodes.h"
@ -234,10 +235,17 @@ void EmitToFixed(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst)
template<> template<>
void EmitIR<IR::Opcode::FPVectorAbs16>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::FPVectorAbs16>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; constexpr u16 non_sign_mask = FP::FPInfo<u16>::sign_mask - u16{1u};
(void)ctx; constexpr u64 non_sign_mask64 = mcl::bit::replicate_element<16, u64>(non_sign_mask);
(void)inst;
ASSERT_FALSE("Unimplemented"); auto args = ctx.reg_alloc.GetArgumentInfo(inst);
auto Qoperand = ctx.reg_alloc.ReadQ(args[0]);
auto Qresult = ctx.reg_alloc.WriteQ(inst);
RegAlloc::Realize(Qoperand, Qresult);
code.MOV(Xscratch0, non_sign_mask64);
code.DUP(Qresult->D2(), Xscratch0);
code.AND(Qresult->B16(), Qoperand->B16(), Qresult->B16());
} }
template<> template<>