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A64: Handle half-precision floating point in scalar FNEG

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With the half-precision variant of the FPNeg opcode added, we can
utilize it here to emulate the half-precision variant of FNEG.
This commit is contained in:
Lioncash 2019-03-23 13:23:31 -04:00 committed by MerryMage
parent c97efcb978
commit 10abc77fad
1 changed files with 3 additions and 3 deletions
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6
src/frontend/A64/translate/impl/floating_point_data_processing_one_register.cpp
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@ -36,12 +36,12 @@ bool TranslatorVisitor::FABS_float(Imm<2> type, Vec Vn, Vec Vd) {
bool TranslatorVisitor::FNEG_float(Imm<2> type, Vec Vn, Vec Vd) {
const auto datasize = FPGetDataSize(type);
if (!datasize || *datasize == 16) {
if (!datasize) {
return UnallocatedEncoding();
}
const IR::U32U64 operand = V_scalar(*datasize, Vn);
const IR::U32U64 result = ir.FPNeg(operand);
const IR::U16U32U64 operand = V_scalar(*datasize, Vn);
const IR::U16U32U64 result = ir.FPNeg(operand);
V_scalar(*datasize, Vd, result);
return true;
}