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A64: Implement INS (general)

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This commit is contained in:
MerryMage 2018-02-03 13:07:00 +00:00
parent d13704fdef
commit 0bb4474fb9
2 changed files with 16 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -674,7 +674,7 @@ INST(CMEQ_reg_2, "CMEQ (register)", "0Q101
INST(DUP_gen, "DUP (general)", "0Q001110000iiiii000011nnnnnddddd")
INST(SMOV, "SMOV", "0Q001110000iiiii001011nnnnnddddd")
INST(UMOV, "UMOV", "0Q001110000iiiii001111nnnnnddddd")
//INST(INS_gen, "INS (general)", "01001110000iiiii000111nnnnnddddd")
INST(INS_gen, "INS (general)", "01001110000iiiii000111nnnnnddddd")
INST(INS_elt, "INS (element)", "01101110000iiiii0iiii1nnnnnddddd")
// Data Processing - FP and SIMD - SIMD Three same

15
src/frontend/A64/translate/impl/simd_copy.cpp
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@ -73,6 +73,21 @@ bool TranslatorVisitor::UMOV(bool Q, Imm<5> imm5, Vec Vn, Reg Rd) {
return true;
}
bool TranslatorVisitor::INS_gen(Imm<5> imm5, Reg Rn, Vec Vd) {
const size_t size = Common::LowestSetBit(imm5.ZeroExtend());
if (size > 3) return UnallocatedEncoding();
const size_t index = imm5.ZeroExtend<size_t>() >> (size + 1);
const size_t esize = 8 << size;
const size_t datasize = 128;
const IR::UAny element = X(esize, Rn);
const IR::U128 result = ir.VectorSetElement(esize, V(datasize, Vd), index, element);
V(datasize, Vd, result);
return true;
}
bool TranslatorVisitor::INS_elt(Imm<5> imm5, Imm<4> imm4, Vec Vn, Vec Vd) {
const size_t size = Common::LowestSetBit(imm5.ZeroExtend());
if (size > 3) return UnallocatedEncoding();