N00byKing
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91e67ed430
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main.cpp: Replace Citra with yuzu Wiki Links
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2018-03-25 11:44:04 +02:00 |
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N00byKing
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d248b90c85
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main.cpp: Update Dialog from citra to yuzu
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2018-03-25 11:42:46 +02:00 |
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bunnei
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633abd5a94
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Merge pull request #264 from valentinvanelslande/cmd-dynarmic
yuzu_cmd: change default cpu core to dynarmic
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2018-03-22 23:53:15 -04:00 |
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Valentin Vanelslande
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ee5f5a2c2d
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yuzu_cmd: change default cpu core to dynarmic
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2018-03-22 19:44:34 -06:00 |
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Valentin Vanelslande
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47cac816f6
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default_ini: change default cpu core to dynarmic
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2018-03-22 19:43:59 -06:00 |
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bunnei
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4daf91fc69
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Merge pull request #263 from N00byKing/non3ds
Remove more N3DS References
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2018-03-22 18:02:51 -04:00 |
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N00byKing
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8afdbf6a1f
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Remove more N3DS References
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2018-03-22 21:25:06 +01:00 |
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bunnei
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b5c03088bc
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Merge pull request #261 from mailwl/spl
Service/spl: add module and services
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2018-03-22 10:28:28 -04:00 |
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mailwl
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95e747cd06
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Service/spl: add module and services
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2018-03-22 09:55:14 +03:00 |
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bunnei
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ec5ede68e7
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Merge pull request #258 from Subv/gpu_attribs
GPU: Added vertex attrib format and triangle topology registers
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2018-03-21 19:36:06 -04:00 |
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bunnei
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2ab021da14
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Merge pull request #260 from N00byKing/3535
Implement Pull #3535 from citra: CMake: Set EMU_ARCH_BITS in CMakeLists.txt
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2018-03-21 18:49:00 -04:00 |
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bunnei
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7fa3bf02ca
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Merge pull request #259 from N00byKing/usehttps
Use HTTPS for lz4
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2018-03-21 18:48:39 -04:00 |
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N00byKing
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34b733e70e
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CMake: Set EMU_ARCH_BITS in CMakeLists.txt
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2018-03-21 19:03:20 +01:00 |
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N00byKing
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3cdf6c536d
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Use HTTPS for Submodule lz4
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2018-03-21 19:01:54 +01:00 |
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bunnei
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4721ea4523
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Merge pull request #257 from mailwl/vi-module
Service/vi: convert services to module
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2018-03-21 10:48:15 -04:00 |
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Subv
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c450d264eb
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GPU: Added vertex attribute format registers.
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2018-03-21 09:26:47 -05:00 |
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mailwl
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6673ed1274
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Service/vi: convert services to module
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2018-03-21 13:09:40 +03:00 |
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Subv
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ae28a52277
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GPU: Added registers for the number of vertices to render.
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2018-03-20 23:28:06 -05:00 |
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bunnei
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0b3ab30762
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Merge pull request #254 from bunnei/port-citra-renderer
Port Citra OpenGL rasterizer code
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2018-03-20 21:37:43 -04:00 |
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bunnei
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8c8de2efe9
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Merge pull request #256 from mailwl/fatal
Service: add fatal:u, fatal:p services
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2018-03-20 11:12:39 -04:00 |
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mailwl
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dca7cfb9cf
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Service: add fatal:u, fatal:p services
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2018-03-20 16:59:02 +03:00 |
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bunnei
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6e3222363c
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renderer_gl: Port boilerplate rasterizer code over from Citra.
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2018-03-20 00:07:32 -04:00 |
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bunnei
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9c468e0c55
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gl_shader_util: Sync latest version with Citra.
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2018-03-20 00:07:31 -04:00 |
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bunnei
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d7b1ebe4a8
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renderer_gl: Port over gl_shader_gen module from Citra.
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2018-03-20 00:07:30 -04:00 |
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Mat M
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f4700ccabf
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Merge pull request #253 from Subv/rt_depth
GPU: Added registers for color and Z buffers.
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2018-03-19 23:37:47 -04:00 |
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bunnei
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4bdb46e4c2
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renderer_gl: Port over gl_shader_decompiler module from Citra.
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2018-03-19 23:14:03 -04:00 |
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bunnei
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a3e10b1a72
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renderer_gl: Port over gl_rasterizer_cache module from Citra.
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2018-03-19 23:14:03 -04:00 |
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bunnei
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db0cfb8e8b
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gl_resource_manager: Sync latest version with Citra.
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2018-03-19 23:14:02 -04:00 |
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bunnei
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0e4b9cdde4
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renderer_gl: Port over gl_stream_buffer module from Citra.
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2018-03-19 23:14:02 -04:00 |
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bunnei
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a1cf5020e6
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externals: Update Glad to latest version used by Citra.
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2018-03-19 23:14:01 -04:00 |
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bunnei
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6a0902e56d
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gl_state: Sync latest version with Citra.
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2018-03-19 23:13:49 -04:00 |
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Subv
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7a27a11770
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GPU: Added Z buffer registers to Maxwell3D's reg structure.
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2018-03-19 16:55:33 -05:00 |
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Subv
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21d9519032
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GPU: Added the render target (RT) registers to Maxwell3D's reg structure.
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2018-03-19 16:46:29 -05:00 |
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bunnei
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a90ab1dec7
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Merge pull request #252 from N00byKing/3064
Implement Pull #3064 from citra: Clean all format warnings (Yuzu-specific format warnings cleared too)
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2018-03-19 16:29:03 -04:00 |
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N00byKing
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1d8b6ad13b
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Clang Fixes
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2018-03-19 17:53:35 +01:00 |
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N00byKing
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d16e08454d
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oops
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2018-03-19 17:43:04 +01:00 |
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N00byKing
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0e72d0d826
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More Warning cleanups
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2018-03-19 17:27:04 +01:00 |
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N00byKing
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ef875d6a35
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Clean Warnings (?)
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2018-03-19 17:07:08 +01:00 |
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bunnei
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b2d7c92cae
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Merge pull request #251 from Subv/tic_tsc
GPU: Added TIC and TSC registers to the Maxwell3D register structure.
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2018-03-19 10:33:21 -04:00 |
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Subv
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dcae0c9a4f
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GPU: Added the TSC registers to the Maxwell3D register structure.
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2018-03-19 00:36:25 -05:00 |
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Subv
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cff7b29bba
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GPU: Added the TIC registers to the Maxwell3D register structure.
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2018-03-19 00:32:57 -05:00 |
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bunnei
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23a0d2d7b7
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Merge pull request #193 from N00byKing/3184_2_robotic_boogaloo
Implement Pull #3184 from citra: core/arm: Improve timing accuracy before service calls in JIT (Rebased)
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2018-03-18 22:35:47 -04:00 |
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bunnei
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2dc3a56e96
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Merge pull request #250 from bunnei/buffer-dequeue-wait
vi: TransactParcel DequeueBuffer should wait current thread
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2018-03-18 22:25:09 -04:00 |
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bunnei
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2332a44b68
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Merge pull request #249 from Subv/macro_E1A
GPU: Implement macro 0xE1A BindTextureInfoBuffer in HLE.
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2018-03-18 21:04:29 -04:00 |
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bunnei
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c1c92c30f9
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vi: Remove DequeueBuffer and wait until next available buffer.
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2018-03-18 20:56:35 -04:00 |
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bunnei
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c86af6939c
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hle_ipc: Add SleepClientThread to block current thread within HLE routines.
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2018-03-18 20:56:34 -04:00 |
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bunnei
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2faa83ca13
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hle_ipc: Use shared_ptr instead of unique_ptr to allow copies.
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2018-03-18 20:56:33 -04:00 |
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bunnei
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019f1a0cf0
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hle_ipc: Remove GetPointer(..) usage with WriteToOutgoingCommandBuffer.
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2018-03-18 20:56:33 -04:00 |
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bunnei
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e353b9fb3d
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thread: Add THREADSTATUS_WAIT_HLE_EVENT, remove THREADSTATUS_WAIT_ARB.
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2018-03-18 20:56:32 -04:00 |
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Subv
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03156d0c9a
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GPU: Implement macro 0xE1A BindTextureInfoBuffer in HLE.
This macro simply sets the current CB_ADDRESS to the texture buffer address for the input shader stage.
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2018-03-18 19:03:40 -05:00 |
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