2018-12-20 23:09:21 +01:00
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// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/common_types.h"
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2019-05-22 23:17:19 +02:00
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#include "common/logging/log.h"
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2018-12-20 23:09:21 +01:00
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#include "video_core/engines/shader_bytecode.h"
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2019-06-05 03:44:06 +02:00
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#include "video_core/shader/node_helper.h"
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2018-12-20 23:09:21 +01:00
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader {
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2019-04-20 05:10:19 +02:00
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using Tegra::Shader::HalfType;
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2018-12-20 23:09:21 +01:00
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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2019-01-30 06:09:40 +01:00
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u32 ShaderIR::DecodeArithmeticHalf(NodeBlock& bb, u32 pc) {
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2018-12-20 23:09:21 +01:00
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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2020-04-20 08:24:00 +02:00
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bool negate_a = false;
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bool negate_b = false;
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bool absolute_a = false;
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bool absolute_b = false;
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switch (opcode->get().GetId()) {
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case OpCode::Id::HADD2_R:
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2019-11-04 06:24:58 +01:00
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if (instr.alu_half.ftz == 0) {
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LOG_DEBUG(HW_GPU, "{} without FTZ is not implemented", opcode->get().GetName());
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2019-04-09 22:34:11 +02:00
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}
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2020-04-20 08:24:00 +02:00
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negate_a = ((instr.value >> 43) & 1) != 0;
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negate_b = ((instr.value >> 31) & 1) != 0;
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absolute_a = ((instr.value >> 44) & 1) != 0;
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absolute_b = ((instr.value >> 30) & 1) != 0;
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break;
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case OpCode::Id::HADD2_C:
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if (instr.alu_half.ftz == 0) {
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LOG_DEBUG(HW_GPU, "{} without FTZ is not implemented", opcode->get().GetName());
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}
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negate_a = ((instr.value >> 43) & 1) != 0;
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negate_b = ((instr.value >> 56) & 1) != 0;
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absolute_a = ((instr.value >> 44) & 1) != 0;
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absolute_b = ((instr.value >> 54) & 1) != 0;
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break;
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case OpCode::Id::HMUL2_R:
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negate_a = ((instr.value >> 43) & 1) != 0;
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absolute_a = ((instr.value >> 44) & 1) != 0;
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absolute_b = ((instr.value >> 30) & 1) != 0;
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break;
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case OpCode::Id::HMUL2_C:
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negate_b = ((instr.value >> 31) & 1) != 0;
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absolute_a = ((instr.value >> 44) & 1) != 0;
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absolute_b = ((instr.value >> 54) & 1) != 0;
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break;
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2018-12-21 06:31:46 +01:00
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}
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2019-04-16 00:48:11 +02:00
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half.type_a);
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2020-04-20 08:24:00 +02:00
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op_a = GetOperandAbsNegHalf(op_a, absolute_a, negate_a);
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2018-12-21 06:31:46 +01:00
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2020-04-20 08:24:00 +02:00
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auto [type_b, op_b] = [this, instr, opcode]() -> std::pair<HalfType, Node> {
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2018-12-21 06:31:46 +01:00
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switch (opcode->get().GetId()) {
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case OpCode::Id::HADD2_C:
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case OpCode::Id::HMUL2_C:
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2019-04-20 05:10:19 +02:00
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return {HalfType::F32, GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset())};
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2018-12-21 06:31:46 +01:00
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case OpCode::Id::HADD2_R:
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case OpCode::Id::HMUL2_R:
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return {instr.alu_half.type_b, GetRegister(instr.gpr20)};
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2018-12-21 06:31:46 +01:00
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default:
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UNREACHABLE();
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return {HalfType::F32, Immediate(0)};
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2018-12-21 06:31:46 +01:00
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}
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}();
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2019-04-20 05:10:19 +02:00
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op_b = UnpackHalfFloat(op_b, type_b);
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2020-04-20 08:24:00 +02:00
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op_b = GetOperandAbsNegHalf(op_b, absolute_b, negate_b);
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2018-12-21 06:31:46 +01:00
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2020-04-20 08:24:00 +02:00
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Node value = [this, opcode, op_a, op_b = op_b] {
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2018-12-21 06:31:46 +01:00
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switch (opcode->get().GetId()) {
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case OpCode::Id::HADD2_C:
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case OpCode::Id::HADD2_R:
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2020-04-20 08:24:00 +02:00
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return Operation(OperationCode::HAdd, PRECISE, op_a, op_b);
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2018-12-21 06:31:46 +01:00
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case OpCode::Id::HMUL2_C:
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case OpCode::Id::HMUL2_R:
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2020-04-20 08:24:00 +02:00
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return Operation(OperationCode::HMul, PRECISE, op_a, op_b);
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2018-12-21 06:31:46 +01:00
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default:
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UNIMPLEMENTED_MSG("Unhandled half float instruction: {}", opcode->get().GetName());
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return Immediate(0);
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}
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}();
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2019-04-20 05:10:19 +02:00
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value = GetSaturatedHalfFloat(value, instr.alu_half.saturate);
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2018-12-21 06:31:46 +01:00
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value = HalfMerge(GetRegister(instr.gpr0), value, instr.alu_half.merge);
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SetRegister(bb, instr.gpr0, value);
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2018-12-20 23:09:21 +01:00
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return pc;
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}
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2019-04-20 05:10:19 +02:00
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} // namespace VideoCommon::Shader
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