412 lines
14 KiB
C
412 lines
14 KiB
C
/*
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* Armv8-A Cryptographic Extension support functions for Aarch64
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*
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* Copyright The Mbed TLS Contributors
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#if defined(__aarch64__) && !defined(__ARM_FEATURE_CRYPTO) && \
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defined(__clang__) && __clang_major__ >= 4
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/* TODO: Re-consider above after https://reviews.llvm.org/D131064 merged.
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*
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* The intrinsic declaration are guarded by predefined ACLE macros in clang:
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* these are normally only enabled by the -march option on the command line.
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* By defining the macros ourselves we gain access to those declarations without
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* requiring -march on the command line.
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*
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* `arm_neon.h` could be included by any header file, so we put these defines
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* at the top of this file, before any includes.
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*/
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#define __ARM_FEATURE_CRYPTO 1
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/* See: https://arm-software.github.io/acle/main/acle.html#cryptographic-extensions
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*
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* `__ARM_FEATURE_CRYPTO` is deprecated, but we need to continue to specify it
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* for older compilers.
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*/
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#define __ARM_FEATURE_AES 1
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#define MBEDTLS_ENABLE_ARM_CRYPTO_EXTENSIONS_COMPILER_FLAG
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#endif
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#include <string.h>
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#include "common.h"
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#if defined(MBEDTLS_AESCE_C)
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#include "aesce.h"
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#if defined(MBEDTLS_HAVE_ARM64)
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#if !defined(__ARM_FEATURE_AES) || defined(MBEDTLS_ENABLE_ARM_CRYPTO_EXTENSIONS_COMPILER_FLAG)
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# if defined(__clang__)
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# if __clang_major__ < 4
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# error "A more recent Clang is required for MBEDTLS_AESCE_C"
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# endif
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# pragma clang attribute push (__attribute__((target("crypto"))), apply_to=function)
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# define MBEDTLS_POP_TARGET_PRAGMA
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# elif defined(__GNUC__)
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# if __GNUC__ < 6
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# error "A more recent GCC is required for MBEDTLS_AESCE_C"
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# endif
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# pragma GCC push_options
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# pragma GCC target ("arch=armv8-a+crypto")
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# define MBEDTLS_POP_TARGET_PRAGMA
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# elif defined(_MSC_VER)
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# else
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# error "Only MSVC, GCC and Clang supported for MBEDTLS_AESCE_C"
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# endif
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#endif /* !__ARM_FEATURE_AES || MBEDTLS_ENABLE_ARM_CRYPTO_EXTENSIONS_COMPILER_FLAG */
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#include <arm_neon.h>
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#if defined(__linux__)
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#include <asm/hwcap.h>
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#include <sys/auxv.h>
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#endif
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/*
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* AES instruction support detection routine
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*/
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int mbedtls_aesce_has_support(void)
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{
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#if defined(__linux__)
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unsigned long auxval = getauxval(AT_HWCAP);
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return (auxval & (HWCAP_ASIMD | HWCAP_AES)) ==
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(HWCAP_ASIMD | HWCAP_AES);
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#else
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/* Assume AES instructions are supported. */
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return 1;
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#endif
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}
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static uint8x16_t aesce_encrypt_block(uint8x16_t block,
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unsigned char *keys,
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int rounds)
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{
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for (int i = 0; i < rounds - 1; i++) {
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/* AES AddRoundKey, SubBytes, ShiftRows (in this order).
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* AddRoundKey adds the round key for the previous round. */
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block = vaeseq_u8(block, vld1q_u8(keys + i * 16));
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/* AES mix columns */
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block = vaesmcq_u8(block);
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}
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/* AES AddRoundKey for the previous round.
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* SubBytes, ShiftRows for the final round. */
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block = vaeseq_u8(block, vld1q_u8(keys + (rounds -1) * 16));
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/* Final round: no MixColumns */
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/* Final AddRoundKey */
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block = veorq_u8(block, vld1q_u8(keys + rounds * 16));
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return block;
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}
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static uint8x16_t aesce_decrypt_block(uint8x16_t block,
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unsigned char *keys,
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int rounds)
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{
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for (int i = 0; i < rounds - 1; i++) {
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/* AES AddRoundKey, SubBytes, ShiftRows */
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block = vaesdq_u8(block, vld1q_u8(keys + i * 16));
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/* AES inverse MixColumns for the next round.
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*
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* This means that we switch the order of the inverse AddRoundKey and
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* inverse MixColumns operations. We have to do this as AddRoundKey is
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* done in an atomic instruction together with the inverses of SubBytes
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* and ShiftRows.
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*
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* It works because MixColumns is a linear operation over GF(2^8) and
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* AddRoundKey is an exclusive or, which is equivalent to addition over
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* GF(2^8). (The inverse of MixColumns needs to be applied to the
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* affected round keys separately which has been done when the
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* decryption round keys were calculated.) */
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block = vaesimcq_u8(block);
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}
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/* The inverses of AES AddRoundKey, SubBytes, ShiftRows finishing up the
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* last full round. */
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block = vaesdq_u8(block, vld1q_u8(keys + (rounds - 1) * 16));
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/* Inverse AddRoundKey for inverting the initial round key addition. */
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block = veorq_u8(block, vld1q_u8(keys + rounds * 16));
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return block;
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}
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/*
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* AES-ECB block en(de)cryption
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*/
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int mbedtls_aesce_crypt_ecb(mbedtls_aes_context *ctx,
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int mode,
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const unsigned char input[16],
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unsigned char output[16])
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{
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uint8x16_t block = vld1q_u8(&input[0]);
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unsigned char *keys = (unsigned char *) (ctx->buf + ctx->rk_offset);
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if (mode == MBEDTLS_AES_ENCRYPT) {
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block = aesce_encrypt_block(block, keys, ctx->nr);
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} else {
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block = aesce_decrypt_block(block, keys, ctx->nr);
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}
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vst1q_u8(&output[0], block);
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return 0;
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}
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/*
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* Compute decryption round keys from encryption round keys
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*/
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void mbedtls_aesce_inverse_key(unsigned char *invkey,
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const unsigned char *fwdkey,
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int nr)
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{
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int i, j;
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j = nr;
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vst1q_u8(invkey, vld1q_u8(fwdkey + j * 16));
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for (i = 1, j--; j > 0; i++, j--) {
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vst1q_u8(invkey + i * 16,
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vaesimcq_u8(vld1q_u8(fwdkey + j * 16)));
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}
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vst1q_u8(invkey + i * 16, vld1q_u8(fwdkey + j * 16));
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}
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static inline uint32_t aes_rot_word(uint32_t word)
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{
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return (word << (32 - 8)) | (word >> 8);
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}
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static inline uint32_t aes_sub_word(uint32_t in)
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{
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uint8x16_t v = vreinterpretq_u8_u32(vdupq_n_u32(in));
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uint8x16_t zero = vdupq_n_u8(0);
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/* vaeseq_u8 does both SubBytes and ShiftRows. Taking the first row yields
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* the correct result as ShiftRows doesn't change the first row. */
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v = vaeseq_u8(zero, v);
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return vgetq_lane_u32(vreinterpretq_u32_u8(v), 0);
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}
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/*
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* Key expansion function
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*/
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static void aesce_setkey_enc(unsigned char *rk,
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const unsigned char *key,
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const size_t key_bit_length)
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{
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static uint8_t const rcon[] = { 0x01, 0x02, 0x04, 0x08, 0x10,
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0x20, 0x40, 0x80, 0x1b, 0x36 };
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/* See https://nvlpubs.nist.gov/nistpubs/FIPS/NIST.FIPS.197.pdf
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* - Section 5, Nr = Nk + 6
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* - Section 5.2, the length of round keys is Nb*(Nr+1)
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*/
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const uint32_t key_len_in_words = key_bit_length / 32; /* Nk */
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const size_t round_key_len_in_words = 4; /* Nb */
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const size_t rounds_needed = key_len_in_words + 6; /* Nr */
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const size_t round_keys_len_in_words =
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round_key_len_in_words * (rounds_needed + 1); /* Nb*(Nr+1) */
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const uint32_t *rko_end = (uint32_t *) rk + round_keys_len_in_words;
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memcpy(rk, key, key_len_in_words * 4);
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for (uint32_t *rki = (uint32_t *) rk;
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rki + key_len_in_words < rko_end;
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rki += key_len_in_words) {
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size_t iteration = (rki - (uint32_t *) rk) / key_len_in_words;
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uint32_t *rko;
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rko = rki + key_len_in_words;
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rko[0] = aes_rot_word(aes_sub_word(rki[key_len_in_words - 1]));
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rko[0] ^= rcon[iteration] ^ rki[0];
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rko[1] = rko[0] ^ rki[1];
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rko[2] = rko[1] ^ rki[2];
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rko[3] = rko[2] ^ rki[3];
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if (rko + key_len_in_words > rko_end) {
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/* Do not write overflow words.*/
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continue;
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}
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switch (key_bit_length) {
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case 128:
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break;
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case 192:
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rko[4] = rko[3] ^ rki[4];
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rko[5] = rko[4] ^ rki[5];
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break;
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case 256:
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rko[4] = aes_sub_word(rko[3]) ^ rki[4];
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rko[5] = rko[4] ^ rki[5];
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rko[6] = rko[5] ^ rki[6];
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rko[7] = rko[6] ^ rki[7];
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break;
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}
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}
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}
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/*
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* Key expansion, wrapper
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*/
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int mbedtls_aesce_setkey_enc(unsigned char *rk,
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const unsigned char *key,
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size_t bits)
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{
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switch (bits) {
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case 128:
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case 192:
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case 256:
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aesce_setkey_enc(rk, key, bits);
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break;
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default:
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return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
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}
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return 0;
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}
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#if defined(MBEDTLS_GCM_C)
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#if !defined(__clang__) && defined(__GNUC__) && __GNUC__ == 5
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/* Some intrinsics are not available for GCC 5.X. */
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#define vreinterpretq_p64_u8(a) ((poly64x2_t) a)
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#define vreinterpretq_u8_p128(a) ((uint8x16_t) a)
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static inline poly64_t vget_low_p64(poly64x2_t __a)
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{
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uint64x2_t tmp = (uint64x2_t) (__a);
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uint64x1_t lo = vcreate_u64(vgetq_lane_u64(tmp, 0));
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return (poly64_t) (lo);
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}
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#endif /* !__clang__ && __GNUC__ && __GNUC__ == 5*/
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/* vmull_p64/vmull_high_p64 wrappers.
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*
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* Older compilers miss some intrinsic functions for `poly*_t`. We use
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* uint8x16_t and uint8x16x3_t as input/output parameters.
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*/
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static inline uint8x16_t pmull_low(uint8x16_t a, uint8x16_t b)
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{
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return vreinterpretq_u8_p128(
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vmull_p64(
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(poly64_t) vget_low_p64(vreinterpretq_p64_u8(a)),
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(poly64_t) vget_low_p64(vreinterpretq_p64_u8(b))));
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}
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static inline uint8x16_t pmull_high(uint8x16_t a, uint8x16_t b)
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{
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return vreinterpretq_u8_p128(
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vmull_high_p64(vreinterpretq_p64_u8(a),
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vreinterpretq_p64_u8(b)));
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}
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/* GHASH does 128b polynomial multiplication on block in GF(2^128) defined by
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* `x^128 + x^7 + x^2 + x + 1`.
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*
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* Arm64 only has 64b->128b polynomial multipliers, we need to do 4 64b
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* multiplies to generate a 128b.
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*
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* `poly_mult_128` executes polynomial multiplication and outputs 256b that
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* represented by 3 128b due to code size optimization.
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*
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* Output layout:
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* | | | |
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* |------------|-------------|-------------|
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* | ret.val[0] | h3:h2:00:00 | high 128b |
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* | ret.val[1] | :m2:m1:00 | middle 128b |
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* | ret.val[2] | : :l1:l0 | low 128b |
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*/
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static inline uint8x16x3_t poly_mult_128(uint8x16_t a, uint8x16_t b)
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{
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uint8x16x3_t ret;
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uint8x16_t h, m, l; /* retval high/middle/low */
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uint8x16_t c, d, e;
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h = pmull_high(a, b); /* h3:h2:00:00 = a1*b1 */
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l = pmull_low(a, b); /* : :l1:l0 = a0*b0 */
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c = vextq_u8(b, b, 8); /* :c1:c0 = b0:b1 */
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d = pmull_high(a, c); /* :d2:d1:00 = a1*b0 */
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e = pmull_low(a, c); /* :e2:e1:00 = a0*b1 */
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m = veorq_u8(d, e); /* :m2:m1:00 = d + e */
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ret.val[0] = h;
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ret.val[1] = m;
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ret.val[2] = l;
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return ret;
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}
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/*
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* Modulo reduction.
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*
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* See: https://www.researchgate.net/publication/285612706_Implementing_GCM_on_ARMv8
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*
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* Section 4.3
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*
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* Modular reduction is slightly more complex. Write the GCM modulus as f(z) =
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* z^128 +r(z), where r(z) = z^7+z^2+z+ 1. The well known approach is to
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* consider that z^128 ≡r(z) (mod z^128 +r(z)), allowing us to write the 256-bit
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* operand to be reduced as a(z) = h(z)z^128 +l(z)≡h(z)r(z) + l(z). That is, we
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* simply multiply the higher part of the operand by r(z) and add it to l(z). If
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* the result is still larger than 128 bits, we reduce again.
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*/
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static inline uint8x16_t poly_mult_reduce(uint8x16x3_t input)
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{
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uint8x16_t const ZERO = vdupq_n_u8(0);
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/* use 'asm' as an optimisation barrier to prevent loading MODULO from memory */
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uint64x2_t r = vreinterpretq_u64_u8(vdupq_n_u8(0x87));
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asm ("" : "+w" (r));
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uint8x16_t const MODULO = vreinterpretq_u8_u64(vshrq_n_u64(r, 64 - 8));
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uint8x16_t h, m, l; /* input high/middle/low 128b */
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uint8x16_t c, d, e, f, g, n, o;
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h = input.val[0]; /* h3:h2:00:00 */
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m = input.val[1]; /* :m2:m1:00 */
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l = input.val[2]; /* : :l1:l0 */
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c = pmull_high(h, MODULO); /* :c2:c1:00 = reduction of h3 */
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d = pmull_low(h, MODULO); /* : :d1:d0 = reduction of h2 */
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e = veorq_u8(c, m); /* :e2:e1:00 = m2:m1:00 + c2:c1:00 */
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f = pmull_high(e, MODULO); /* : :f1:f0 = reduction of e2 */
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g = vextq_u8(ZERO, e, 8); /* : :g1:00 = e1:00 */
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n = veorq_u8(d, l); /* : :n1:n0 = d1:d0 + l1:l0 */
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o = veorq_u8(n, f); /* o1:o0 = f1:f0 + n1:n0 */
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return veorq_u8(o, g); /* = o1:o0 + g1:00 */
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}
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/*
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* GCM multiplication: c = a times b in GF(2^128)
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*/
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void mbedtls_aesce_gcm_mult(unsigned char c[16],
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const unsigned char a[16],
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const unsigned char b[16])
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{
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uint8x16_t va, vb, vc;
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va = vrbitq_u8(vld1q_u8(&a[0]));
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vb = vrbitq_u8(vld1q_u8(&b[0]));
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vc = vrbitq_u8(poly_mult_reduce(poly_mult_128(va, vb)));
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vst1q_u8(&c[0], vc);
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}
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#endif /* MBEDTLS_GCM_C */
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#if defined(MBEDTLS_POP_TARGET_PRAGMA)
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#if defined(__clang__)
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#pragma clang attribute pop
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#elif defined(__GNUC__)
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#pragma GCC pop_options
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#endif
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#undef MBEDTLS_POP_TARGET_PRAGMA
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#endif
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#endif /* MBEDTLS_HAVE_ARM64 */
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#endif /* MBEDTLS_AESCE_C */
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