Add aesni_gcm_mult()
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2 changed files with 131 additions and 1 deletions
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@ -58,13 +58,29 @@ int aesni_supports( unsigned int what );
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* \param input 16-byte input block
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* \param output 16-byte output block
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*
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* \return 0 if success, 1 if operation failed
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* \return 0 on success (cannot fail)
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*/
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int aesni_crypt_ecb( aes_context *ctx,
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int mode,
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const unsigned char input[16],
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unsigned char output[16] );
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/**
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* \brief GCM multiplication: c = a * b in GF(2^128)
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*
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* \param c Result
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* \param a First operand
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* \param b Second operand
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*
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* \note Both operands and result are bit strings interpreted as
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* elements of GF(2^128) as per the GCM spec.
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*
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* \return 0 on success (cannot fail)
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*/
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int aesni_gcm_mult( unsigned char c[16],
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const unsigned char a[16],
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const unsigned char b[16] );
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#endif /* POLARSSL_HAVE_X86_64 */
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#endif /* POLARSSL_AESNI_H */
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114
library/aesni.c
114
library/aesni.c
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@ -25,6 +25,7 @@
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/*
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* [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
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* [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
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*/
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#include "polarssl/config.h"
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@ -101,6 +102,119 @@ int aesni_crypt_ecb( aes_context *ctx,
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return( 0 );
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}
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/*
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* GCM multiplication: c = a times b in GF(2^128)
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* Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
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*/
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int aesni_gcm_mult( unsigned char c[16],
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const unsigned char a[16],
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const unsigned char b[16] )
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{
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unsigned char aa[16], bb[16], cc[16];
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size_t i;
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/* The inputs are in big-endian order, so byte-reverse them */
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for( i = 0; i < 16; i++ )
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{
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aa[i] = a[15 - i];
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bb[i] = b[15 - i];
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}
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asm( "movdqu (%0), %%xmm0 \n" // a1:a0
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"movdqu (%1), %%xmm1 \n" // b1:b0
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/*
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* Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
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* using [CLMUL-WP] algorithm 1 (p. 13).
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*/
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"movdqa %%xmm1, %%xmm2 \n" // copy of b1:b0
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"movdqa %%xmm1, %%xmm3 \n" // same
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"movdqa %%xmm1, %%xmm4 \n" // same
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"pclmulqdq $0x00, %%xmm0, %%xmm1 \n" // a0*b0 = c1:c0
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"pclmulqdq $0x11, %%xmm0, %%xmm2 \n" // a1*b1 = d1:d0
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"pclmulqdq $0x10, %%xmm0, %%xmm3 \n" // a0*b1 = e1:e0
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"pclmulqdq $0x01, %%xmm0, %%xmm4 \n" // a1*b0 = f1:f0
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"pxor %%xmm3, %%xmm4 \n" // e1+f1:e0+f0
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"movdqa %%xmm4, %%xmm3 \n" // same
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"psrldq $8, %%xmm4 \n" // 0:e1+f1
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"pslldq $8, %%xmm3 \n" // e0+f0:0
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"pxor %%xmm4, %%xmm2 \n" // d1:d0+e1+f1
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"pxor %%xmm3, %%xmm1 \n" // c1+e0+f1:c0
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/*
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* Now shift the result one bit to the left,
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* taking advantage of [CLMUL-WP] eq 27 (p. 20)
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*/
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"movdqa %%xmm1, %%xmm3 \n" // r1:r0
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"movdqa %%xmm2, %%xmm4 \n" // r3:r2
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"psllq $1, %%xmm1 \n" // r1<<1:r0<<1
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"psllq $1, %%xmm2 \n" // r3<<1:r2<<1
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"psrlq $63, %%xmm3 \n" // r1>>63:r0>>63
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"psrlq $63, %%xmm4 \n" // r3>>63:r2>>63
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"movdqa %%xmm3, %%xmm5 \n" // r1>>63:r0>>63
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"pslldq $8, %%xmm3 \n" // r0>>63:0
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"pslldq $8, %%xmm4 \n" // r2>>63:0
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"psrldq $8, %%xmm5 \n" // 0:r1>>63
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"por %%xmm3, %%xmm1 \n" // r1<<1|r0>>63:r0<<1
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"por %%xmm4, %%xmm2 \n" // r3<<1|r2>>62:r2<<1
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"por %%xmm5, %%xmm2 \n" // r3<<1|r2>>62:r2<<1|r1>>63
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/*
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* Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
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* using [CLMUL-WP] algorithm 5 (p. 20).
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* Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
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*/
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/* Step 2 (1) */
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"movdqa %%xmm1, %%xmm3 \n" // x1:x0
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"movdqa %%xmm1, %%xmm4 \n" // same
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"movdqa %%xmm1, %%xmm5 \n" // same
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"psllq $63, %%xmm3 \n" // x1<<63:x0<<63 = stuff:a
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"psllq $62, %%xmm4 \n" // x1<<62:x0<<62 = stuff:b
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"psllq $57, %%xmm5 \n" // x1<<57:x0<<57 = stuff:c
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/* Step 2 (2) */
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"pxor %%xmm4, %%xmm3 \n" // stuff:a+b
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"pxor %%xmm5, %%xmm3 \n" // stuff:a+b+c
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"pslldq $8, %%xmm3 \n" // a+b+c:0
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"pxor %%xmm3, %%xmm1 \n" // x1+a+b+c:x0 = d:x0
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/* Steps 3 and 4 */
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"movdqa %%xmm1,%%xmm0 \n" // d:x0
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"movdqa %%xmm1,%%xmm4 \n" // same
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"movdqa %%xmm1,%%xmm5 \n" // same
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"psrlq $1, %%xmm0 \n" // e1:x0>>1 = e1:e0'
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"psrlq $2, %%xmm4 \n" // f1:x0>>2 = f1:f0'
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"psrlq $7, %%xmm5 \n" // g1:x0>>7 = g1:g0'
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"pxor %%xmm4, %%xmm0 \n" // e1+f1:e0'+f0'
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"pxor %%xmm5, %%xmm0 \n" // e1+f1+g1:e0'+f0'+g0'
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// e0'+f0'+g0' is almost e0+f0+g0, except for some missing
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// bits carried from d. Now get those bits back in.
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"movdqa %%xmm1,%%xmm3 \n" // d:x0
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"movdqa %%xmm1,%%xmm4 \n" // same
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"movdqa %%xmm1,%%xmm5 \n" // same
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"psllq $63, %%xmm3 \n" // d<<63:stuff
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"psllq $62, %%xmm4 \n" // d<<62:stuff
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"psllq $57, %%xmm5 \n" // d<<57:stuff
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"pxor %%xmm4, %%xmm3 \n" // d<<63+d<<62:stuff
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"pxor %%xmm5, %%xmm3 \n" // missing bits of d:stuff
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"psrldq $8, %%xmm3 \n" // 0:missing bits of d
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"pxor %%xmm3, %%xmm0 \n" // e1+f1+g1:e0+f0+g0
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"pxor %%xmm1, %%xmm0 \n" // h1:h0
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"pxor %%xmm2, %%xmm0 \n" // x3+h1:x2+h0
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"movdqu %%xmm0, (%2) \n" // done
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:
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: "r" (aa), "r" (bb), "r" (cc)
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: "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5" );
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/* Now byte-reverse the outputs */
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for( i = 0; i < 16; i++ )
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c[i] = cc[15 - i];
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return( 0 );
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}
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#endif /* POLARSSL_HAVE_X86_64 */
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#endif /* POLARSSL_AESNI_C */
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