Merge pull request #8326 from daverodgman/aesce-thumb2
Support hw-accelerated AES on Thumb and Arm
This commit is contained in:
Dave Rodgman
GitHub
commit
9fbac381e6
6 changed files with 219 additions and 32 deletions
3
ChangeLog.d/armv8-aesce.txt
Normal file
3
ChangeLog.d/armv8-aesce.txt
Normal file
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@ -0,0 +1,3 @@
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Features
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* Support use of Armv8-A Cryptographic Extensions for hardware acclerated
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AES when compiling for Thumb (T32) or 32-bit Arm (A32).
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@ -2238,7 +2238,7 @@
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/**
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* \def MBEDTLS_AESCE_C
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*
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* Enable AES cryptographic extension support on 64-bit Arm.
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* Enable AES cryptographic extension support on Armv8.
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*
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* Module: library/aesce.c
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* Caller: library/aes.c
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@ -2249,13 +2249,15 @@
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* system, Armv8-A Cryptographic Extensions must be supported by
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* the CPU when this option is enabled.
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*
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* \note Minimum compiler versions for this feature are Clang 4.0,
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* armclang 6.6, GCC 6.0 or MSVC 2019 version 16.11.2.
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* \note Minimum compiler versions for this feature when targeting aarch64
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* are Clang 4.0; armclang 6.6; GCC 6.0; or MSVC 2019 version 16.11.2.
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* Minimum compiler versions for this feature when targeting 32-bit
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* Arm or Thumb are Clang 11.0; armclang 6.20; or GCC 6.0.
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*
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* \note \c CFLAGS must be set to a minimum of \c -march=armv8-a+crypto for
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* armclang <= 6.9
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*
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* This module adds support for the AES Armv8-A Cryptographic Extensions on Aarch64 systems.
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* This module adds support for the AES Armv8-A Cryptographic Extensions on Armv8 systems.
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*/
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#define MBEDTLS_AESCE_C
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@ -23,9 +23,9 @@
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#include "mbedtls/error.h"
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#if defined(MBEDTLS_AES_USE_HARDWARE_ONLY)
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#if !((defined(MBEDTLS_ARCH_IS_ARM64) && defined(MBEDTLS_AESCE_C)) || \
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(defined(MBEDTLS_ARCH_IS_X64) && defined(MBEDTLS_AESNI_C)) || \
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(defined(MBEDTLS_ARCH_IS_X86) && defined(MBEDTLS_AESNI_C)))
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#if !((defined(MBEDTLS_ARCH_IS_ARMV8_A) && defined(MBEDTLS_AESCE_C)) || \
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(defined(MBEDTLS_ARCH_IS_X64) && defined(MBEDTLS_AESNI_C)) || \
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(defined(MBEDTLS_ARCH_IS_X86) && defined(MBEDTLS_AESNI_C)))
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#error "MBEDTLS_AES_USE_HARDWARE_ONLY defined, but not all prerequisites"
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#endif
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#endif
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150
library/aesce.c
150
library/aesce.c
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@ -5,8 +5,17 @@
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* SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
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*/
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#if defined(__aarch64__) && !defined(__ARM_FEATURE_CRYPTO) && \
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defined(__clang__) && __clang_major__ >= 4
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#if defined(__clang__) && (__clang_major__ >= 4)
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/* Ideally, we would simply use MBEDTLS_ARCH_IS_ARMV8_A in the following #if,
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* but that is defined by build_info.h, and we need this block to happen first. */
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#if defined(__ARM_ARCH)
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#if __ARM_ARCH >= 8
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#define MBEDTLS_AESCE_ARCH_IS_ARMV8_A
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#endif
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#endif
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#if defined(MBEDTLS_AESCE_ARCH_IS_ARMV8_A) && !defined(__ARM_FEATURE_CRYPTO)
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/* TODO: Re-consider above after https://reviews.llvm.org/D131064 merged.
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*
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* The intrinsic declaration are guarded by predefined ACLE macros in clang:
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@ -27,6 +36,8 @@
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#define MBEDTLS_ENABLE_ARM_CRYPTO_EXTENSIONS_COMPILER_FLAG
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#endif
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#endif /* defined(__clang__) && (__clang_major__ >= 4) */
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#include <string.h>
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#include "common.h"
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@ -34,12 +45,14 @@
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#include "aesce.h"
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#if defined(MBEDTLS_ARCH_IS_ARM64)
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#if defined(MBEDTLS_ARCH_IS_ARMV8_A) && defined(__ARM_NEON)
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/* Compiler version checks. */
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#if defined(__clang__)
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# if __clang_major__ < 4
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# error "Minimum version of Clang for MBEDTLS_AESCE_C is 4.0."
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# if defined(MBEDTLS_ARCH_IS_ARM32) && (__clang_major__ < 11)
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# error "Minimum version of Clang for MBEDTLS_AESCE_C on 32-bit Arm or Thumb is 11.0."
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# elif defined(MBEDTLS_ARCH_IS_ARM64) && (__clang_major__ < 4)
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# error "Minimum version of Clang for MBEDTLS_AESCE_C on aarch64 is 4.0."
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# endif
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#elif defined(__GNUC__)
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# if __GNUC__ < 6
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@ -52,6 +65,15 @@
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# if _MSC_VER < 1929
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# error "Minimum version of MSVC for MBEDTLS_AESCE_C is 2019 version 16.11.2."
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# endif
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#elif defined(__ARMCC_VERSION)
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# if defined(MBEDTLS_ARCH_IS_ARM32) && (__ARMCC_VERSION < 6200002)
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/* TODO: We haven't verified armclang for 32-bit Arm/Thumb prior to 6.20.
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* If someone verified that, please update this and document of
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* `MBEDTLS_AESCE_C` in `mbedtls_config.h`. */
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# error "Minimum version of armclang for MBEDTLS_AESCE_C on 32-bit Arm is 6.20."
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# elif defined(MBEDTLS_ARCH_IS_ARM64) && (__ARMCC_VERSION < 6060000)
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# error "Minimum version of armclang for MBEDTLS_AESCE_C on aarch64 is 6.6."
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# endif
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#endif
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#ifdef __ARM_NEON
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@ -84,8 +106,19 @@
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#if defined(__linux__) && !defined(MBEDTLS_AES_USE_HARDWARE_ONLY)
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#include <asm/hwcap.h>
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#include <sys/auxv.h>
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#if !defined(HWCAP_NEON)
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#define HWCAP_NEON (1 << 12)
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#endif
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#if !defined(HWCAP2_AES)
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#define HWCAP2_AES (1 << 0)
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#endif
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#if !defined(HWCAP_AES)
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#define HWCAP_AES (1 << 3)
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#endif
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#if !defined(HWCAP_ASIMD)
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#define HWCAP_ASIMD (1 << 1)
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#endif
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signed char mbedtls_aesce_has_support_result = -1;
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@ -102,6 +135,16 @@ int mbedtls_aesce_has_support_impl(void)
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* once, but that is harmless.
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*/
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if (mbedtls_aesce_has_support_result == -1) {
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#if defined(MBEDTLS_ARCH_IS_ARM32)
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unsigned long auxval = getauxval(AT_HWCAP);
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unsigned long auxval2 = getauxval(AT_HWCAP2);
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if (((auxval & HWCAP_NEON) == HWCAP_NEON) &&
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((auxval2 & HWCAP2_AES) == HWCAP2_AES)) {
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mbedtls_aesce_has_support_result = 1;
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} else {
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mbedtls_aesce_has_support_result = 0;
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}
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#else
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unsigned long auxval = getauxval(AT_HWCAP);
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if ((auxval & (HWCAP_ASIMD | HWCAP_AES)) ==
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(HWCAP_ASIMD | HWCAP_AES)) {
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@ -109,6 +152,7 @@ int mbedtls_aesce_has_support_impl(void)
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} else {
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mbedtls_aesce_has_support_result = 0;
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}
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#endif
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}
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return mbedtls_aesce_has_support_result;
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}
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@ -362,24 +406,91 @@ int mbedtls_aesce_setkey_enc(unsigned char *rk,
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#if defined(MBEDTLS_GCM_C)
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#if !defined(__clang__) && defined(__GNUC__) && __GNUC__ == 5
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/* Some intrinsics are not available for GCC 5.X. */
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#define vreinterpretq_p64_u8(a) ((poly64x2_t) a)
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#define vreinterpretq_u8_p128(a) ((uint8x16_t) a)
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static inline poly64_t vget_low_p64(poly64x2_t __a)
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#if defined(MBEDTLS_ARCH_IS_ARM32)
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#if defined(__clang__)
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/* On clang for A32/T32, work around some missing intrinsics and types which are listed in
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* [ACLE](https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#polynomial-1)
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* These are only required for GCM.
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*/
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#define vreinterpretq_u64_p64(a) ((uint64x2_t) a)
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typedef uint8x16_t poly128_t;
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static inline poly128_t vmull_p64(poly64_t a, poly64_t b)
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{
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uint64x2_t tmp = (uint64x2_t) (__a);
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uint64x1_t lo = vcreate_u64(vgetq_lane_u64(tmp, 0));
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return (poly64_t) (lo);
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poly128_t r;
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asm ("vmull.p64 %[r], %[a], %[b]" : [r] "=w" (r) : [a] "w" (a), [b] "w" (b) :);
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return r;
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}
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#endif /* !__clang__ && __GNUC__ && __GNUC__ == 5*/
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/* This is set to cause some more missing intrinsics to be defined below */
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#define COMMON_MISSING_INTRINSICS
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static inline poly128_t vmull_high_p64(poly64x2_t a, poly64x2_t b)
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{
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return vmull_p64((poly64_t) (vget_high_u64((uint64x2_t) a)),
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(poly64_t) (vget_high_u64((uint64x2_t) b)));
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}
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#endif /* defined(__clang__) */
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static inline uint8x16_t vrbitq_u8(uint8x16_t x)
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{
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/* There is no vrbitq_u8 instruction in A32/T32, so provide
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* an equivalent non-Neon implementation. Reverse bit order in each
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* byte with 4x rbit, rev. */
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asm ("ldm %[p], { r2-r5 } \n\t"
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"rbit r2, r2 \n\t"
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"rev r2, r2 \n\t"
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"rbit r3, r3 \n\t"
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"rev r3, r3 \n\t"
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"rbit r4, r4 \n\t"
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"rev r4, r4 \n\t"
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"rbit r5, r5 \n\t"
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"rev r5, r5 \n\t"
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"stm %[p], { r2-r5 } \n\t"
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:
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/* Output: 16 bytes of memory pointed to by &x */
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"+m" (*(uint8_t(*)[16]) &x)
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:
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[p] "r" (&x)
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:
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"r2", "r3", "r4", "r5"
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);
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return x;
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}
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#endif /* defined(MBEDTLS_ARCH_IS_ARM32) */
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#if defined(MBEDTLS_COMPILER_IS_GCC) && __GNUC__ == 5
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/* Some intrinsics are not available for GCC 5.X. */
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#define COMMON_MISSING_INTRINSICS
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#endif /* MBEDTLS_COMPILER_IS_GCC && __GNUC__ == 5 */
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#if defined(COMMON_MISSING_INTRINSICS)
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/* Missing intrinsics common to both GCC 5, and Clang on 32-bit */
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#define vreinterpretq_p64_u8(a) ((poly64x2_t) a)
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#define vreinterpretq_u8_p128(a) ((uint8x16_t) a)
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static inline poly64x1_t vget_low_p64(poly64x2_t a)
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{
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uint64x1_t r = vget_low_u64(vreinterpretq_u64_p64(a));
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return (poly64x1_t) r;
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}
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#endif /* COMMON_MISSING_INTRINSICS */
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/* vmull_p64/vmull_high_p64 wrappers.
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*
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* Older compilers miss some intrinsic functions for `poly*_t`. We use
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* uint8x16_t and uint8x16x3_t as input/output parameters.
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*/
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#if defined(__GNUC__) && !defined(__clang__)
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#if defined(MBEDTLS_COMPILER_IS_GCC)
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/* GCC reports incompatible type error without cast. GCC think poly64_t and
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* poly64x1_t are different, that is different with MSVC and Clang. */
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#define MBEDTLS_VMULL_P64(a, b) vmull_p64((poly64_t) a, (poly64_t) b)
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@ -388,7 +499,8 @@ static inline poly64_t vget_low_p64(poly64x2_t __a)
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* error with/without cast. And I think poly64_t and poly64x1_t are same, no
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* cast for clang also. */
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#define MBEDTLS_VMULL_P64(a, b) vmull_p64(a, b)
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#endif
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#endif /* MBEDTLS_COMPILER_IS_GCC */
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static inline uint8x16_t pmull_low(uint8x16_t a, uint8x16_t b)
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{
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@ -464,7 +576,7 @@ static inline uint8x16_t poly_mult_reduce(uint8x16x3_t input)
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/* use 'asm' as an optimisation barrier to prevent loading MODULO from
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* memory. It is for GNUC compatible compilers.
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*/
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asm ("" : "+w" (r));
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asm volatile ("" : "+w" (r));
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#endif
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uint8x16_t const MODULO = vreinterpretq_u8_u64(vshrq_n_u64(r, 64 - 8));
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uint8x16_t h, m, l; /* input high/middle/low 128b */
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@ -507,6 +619,6 @@ void mbedtls_aesce_gcm_mult(unsigned char c[16],
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#undef MBEDTLS_POP_TARGET_PRAGMA
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#endif
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#endif /* MBEDTLS_ARCH_IS_ARM64 */
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#endif /* MBEDTLS_ARCH_IS_ARMV8_A */
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#endif /* MBEDTLS_AESCE_C */
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@ -2,7 +2,7 @@
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* \file aesce.h
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*
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* \brief Support hardware AES acceleration on Armv8-A processors with
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* the Armv8-A Cryptographic Extension in AArch64 execution state.
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* the Armv8-A Cryptographic Extension.
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*
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* \warning These functions are only for internal use by other library
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* functions; you must not call them directly.
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@ -19,7 +19,7 @@
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#include "mbedtls/aes.h"
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#if defined(MBEDTLS_AESCE_C) && defined(MBEDTLS_ARCH_IS_ARM64)
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#if defined(MBEDTLS_AESCE_C) && defined(MBEDTLS_ARCH_IS_ARMV8_A) && defined(__ARM_NEON)
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#define MBEDTLS_AESCE_HAVE_CODE
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@ -118,6 +118,12 @@ int mbedtls_aesce_setkey_enc(unsigned char *rk,
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}
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#endif
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#endif /* MBEDTLS_AESCE_C && MBEDTLS_ARCH_IS_ARM64 */
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#else
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#if defined(MBEDTLS_AES_USE_HARDWARE_ONLY) && defined(MBEDTLS_ARCH_IS_ARMV8_A)
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#error "AES hardware acceleration not supported on this platform"
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#endif
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#endif /* MBEDTLS_AESCE_C && MBEDTLS_ARCH_IS_ARMV8_A && __ARM_NEON */
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#endif /* MBEDTLS_AESCE_H */
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@ -4665,6 +4665,63 @@ component_build_aes_aesce_armcc () {
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armc6_build_test "-O1 --target=aarch64-arm-none-eabi -march=armv8-a+crypto"
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}
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support_build_aes_armce() {
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# clang >= 4 is required to build with AES extensions
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ver="$(clang --version|grep version|sed -E 's#.*version ([0-9]+).*#\1#')"
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[ "${ver}" -ge 11 ]
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}
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component_build_aes_armce () {
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# Test variations of AES with Armv8 crypto extensions
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scripts/config.py set MBEDTLS_AESCE_C
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scripts/config.py set MBEDTLS_AES_USE_HARDWARE_ONLY
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msg "MBEDTLS_AES_USE_HARDWARE_ONLY, clang, aarch64"
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make -B library/aesce.o CC=clang CFLAGS="--target=aarch64-linux-gnu -march=armv8-a+crypto"
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msg "MBEDTLS_AES_USE_HARDWARE_ONLY, clang, arm"
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make -B library/aesce.o CC=clang CFLAGS="--target=arm-linux-gnueabihf -mcpu=cortex-a72+crypto -marm"
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msg "MBEDTLS_AES_USE_HARDWARE_ONLY, clang, thumb"
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make -B library/aesce.o CC=clang CFLAGS="--target=arm-linux-gnueabihf -mcpu=cortex-a32+crypto -mthumb"
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scripts/config.py unset MBEDTLS_AES_USE_HARDWARE_ONLY
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msg "no MBEDTLS_AES_USE_HARDWARE_ONLY, clang, aarch64"
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make -B library/aesce.o CC=clang CFLAGS="--target=aarch64-linux-gnu -march=armv8-a+crypto"
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msg "no MBEDTLS_AES_USE_HARDWARE_ONLY, clang, arm"
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make -B library/aesce.o CC=clang CFLAGS="--target=arm-linux-gnueabihf -mcpu=cortex-a72+crypto -marm"
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msg "no MBEDTLS_AES_USE_HARDWARE_ONLY, clang, thumb"
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make -B library/aesce.o CC=clang CFLAGS="--target=arm-linux-gnueabihf -mcpu=cortex-a32+crypto -mthumb"
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# test for presence of AES instructions
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scripts/config.py set MBEDTLS_AES_USE_HARDWARE_ONLY
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msg "clang, test A32 crypto instructions built"
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make -B library/aesce.o CC=clang CFLAGS="--target=arm-linux-gnueabihf -mcpu=cortex-a72+crypto -marm -S"
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grep -E 'aes[0-9a-z]+.[0-9]\s*[qv]' library/aesce.o
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msg "clang, test T32 crypto instructions built"
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make -B library/aesce.o CC=clang CFLAGS="--target=arm-linux-gnueabihf -mcpu=cortex-a32+crypto -mthumb -S"
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grep -E 'aes[0-9a-z]+.[0-9]\s*[qv]' library/aesce.o
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msg "clang, test aarch64 crypto instructions built"
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make -B library/aesce.o CC=clang CFLAGS="--target=aarch64-linux-gnu -march=armv8-a -S"
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grep -E 'aes[a-z]+\s*[qv]' library/aesce.o
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# test for absence of AES instructions
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scripts/config.py unset MBEDTLS_AES_USE_HARDWARE_ONLY
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scripts/config.py unset MBEDTLS_AESCE_C
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msg "clang, test A32 crypto instructions not built"
|
||||
make -B library/aesce.o CC=clang CFLAGS="--target=arm-linux-gnueabihf -mcpu=cortex-a72+crypto -marm -S"
|
||||
not grep -E 'aes[0-9a-z]+.[0-9]\s*[qv]' library/aesce.o
|
||||
msg "clang, test T32 crypto instructions not built"
|
||||
make -B library/aesce.o CC=clang CFLAGS="--target=arm-linux-gnueabihf -mcpu=cortex-a32+crypto -mthumb -S"
|
||||
not grep -E 'aes[0-9a-z]+.[0-9]\s*[qv]' library/aesce.o
|
||||
msg "clang, test aarch64 crypto instructions not built"
|
||||
make -B library/aesce.o CC=clang CFLAGS="--target=aarch64-linux-gnu -march=armv8-a -S"
|
||||
not grep -E 'aes[a-z]+\s*[qv]' library/aesce.o
|
||||
}
|
||||
|
||||
support_build_sha_armce() {
|
||||
if command -v clang > /dev/null ; then
|
||||
# clang >= 4 is required to build with SHA extensions
|
||||
|
|
@ -5438,6 +5495,9 @@ component_build_armcc () {
|
|||
# armc[56] don't support SHA-512 intrinsics
|
||||
scripts/config.py unset MBEDTLS_SHA512_USE_A64_CRYPTO_IF_PRESENT
|
||||
|
||||
# older versions of armcc/armclang don't support AESCE_C on 32-bit Arm
|
||||
scripts/config.py unset MBEDTLS_AESCE_C
|
||||
|
||||
# Stop armclang warning about feature detection for A64_CRYPTO.
|
||||
# With this enabled, the library does build correctly under armclang,
|
||||
# but in baremetal builds (as tested here), feature detection is
|
||||
|
|
@ -5470,14 +5530,18 @@ component_build_armcc () {
|
|||
# ARM Compiler 6 - Target ARMv8-M
|
||||
armc6_build_test "-O1 --target=arm-arm-none-eabi -march=armv8-m.main"
|
||||
|
||||
# ARM Compiler 6 - Target ARMv8.2-A - AArch64
|
||||
armc6_build_test "-O1 --target=aarch64-arm-none-eabi -march=armv8.2-a+crypto"
|
||||
|
||||
# ARM Compiler 6 - Target Cortex-M0 - no optimisation
|
||||
armc6_build_test "-O0 --target=arm-arm-none-eabi -mcpu=cortex-m0"
|
||||
|
||||
# ARM Compiler 6 - Target Cortex-M0
|
||||
armc6_build_test "-Os --target=arm-arm-none-eabi -mcpu=cortex-m0"
|
||||
|
||||
# ARM Compiler 6 - Target ARMv8.2-A - AArch64
|
||||
#
|
||||
# Re-enable MBEDTLS_AESCE_C as this should be supported by the version of armclang
|
||||
# that we have in our CI
|
||||
scripts/config.py set MBEDTLS_AESCE_C
|
||||
armc6_build_test "-O1 --target=aarch64-arm-none-eabi -march=armv8.2-a+crypto"
|
||||
}
|
||||
|
||||
support_build_armcc () {
|
||||
|
|
|
|||
Loading…
Reference in a new issue