bignum_mod_raw.py: Moved Classes outside of slots
This patch moves `BignumModRawOperation` and `BignumModRawOperationArchSplit` outside of the scaffolding merge slot. It also renames `r_sqrt` property to `r2`. Signed-off-by: Minos Galanakis <minos.galanakis@arm.com>
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1 changed files with 27 additions and 26 deletions
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@ -26,31 +26,6 @@ class BignumModRawTarget(test_data_generation.BaseTarget, metaclass=ABCMeta):
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"""Target for bignum mod_raw test case generation."""
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"""Target for bignum mod_raw test case generation."""
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target_basename = 'test_suite_bignum_mod_raw.generated'
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target_basename = 'test_suite_bignum_mod_raw.generated'
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# BEGIN MERGE SLOT 1
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# END MERGE SLOT 1
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# BEGIN MERGE SLOT 2
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# END MERGE SLOT 2
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# BEGIN MERGE SLOT 3
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# END MERGE SLOT 3
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# BEGIN MERGE SLOT 4
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# END MERGE SLOT 4
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# BEGIN MERGE SLOT 5
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# END MERGE SLOT 5
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# BEGIN MERGE SLOT 6
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# END MERGE SLOT 6
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# BEGIN MERGE SLOT 7
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class BignumModRawOperation(bignum_common.OperationCommon, BignumModRawTarget, metaclass=ABCMeta):
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class BignumModRawOperation(bignum_common.OperationCommon, BignumModRawTarget, metaclass=ABCMeta):
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#pylint: disable=abstract-method
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#pylint: disable=abstract-method
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"""Target for bignum mod_raw test case generation."""
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"""Target for bignum mod_raw test case generation."""
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@ -99,7 +74,7 @@ class BignumModRawOperation(bignum_common.OperationCommon, BignumModRawTarget, m
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return bignum_common.invmod(self.r, self.int_n)
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return bignum_common.invmod(self.r, self.int_n)
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@property
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@property
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def r_sqrt(self) -> int: # pylint: disable=invalid-name
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def r2(self) -> int: # pylint: disable=invalid-name
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return pow(self.r, 2)
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return pow(self.r, 2)
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class BignumModRawOperationArchSplit(BignumModRawOperation):
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class BignumModRawOperationArchSplit(BignumModRawOperation):
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@ -122,6 +97,32 @@ class BignumModRawOperationArchSplit(BignumModRawOperation):
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for a_value, b_value in cls.get_value_pairs():
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for a_value, b_value in cls.get_value_pairs():
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for bil in cls.limb_sizes:
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for bil in cls.limb_sizes:
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yield cls(a_value, b_value, bits_in_limb=bil).create_test_case()
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yield cls(a_value, b_value, bits_in_limb=bil).create_test_case()
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# BEGIN MERGE SLOT 1
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# END MERGE SLOT 1
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# BEGIN MERGE SLOT 2
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# END MERGE SLOT 2
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# BEGIN MERGE SLOT 3
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# END MERGE SLOT 3
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# BEGIN MERGE SLOT 4
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# END MERGE SLOT 4
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# BEGIN MERGE SLOT 5
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# END MERGE SLOT 5
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# BEGIN MERGE SLOT 6
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# END MERGE SLOT 6
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# BEGIN MERGE SLOT 7
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# END MERGE SLOT 7
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# END MERGE SLOT 7
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# BEGIN MERGE SLOT 8
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# BEGIN MERGE SLOT 8
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