Implemented LogicOp fix
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ab9cdab883
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2 changed files with 35 additions and 2 deletions
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@ -1204,7 +1204,19 @@ void RasterizerOpenGL::SyncLogicOpState() {
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}
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flags[Dirty::LogicOp] = false;
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const auto& regs = maxwell3d->regs;
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auto regs = maxwell3d->regs;
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if (device.IsAmd()) {
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auto IsFloat = [] (Tegra::Engines::Maxwell3D::Regs::VertexAttribute n) {
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return n.type == Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::Float;
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};
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bool has_float =
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std::any_of(regs.vertex_attrib_format.begin(), regs.vertex_attrib_format.end(),
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IsFloat);
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regs.logic_op.enable = static_cast<u32>(!has_float);
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}
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if (regs.logic_op.enable) {
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glEnable(GL_COLOR_LOGIC_OP);
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glLogicOp(MaxwellToGL::LogicOp(regs.logic_op.op));
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@ -952,7 +952,28 @@ void RasterizerVulkan::UpdateDynamicStates() {
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UpdateDepthBiasEnable(regs);
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}
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if (device.IsExtExtendedDynamicState3EnablesSupported()) {
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const auto old = regs.logic_op.enable;
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if (device.GetDriverID() == VkDriverIdKHR::VK_DRIVER_ID_AMD_OPEN_SOURCE ||
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device.GetDriverID() == VkDriverIdKHR::VK_DRIVER_ID_AMD_OPEN_SOURCE_KHR) {
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struct In {
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const Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type d;
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In(Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type n) : d(n) {}
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bool operator()(Tegra::Engines::Maxwell3D::Regs::VertexAttribute n) const {
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return n.type == d;
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}
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};
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auto has_float = std::any_of(
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regs.vertex_attrib_format.begin(), regs.vertex_attrib_format.end(),
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In(Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::Float));
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regs.logic_op.enable = static_cast<u32>(!has_float);
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UpdateLogicOpEnable(regs);
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regs.logic_op.enable = old;
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} else {
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UpdateLogicOpEnable(regs);
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}
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UpdateDepthClampEnable(regs);
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}
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}
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