Implemented LogicOp fix

This commit is contained in:
Jarrod Norwell 2024-05-31 09:53:22 +02:00 committed by spectranator
parent ab9cdab883
commit 009aa57f4a
2 changed files with 35 additions and 2 deletions

View file

@ -1204,7 +1204,19 @@ void RasterizerOpenGL::SyncLogicOpState() {
}
flags[Dirty::LogicOp] = false;
const auto& regs = maxwell3d->regs;
auto regs = maxwell3d->regs;
if (device.IsAmd()) {
auto IsFloat = [] (Tegra::Engines::Maxwell3D::Regs::VertexAttribute n) {
return n.type == Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::Float;
};
bool has_float =
std::any_of(regs.vertex_attrib_format.begin(), regs.vertex_attrib_format.end(),
IsFloat);
regs.logic_op.enable = static_cast<u32>(!has_float);
}
if (regs.logic_op.enable) {
glEnable(GL_COLOR_LOGIC_OP);
glLogicOp(MaxwellToGL::LogicOp(regs.logic_op.op));

View file

@ -952,7 +952,28 @@ void RasterizerVulkan::UpdateDynamicStates() {
UpdateDepthBiasEnable(regs);
}
if (device.IsExtExtendedDynamicState3EnablesSupported()) {
const auto old = regs.logic_op.enable;
if (device.GetDriverID() == VkDriverIdKHR::VK_DRIVER_ID_AMD_OPEN_SOURCE ||
device.GetDriverID() == VkDriverIdKHR::VK_DRIVER_ID_AMD_OPEN_SOURCE_KHR) {
struct In {
const Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type d;
In(Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type n) : d(n) {}
bool operator()(Tegra::Engines::Maxwell3D::Regs::VertexAttribute n) const {
return n.type == d;
}
};
auto has_float = std::any_of(
regs.vertex_attrib_format.begin(), regs.vertex_attrib_format.end(),
In(Tegra::Engines::Maxwell3D::Regs::VertexAttribute::Type::Float));
regs.logic_op.enable = static_cast<u32>(!has_float);
UpdateLogicOpEnable(regs);
regs.logic_op.enable = old;
} else {
UpdateLogicOpEnable(regs);
}
UpdateDepthClampEnable(regs);
}
}