285 lines
9.1 KiB
C++
285 lines
9.1 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "common/assert.h"
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#include "ir_emitter.h"
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namespace Dynarmic {
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namespace Arm {
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void IREmitter::Unimplemented() {
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}
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u32 IREmitter::PC() {
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u32 offset = current_location.TFlag() ? 4 : 8;
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return current_location.PC() + offset;
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}
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u32 IREmitter::AlignPC(size_t alignment) {
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u32 pc = PC();
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return static_cast<u32>(pc - pc % alignment);
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}
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IR::Value IREmitter::Imm1(bool imm1) {
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return IR::Value(imm1);
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}
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IR::Value IREmitter::Imm8(u8 imm8) {
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return IR::Value(imm8);
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}
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IR::Value IREmitter::Imm32(u32 imm32) {
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return IR::Value(imm32);
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}
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IR::Value IREmitter::GetRegister(Reg reg) {
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if (reg == Reg::PC) {
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return Imm32(PC());
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}
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return Inst(IR::Opcode::GetRegister, { IR::Value(reg) });
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}
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void IREmitter::SetRegister(const Reg reg, const IR::Value& value) {
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ASSERT(reg != Reg::PC);
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Inst(IR::Opcode::SetRegister, { IR::Value(reg), value });
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}
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void IREmitter::ALUWritePC(const IR::Value& value) {
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// This behaviour is ARM version-dependent.
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// The below implementation is for ARMv6k
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BranchWritePC(value);
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}
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void IREmitter::BranchWritePC(const IR::Value& value) {
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if (!current_location.TFlag()) {
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auto new_pc = And(value, Imm32(0xFFFFFFFC));
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Inst(IR::Opcode::SetRegister, { IR::Value(Reg::PC), new_pc });
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} else {
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auto new_pc = And(value, Imm32(0xFFFFFFFE));
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Inst(IR::Opcode::SetRegister, { IR::Value(Reg::PC), new_pc });
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}
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}
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void IREmitter::BXWritePC(const IR::Value& value) {
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Inst(IR::Opcode::BXWritePC, {value});
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}
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void IREmitter::LoadWritePC(const IR::Value& value) {
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// This behaviour is ARM version-dependent.
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// The below implementation is for ARMv6k
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BXWritePC(value);
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}
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void IREmitter::CallSupervisor(const IR::Value& value) {
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Inst(IR::Opcode::CallSupervisor, {value});
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}
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IR::Value IREmitter::GetCFlag() {
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return Inst(IR::Opcode::GetCFlag, {});
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}
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void IREmitter::SetNFlag(const IR::Value& value) {
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Inst(IR::Opcode::SetNFlag, {value});
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}
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void IREmitter::SetZFlag(const IR::Value& value) {
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Inst(IR::Opcode::SetZFlag, {value});
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}
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void IREmitter::SetCFlag(const IR::Value& value) {
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Inst(IR::Opcode::SetCFlag, {value});
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}
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void IREmitter::SetVFlag(const IR::Value& value) {
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Inst(IR::Opcode::SetVFlag, {value});
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}
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IR::Value IREmitter::LeastSignificantHalf(const IR::Value& value) {
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return Inst(IR::Opcode::LeastSignificantHalf, {value});
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}
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IR::Value IREmitter::LeastSignificantByte(const IR::Value& value) {
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return Inst(IR::Opcode::LeastSignificantByte, {value});
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}
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IR::Value IREmitter::MostSignificantBit(const IR::Value& value) {
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return Inst(IR::Opcode::MostSignificantBit, {value});
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}
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IR::Value IREmitter::IsZero(const IR::Value& value) {
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return Inst(IR::Opcode::IsZero, {value});
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}
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IREmitter::ResultAndCarry IREmitter::LogicalShiftLeft(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in) {
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auto result = Inst(IR::Opcode::LogicalShiftLeft, {value_in, shift_amount, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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return {result, carry_out};
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}
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IREmitter::ResultAndCarry IREmitter::LogicalShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in) {
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auto result = Inst(IR::Opcode::LogicalShiftRight, {value_in, shift_amount, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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return {result, carry_out};
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}
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IREmitter::ResultAndCarry IREmitter::ArithmeticShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in) {
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auto result = Inst(IR::Opcode::ArithmeticShiftRight, {value_in, shift_amount, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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return {result, carry_out};
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}
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IREmitter::ResultAndCarry IREmitter::RotateRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in) {
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auto result = Inst(IR::Opcode::RotateRight, {value_in, shift_amount, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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return {result, carry_out};
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}
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IREmitter::ResultAndCarry IREmitter::RotateRightExtended(const IR::Value& value_in, const IR::Value& carry_in) {
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auto result = Inst(IR::Opcode::RotateRightExtended, {value_in, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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return {result, carry_out};
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}
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IREmitter::ResultAndCarryAndOverflow IREmitter::AddWithCarry(const IR::Value& a, const IR::Value& b, const IR::Value& carry_in) {
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auto result = Inst(IR::Opcode::AddWithCarry, {a, b, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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auto overflow = Inst(IR::Opcode::GetOverflowFromOp, {result});
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return {result, carry_out, overflow};
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}
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IR::Value IREmitter::Add(const IR::Value& a, const IR::Value& b) {
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return Inst(IR::Opcode::AddWithCarry, {a, b, Imm1(0)});
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}
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IREmitter::ResultAndCarryAndOverflow IREmitter::SubWithCarry(const IR::Value& a, const IR::Value& b, const IR::Value& carry_in) {
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// This is equivalent to AddWithCarry(a, Not(b), carry_in).
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auto result = Inst(IR::Opcode::SubWithCarry, {a, b, carry_in});
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auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});
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auto overflow = Inst(IR::Opcode::GetOverflowFromOp, {result});
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return {result, carry_out, overflow};
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}
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IR::Value IREmitter::Sub(const IR::Value& a, const IR::Value& b) {
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return Inst(IR::Opcode::SubWithCarry, {a, b, Imm1(1)});
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}
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IR::Value IREmitter::And(const IR::Value& a, const IR::Value& b) {
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return Inst(IR::Opcode::And, {a, b});
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}
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IR::Value IREmitter::Eor(const IR::Value& a, const IR::Value& b) {
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return Inst(IR::Opcode::Eor, {a, b});
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}
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IR::Value IREmitter::Or(const IR::Value& a, const IR::Value& b) {
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return Inst(IR::Opcode::Or, {a, b});
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}
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IR::Value IREmitter::Not(const IR::Value& a) {
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return Inst(IR::Opcode::Not, {a});
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}
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IR::Value IREmitter::SignExtendHalfToWord(const IR::Value& a) {
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return Inst(IR::Opcode::SignExtendHalfToWord, {a});
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}
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IR::Value IREmitter::SignExtendByteToWord(const IR::Value& a) {
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return Inst(IR::Opcode::SignExtendByteToWord, {a});
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}
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IR::Value IREmitter::ZeroExtendHalfToWord(const IR::Value& a) {
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return Inst(IR::Opcode::ZeroExtendHalfToWord, {a});
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}
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IR::Value IREmitter::ZeroExtendByteToWord(const IR::Value& a) {
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return Inst(IR::Opcode::ZeroExtendByteToWord, {a});
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}
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IR::Value IREmitter::ByteReverseWord(const IR::Value& a) {
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return Inst(IR::Opcode::ByteReverseWord, {a});
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}
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IR::Value IREmitter::ByteReverseHalf(const IR::Value& a) {
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return Inst(IR::Opcode::ByteReverseHalf, {a});
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}
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IR::Value IREmitter::ByteReverseDual(const IR::Value& a) {
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return Inst(IR::Opcode::ByteReverseDual, {a});
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}
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IR::Value IREmitter::ReadMemory8(const IR::Value& vaddr) {
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return Inst(IR::Opcode::ReadMemory8, {vaddr});
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}
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IR::Value IREmitter::ReadMemory16(const IR::Value& vaddr) {
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auto value = Inst(IR::Opcode::ReadMemory16, {vaddr});
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return current_location.EFlag() ? ByteReverseHalf(value) : value;
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}
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IR::Value IREmitter::ReadMemory32(const IR::Value& vaddr) {
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auto value = Inst(IR::Opcode::ReadMemory32, {vaddr});
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return current_location.EFlag() ? ByteReverseWord(value) : value;
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}
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IR::Value IREmitter::ReadMemory64(const IR::Value& vaddr) {
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auto value = Inst(IR::Opcode::ReadMemory64, {vaddr});
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return current_location.EFlag() ? ByteReverseDual(value) : value;
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}
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void IREmitter::WriteMemory8(const IR::Value& vaddr, const IR::Value& value) {
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Inst(IR::Opcode::WriteMemory8, {vaddr, value});
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}
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void IREmitter::WriteMemory16(const IR::Value& vaddr, const IR::Value& value) {
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if (current_location.EFlag()) {
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auto v = ByteReverseHalf(value);
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Inst(IR::Opcode::WriteMemory16, {vaddr, v});
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} else {
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Inst(IR::Opcode::WriteMemory16, {vaddr, value});
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}
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}
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void IREmitter::WriteMemory32(const IR::Value& vaddr, const IR::Value& value) {
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if (current_location.EFlag()) {
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auto v = ByteReverseWord(value);
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Inst(IR::Opcode::WriteMemory32, {vaddr, v});
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} else {
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Inst(IR::Opcode::WriteMemory32, {vaddr, value});
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}
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}
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void IREmitter::WriteMemory64(const IR::Value& vaddr, const IR::Value& value) {
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if (current_location.EFlag()) {
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auto v = ByteReverseDual(value);
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Inst(IR::Opcode::WriteMemory64, {vaddr, v});
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} else {
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Inst(IR::Opcode::WriteMemory64, {vaddr, value});
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}
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}
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void IREmitter::SetTerm(const IR::Terminal& terminal) {
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ASSERT_MSG(block.terminal.which() == 0, "Terminal has already been set.");
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block.terminal = terminal;
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}
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IR::Value IREmitter::Inst(IR::Opcode op, std::initializer_list<IR::Value> args) {
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IR::Inst* inst = new(block.instruction_alloc_pool->malloc()) IR::Inst(op);
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DEBUG_ASSERT(args.size() == inst->NumArgs());
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std::for_each(args.begin(), args.end(), [&inst, op, index = size_t(0)](const auto& v) mutable {
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DEBUG_ASSERT(IR::GetArgTypeOf(op, index) == v.GetType());
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inst->SetArg(index, v);
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index++;
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});
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block.instructions.push_back(*inst);
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return IR::Value(inst);
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}
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} // namespace Arm
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} // namespace Dynarmic
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