cbeed6396f
Merge commit '6fa8d51479e9a5542c67bec715a1f68e7ed057ba'
1447 lines
38 KiB
C
1447 lines
38 KiB
C
/***************************************************************************************************
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Zyan Disassembler Library (Zydis)
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Original Author : Florian Bernd
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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***************************************************************************************************/
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/**
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* @file
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* Defines the basic `ZydisDecodedInstruction` and `ZydisDecodedOperand` structs.
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*/
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#ifndef ZYDIS_INSTRUCTIONINFO_H
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#define ZYDIS_INSTRUCTIONINFO_H
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#include <Zycore/Types.h>
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#include <Zydis/MetaInfo.h>
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#include <Zydis/Mnemonic.h>
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#include <Zydis/Register.h>
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#include <Zydis/SharedTypes.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* ============================================================================================== */
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/* Decoded operand */
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/* ============================================================================================== */
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/* ---------------------------------------------------------------------------------------------- */
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/* Operand attributes */
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/* ---------------------------------------------------------------------------------------------- */
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/**
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* Defines the `ZydisOperandAttributes` data-type.
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*/
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typedef ZyanU8 ZydisOperandAttributes;
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/**
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* The operand is a `MULTISOURCE4` register operand.
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*
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* This is a special register operand-type used by `4FMAPS` instructions where the given register
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* points to the first register of a register range (4 registers in total).
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*
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* Example: ZMM3 -> [ZMM3..ZMM6]
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*/
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#define ZYDIS_OATTRIB_IS_MULTISOURCE4 0x01 // (1 << 0)
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/* ---------------------------------------------------------------------------------------------- */
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/* Memory type */
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/* ---------------------------------------------------------------------------------------------- */
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/**
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* Defines the `ZydisMemoryOperandType` enum.
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*/
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typedef enum ZydisMemoryOperandType_
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{
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ZYDIS_MEMOP_TYPE_INVALID,
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/**
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* Normal memory operand.
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*/
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ZYDIS_MEMOP_TYPE_MEM,
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/**
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* The memory operand is only used for address-generation. No real memory-access is
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* caused.
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*/
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ZYDIS_MEMOP_TYPE_AGEN,
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/**
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* A memory operand using `SIB` addressing form, where the index register is not used
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* in address calculation and scale is ignored. No real memory-access is caused.
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*/
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ZYDIS_MEMOP_TYPE_MIB,
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/**
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* A vector `SIB` memory addressing operand (`VSIB`).
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*/
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ZYDIS_MEMOP_TYPE_VSIB,
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/**
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* Maximum value of this enum.
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*/
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ZYDIS_MEMOP_TYPE_MAX_VALUE = ZYDIS_MEMOP_TYPE_VSIB,
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/**
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* The minimum number of bits required to represent all values of this enum.
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*/
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ZYDIS_MEMOP_TYPE_REQUIRED_BITS = ZYAN_BITS_TO_REPRESENT(ZYDIS_MEMOP_TYPE_MAX_VALUE)
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} ZydisMemoryOperandType;
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/* ---------------------------------------------------------------------------------------------- */
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/* Decoded operand */
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/* ---------------------------------------------------------------------------------------------- */
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/**
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* Extended info for register-operands.
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*/
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typedef struct ZydisDecodedOperandReg_
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{
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/**
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* The register value.
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*/
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ZydisRegister value;
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} ZydisDecodedOperandReg;
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/**
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* Extended info for memory-operands.
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*/
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typedef struct ZydisDecodedOperandMem_
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{
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/**
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* The type of the memory operand.
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*/
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ZydisMemoryOperandType type;
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/**
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* The segment register.
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*/
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ZydisRegister segment;
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/**
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* The base register.
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*/
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ZydisRegister base;
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/**
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* The index register.
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*/
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ZydisRegister index;
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/**
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* The scale factor.
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*/
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ZyanU8 scale;
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/**
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* Extended info for memory-operands with displacement.
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*/
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struct ZydisDecodedOperandMemDisp_
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{
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/**
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* Signals, if the displacement value is used.
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*/
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ZyanBool has_displacement;
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/**
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* The displacement value
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*/
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ZyanI64 value;
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} disp;
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} ZydisDecodedOperandMem;
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/**
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* Extended info for pointer-operands.
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*/
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typedef struct ZydisDecodedOperandPtr_
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{
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ZyanU16 segment;
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ZyanU32 offset;
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} ZydisDecodedOperandPtr;
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/**
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* Extended info for immediate-operands.
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*/
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typedef struct ZydisDecodedOperandImm_
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{
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/**
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* Signals, if the immediate value is signed.
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*/
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ZyanBool is_signed;
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/**
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* Signals, if the immediate value contains a relative offset. You can use
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* `ZydisCalcAbsoluteAddress` to determine the absolute address value.
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*/
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ZyanBool is_relative;
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/**
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* The immediate value.
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*/
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union ZydisDecodedOperandImmValue_
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{
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ZyanU64 u;
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ZyanI64 s;
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} value;
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} ZydisDecodedOperandImm;
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/**
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* Defines the `ZydisDecodedOperand` struct.
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*/
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typedef struct ZydisDecodedOperand_
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{
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/**
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* The operand-id.
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*/
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ZyanU8 id;
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/**
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* The visibility of the operand.
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*/
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ZydisOperandVisibility visibility;
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/**
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* The operand-actions.
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*/
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ZydisOperandActions actions;
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/**
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* The operand-encoding.
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*/
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ZydisOperandEncoding encoding;
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/**
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* The logical size of the operand (in bits).
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*/
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ZyanU16 size;
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/**
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* The element-type.
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*/
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ZydisElementType element_type;
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/**
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* The size of a single element.
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*/
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ZydisElementSize element_size;
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/**
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* The number of elements.
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*/
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ZyanU16 element_count;
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/*
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* Additional operand attributes.
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*/
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ZydisOperandAttributes attributes;
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/**
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* The type of the operand.
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*/
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ZydisOperandType type;
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/*
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* Operand type specific information.
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*
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* The enabled union variant is determined by the `type` field.
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*/
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union
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{
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ZydisDecodedOperandReg reg;
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ZydisDecodedOperandMem mem;
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ZydisDecodedOperandPtr ptr;
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ZydisDecodedOperandImm imm;
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};
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} ZydisDecodedOperand;
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/* ---------------------------------------------------------------------------------------------- */
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/* ============================================================================================== */
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/* Decoded instruction */
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/* ============================================================================================== */
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/* ---------------------------------------------------------------------------------------------- */
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/* CPU/FPU flags */
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/* ---------------------------------------------------------------------------------------------- */
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/**
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* Defines the `ZydisAccessedFlagsMask` data-type.
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*/
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typedef ZyanU32 ZydisAccessedFlagsMask;
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/**
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* @defgroup decoder_cpu_flags CPU flags
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* @ingroup decoder
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*
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* Constants used for testing CPU flags accessed by an instruction.
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*
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* @{
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*/
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/**
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* Carry flag.
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*/
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#define ZYDIS_CPUFLAG_CF (1ul << 0)
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/**
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* Parity flag.
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*/
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#define ZYDIS_CPUFLAG_PF (1ul << 2)
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/**
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* Adjust flag.
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*/
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#define ZYDIS_CPUFLAG_AF (1ul << 4)
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/**
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* Zero flag.
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*/
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#define ZYDIS_CPUFLAG_ZF (1ul << 6)
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/**
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* Sign flag.
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*/
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#define ZYDIS_CPUFLAG_SF (1ul << 7)
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/**
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* Trap flag.
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*/
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#define ZYDIS_CPUFLAG_TF (1ul << 8)
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/**
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* Interrupt enable flag.
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*/
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#define ZYDIS_CPUFLAG_IF (1ul << 9)
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/**
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* Direction flag.
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*/
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#define ZYDIS_CPUFLAG_DF (1ul << 10)
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/**
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* Overflow flag.
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*/
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#define ZYDIS_CPUFLAG_OF (1ul << 11)
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/**
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* I/O privilege level flag.
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*/
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#define ZYDIS_CPUFLAG_IOPL (1ul << 12)
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/**
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* Nested task flag.
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*/
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#define ZYDIS_CPUFLAG_NT (1ul << 14)
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/**
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* Resume flag.
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*/
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#define ZYDIS_CPUFLAG_RF (1ul << 16)
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/**
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* Virtual 8086 mode flag.
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*/
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#define ZYDIS_CPUFLAG_VM (1ul << 17)
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/**
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* Alignment check.
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*/
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#define ZYDIS_CPUFLAG_AC (1ul << 18)
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/**
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* Virtual interrupt flag.
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*/
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#define ZYDIS_CPUFLAG_VIF (1ul << 19)
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/**
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* Virtual interrupt pending.
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*/
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#define ZYDIS_CPUFLAG_VIP (1ul << 20)
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/**
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* Able to use CPUID instruction.
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*/
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#define ZYDIS_CPUFLAG_ID (1ul << 21)
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/**
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* @}
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*/
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/**
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* @defgroup decoder_fpu_flags FPU flags
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* @ingroup decoder
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*
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* Constants used for testing FPU flags accessed by an instruction.
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*
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* @{
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*/
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/**
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* FPU condition-code flag 0.
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*/
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#define ZYDIS_FPUFLAG_C0 (1ul << 0)
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/**
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* FPU condition-code flag 1.
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*/
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#define ZYDIS_FPUFLAG_C1 (1ul << 1)
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/**
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* FPU condition-code flag 2.
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*/
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#define ZYDIS_FPUFLAG_C2 (1ul << 2)
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/**
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* FPU condition-code flag 3.
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*/
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#define ZYDIS_FPUFLAG_C3 (1ul << 3)
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/**
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* @}
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*/
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/*
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* Information about CPU/FPU flags accessed by the instruction.
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*/
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typedef struct ZydisAccessedFlags_
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{
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/*
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* As mask containing the flags `TESTED` by the instruction.
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*/
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ZydisAccessedFlagsMask tested;
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/*
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* As mask containing the flags `MODIFIED` by the instruction.
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*/
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ZydisAccessedFlagsMask modified;
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/*
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* As mask containing the flags `SET_0` by the instruction.
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*/
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ZydisAccessedFlagsMask set_0;
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/*
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* As mask containing the flags `SET_1` by the instruction.
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*/
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ZydisAccessedFlagsMask set_1;
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/*
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* As mask containing the flags `UNDEFINED` by the instruction.
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*/
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ZydisAccessedFlagsMask undefined;
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} ZydisAccessedFlags;
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/* ---------------------------------------------------------------------------------------------- */
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/* Branch types */
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/* ---------------------------------------------------------------------------------------------- */
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/**
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* Defines the `ZydisBranchType` enum.
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*/
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typedef enum ZydisBranchType_
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{
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/**
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* The instruction is not a branch instruction.
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*/
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ZYDIS_BRANCH_TYPE_NONE,
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/**
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* The instruction is a short (8-bit) branch instruction.
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*/
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ZYDIS_BRANCH_TYPE_SHORT,
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/**
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* The instruction is a near (16-bit or 32-bit) branch instruction.
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*/
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ZYDIS_BRANCH_TYPE_NEAR,
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/**
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* The instruction is a far (inter-segment) branch instruction.
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*/
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ZYDIS_BRANCH_TYPE_FAR,
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/**
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* Maximum value of this enum.
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*/
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ZYDIS_BRANCH_TYPE_MAX_VALUE = ZYDIS_BRANCH_TYPE_FAR,
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/**
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* The minimum number of bits required to represent all values of this enum.
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*/
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ZYDIS_BRANCH_TYPE_REQUIRED_BITS = ZYAN_BITS_TO_REPRESENT(ZYDIS_BRANCH_TYPE_MAX_VALUE)
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} ZydisBranchType;
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/* ---------------------------------------------------------------------------------------------- */
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/* SSE/AVX exception-class */
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/* ---------------------------------------------------------------------------------------------- */
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/**
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* Defines the `ZydisExceptionClass` enum.
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*/
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typedef enum ZydisExceptionClass_
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{
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ZYDIS_EXCEPTION_CLASS_NONE,
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// TODO: FP Exceptions
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ZYDIS_EXCEPTION_CLASS_SSE1,
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ZYDIS_EXCEPTION_CLASS_SSE2,
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ZYDIS_EXCEPTION_CLASS_SSE3,
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ZYDIS_EXCEPTION_CLASS_SSE4,
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ZYDIS_EXCEPTION_CLASS_SSE5,
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ZYDIS_EXCEPTION_CLASS_SSE7,
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ZYDIS_EXCEPTION_CLASS_AVX1,
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ZYDIS_EXCEPTION_CLASS_AVX2,
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ZYDIS_EXCEPTION_CLASS_AVX3,
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ZYDIS_EXCEPTION_CLASS_AVX4,
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ZYDIS_EXCEPTION_CLASS_AVX5,
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ZYDIS_EXCEPTION_CLASS_AVX6,
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ZYDIS_EXCEPTION_CLASS_AVX7,
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ZYDIS_EXCEPTION_CLASS_AVX8,
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ZYDIS_EXCEPTION_CLASS_AVX11,
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ZYDIS_EXCEPTION_CLASS_AVX12,
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ZYDIS_EXCEPTION_CLASS_E1,
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ZYDIS_EXCEPTION_CLASS_E1NF,
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ZYDIS_EXCEPTION_CLASS_E2,
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ZYDIS_EXCEPTION_CLASS_E2NF,
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ZYDIS_EXCEPTION_CLASS_E3,
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ZYDIS_EXCEPTION_CLASS_E3NF,
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ZYDIS_EXCEPTION_CLASS_E4,
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ZYDIS_EXCEPTION_CLASS_E4NF,
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ZYDIS_EXCEPTION_CLASS_E5,
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ZYDIS_EXCEPTION_CLASS_E5NF,
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ZYDIS_EXCEPTION_CLASS_E6,
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ZYDIS_EXCEPTION_CLASS_E6NF,
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ZYDIS_EXCEPTION_CLASS_E7NM,
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ZYDIS_EXCEPTION_CLASS_E7NM128,
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ZYDIS_EXCEPTION_CLASS_E9NF,
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ZYDIS_EXCEPTION_CLASS_E10,
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ZYDIS_EXCEPTION_CLASS_E10NF,
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ZYDIS_EXCEPTION_CLASS_E11,
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ZYDIS_EXCEPTION_CLASS_E11NF,
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ZYDIS_EXCEPTION_CLASS_E12,
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ZYDIS_EXCEPTION_CLASS_E12NP,
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ZYDIS_EXCEPTION_CLASS_K20,
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ZYDIS_EXCEPTION_CLASS_K21,
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ZYDIS_EXCEPTION_CLASS_AMXE1,
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ZYDIS_EXCEPTION_CLASS_AMXE2,
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ZYDIS_EXCEPTION_CLASS_AMXE3,
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ZYDIS_EXCEPTION_CLASS_AMXE4,
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ZYDIS_EXCEPTION_CLASS_AMXE5,
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ZYDIS_EXCEPTION_CLASS_AMXE6,
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/**
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* Maximum value of this enum.
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*/
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ZYDIS_EXCEPTION_CLASS_MAX_VALUE = ZYDIS_EXCEPTION_CLASS_AMXE6,
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/**
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* The minimum number of bits required to represent all values of this enum.
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*/
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ZYDIS_EXCEPTION_CLASS_REQUIRED_BITS = ZYAN_BITS_TO_REPRESENT(ZYDIS_EXCEPTION_CLASS_MAX_VALUE)
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} ZydisExceptionClass;
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/* ---------------------------------------------------------------------------------------------- */
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/* AVX mask mode */
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/* ---------------------------------------------------------------------------------------------- */
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/**
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* Defines the `ZydisMaskMode` enum.
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*/
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typedef enum ZydisMaskMode_
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{
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ZYDIS_MASK_MODE_INVALID,
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/**
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* Masking is disabled for the current instruction (`K0` register is used).
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*/
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ZYDIS_MASK_MODE_DISABLED,
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/**
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* The embedded mask register is used as a merge-mask.
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*/
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ZYDIS_MASK_MODE_MERGING,
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/**
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* The embedded mask register is used as a zero-mask.
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*/
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ZYDIS_MASK_MODE_ZEROING,
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/**
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* The embedded mask register is used as a control-mask (element selector).
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*/
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ZYDIS_MASK_MODE_CONTROL,
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/**
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* The embedded mask register is used as a zeroing control-mask (element selector).
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*/
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ZYDIS_MASK_MODE_CONTROL_ZEROING,
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/**
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* Maximum value of this enum.
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*/
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ZYDIS_MASK_MODE_MAX_VALUE = ZYDIS_MASK_MODE_CONTROL_ZEROING,
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/**
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* The minimum number of bits required to represent all values of this enum.
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*/
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ZYDIS_MASK_MODE_REQUIRED_BITS = ZYAN_BITS_TO_REPRESENT(ZYDIS_MASK_MODE_MAX_VALUE)
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} ZydisMaskMode;
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/* ---------------------------------------------------------------------------------------------- */
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/* AVX broadcast-mode */
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/* ---------------------------------------------------------------------------------------------- */
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/**
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* Defines the `ZydisBroadcastMode` enum.
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*/
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typedef enum ZydisBroadcastMode_
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{
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ZYDIS_BROADCAST_MODE_INVALID,
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ZYDIS_BROADCAST_MODE_1_TO_2,
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ZYDIS_BROADCAST_MODE_1_TO_4,
|
|
ZYDIS_BROADCAST_MODE_1_TO_8,
|
|
ZYDIS_BROADCAST_MODE_1_TO_16,
|
|
ZYDIS_BROADCAST_MODE_1_TO_32,
|
|
ZYDIS_BROADCAST_MODE_1_TO_64,
|
|
ZYDIS_BROADCAST_MODE_2_TO_4,
|
|
ZYDIS_BROADCAST_MODE_2_TO_8,
|
|
ZYDIS_BROADCAST_MODE_2_TO_16,
|
|
ZYDIS_BROADCAST_MODE_4_TO_8,
|
|
ZYDIS_BROADCAST_MODE_4_TO_16,
|
|
ZYDIS_BROADCAST_MODE_8_TO_16,
|
|
|
|
/**
|
|
* Maximum value of this enum.
|
|
*/
|
|
ZYDIS_BROADCAST_MODE_MAX_VALUE = ZYDIS_BROADCAST_MODE_8_TO_16,
|
|
/**
|
|
* The minimum number of bits required to represent all values of this enum.
|
|
*/
|
|
ZYDIS_BROADCAST_MODE_REQUIRED_BITS = ZYAN_BITS_TO_REPRESENT(ZYDIS_BROADCAST_MODE_MAX_VALUE)
|
|
} ZydisBroadcastMode;
|
|
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
/* AVX rounding-mode */
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
|
|
/**
|
|
* Defines the `ZydisRoundingMode` enum.
|
|
*/
|
|
typedef enum ZydisRoundingMode_
|
|
{
|
|
ZYDIS_ROUNDING_MODE_INVALID,
|
|
/**
|
|
* Round to nearest.
|
|
*/
|
|
ZYDIS_ROUNDING_MODE_RN,
|
|
/**
|
|
* Round down.
|
|
*/
|
|
ZYDIS_ROUNDING_MODE_RD,
|
|
/**
|
|
* Round up.
|
|
*/
|
|
ZYDIS_ROUNDING_MODE_RU,
|
|
/**
|
|
* Round towards zero.
|
|
*/
|
|
ZYDIS_ROUNDING_MODE_RZ,
|
|
|
|
/**
|
|
* Maximum value of this enum.
|
|
*/
|
|
ZYDIS_ROUNDING_MODE_MAX_VALUE = ZYDIS_ROUNDING_MODE_RZ,
|
|
/**
|
|
* The minimum number of bits required to represent all values of this enum.
|
|
*/
|
|
ZYDIS_ROUNDING_MODE_REQUIRED_BITS = ZYAN_BITS_TO_REPRESENT(ZYDIS_ROUNDING_MODE_MAX_VALUE)
|
|
} ZydisRoundingMode;
|
|
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
/* KNC swizzle-mode */
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
|
|
/**
|
|
* Defines the `ZydisSwizzleMode` enum.
|
|
*/
|
|
typedef enum ZydisSwizzleMode_
|
|
{
|
|
ZYDIS_SWIZZLE_MODE_INVALID,
|
|
ZYDIS_SWIZZLE_MODE_DCBA,
|
|
ZYDIS_SWIZZLE_MODE_CDAB,
|
|
ZYDIS_SWIZZLE_MODE_BADC,
|
|
ZYDIS_SWIZZLE_MODE_DACB,
|
|
ZYDIS_SWIZZLE_MODE_AAAA,
|
|
ZYDIS_SWIZZLE_MODE_BBBB,
|
|
ZYDIS_SWIZZLE_MODE_CCCC,
|
|
ZYDIS_SWIZZLE_MODE_DDDD,
|
|
|
|
/**
|
|
* Maximum value of this enum.
|
|
*/
|
|
ZYDIS_SWIZZLE_MODE_MAX_VALUE = ZYDIS_SWIZZLE_MODE_DDDD,
|
|
/**
|
|
* The minimum number of bits required to represent all values of this enum.
|
|
*/
|
|
ZYDIS_SWIZZLE_MODE_REQUIRED_BITS = ZYAN_BITS_TO_REPRESENT(ZYDIS_SWIZZLE_MODE_MAX_VALUE)
|
|
} ZydisSwizzleMode;
|
|
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
/* KNC conversion-mode */
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
|
|
/**
|
|
* Defines the `ZydisConversionMode` enum.
|
|
*/
|
|
typedef enum ZydisConversionMode_
|
|
{
|
|
ZYDIS_CONVERSION_MODE_INVALID,
|
|
ZYDIS_CONVERSION_MODE_FLOAT16,
|
|
ZYDIS_CONVERSION_MODE_SINT8,
|
|
ZYDIS_CONVERSION_MODE_UINT8,
|
|
ZYDIS_CONVERSION_MODE_SINT16,
|
|
ZYDIS_CONVERSION_MODE_UINT16,
|
|
|
|
/**
|
|
* Maximum value of this enum.
|
|
*/
|
|
ZYDIS_CONVERSION_MODE_MAX_VALUE = ZYDIS_CONVERSION_MODE_UINT16,
|
|
/**
|
|
* The minimum number of bits required to represent all values of this enum.
|
|
*/
|
|
ZYDIS_CONVERSION_MODE_REQUIRED_BITS = ZYAN_BITS_TO_REPRESENT(ZYDIS_CONVERSION_MODE_MAX_VALUE)
|
|
} ZydisConversionMode;
|
|
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
/* Legacy prefix type */
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
|
|
/**
|
|
* Defines the `ZydisPrefixType` enum.
|
|
*/
|
|
typedef enum ZydisPrefixType_
|
|
{
|
|
/**
|
|
* The prefix is ignored by the instruction.
|
|
*
|
|
* This applies to all prefixes that are not accepted by the instruction in general or the
|
|
* ones that are overwritten by a prefix of the same group closer to the instruction opcode.
|
|
*/
|
|
ZYDIS_PREFIX_TYPE_IGNORED,
|
|
/**
|
|
* The prefix is effectively used by the instruction.
|
|
*/
|
|
ZYDIS_PREFIX_TYPE_EFFECTIVE,
|
|
/**
|
|
* The prefix is used as a mandatory prefix.
|
|
*
|
|
* A mandatory prefix is interpreted as an opcode extension and has no further effect on the
|
|
* instruction.
|
|
*/
|
|
ZYDIS_PREFIX_TYPE_MANDATORY,
|
|
|
|
/**
|
|
* Maximum value of this enum.
|
|
*/
|
|
ZYDIS_PREFIX_TYPE_MAX_VALUE = ZYDIS_PREFIX_TYPE_MANDATORY,
|
|
/**
|
|
* The minimum number of bits required to represent all values of this enum.
|
|
*/
|
|
ZYDIS_PREFIX_TYPE_REQUIRED_BITS = ZYAN_BITS_TO_REPRESENT(ZYDIS_PREFIX_TYPE_MAX_VALUE)
|
|
} ZydisPrefixType;
|
|
|
|
// TODO: Check effective for 66/67 prefixes (currently defaults to EFFECTIVE)
|
|
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
/* Decoded instruction */
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
|
|
/**
|
|
* Detailed info about the `REX` prefix.
|
|
*/
|
|
typedef struct ZydisDecodedInstructionRawRex_
|
|
{
|
|
/**
|
|
* 64-bit operand-size promotion.
|
|
*/
|
|
ZyanU8 W;
|
|
/**
|
|
* Extension of the `ModRM.reg` field.
|
|
*/
|
|
ZyanU8 R;
|
|
/**
|
|
* Extension of the `SIB.index` field.
|
|
*/
|
|
ZyanU8 X;
|
|
/**
|
|
* Extension of the `ModRM.rm`, `SIB.base`, or `opcode.reg` field.
|
|
*/
|
|
ZyanU8 B;
|
|
/**
|
|
* The offset of the effective `REX` byte, relative to the beginning of the
|
|
* instruction, in bytes.
|
|
*
|
|
* This offset always points to the "effective" `REX` prefix (the one closest to the
|
|
* instruction opcode), if multiple `REX` prefixes are present.
|
|
*
|
|
* Note that the `REX` byte can be the first byte of the instruction, which would lead
|
|
* to an offset of `0`. Please refer to the instruction attributes to check for the
|
|
* presence of the `REX` prefix.
|
|
*/
|
|
ZyanU8 offset;
|
|
} ZydisDecodedInstructionRawRex;
|
|
|
|
/**
|
|
* Detailed info about the `XOP` prefix.
|
|
*/
|
|
typedef struct ZydisDecodedInstructionRawXop_
|
|
{
|
|
/**
|
|
* Extension of the `ModRM.reg` field (inverted).
|
|
*/
|
|
ZyanU8 R;
|
|
/**
|
|
* Extension of the `SIB.index` field (inverted).
|
|
*/
|
|
ZyanU8 X;
|
|
/**
|
|
* Extension of the `ModRM.rm`, `SIB.base`, or `opcode.reg` field (inverted).
|
|
*/
|
|
ZyanU8 B;
|
|
/**
|
|
* Opcode-map specifier.
|
|
*/
|
|
ZyanU8 m_mmmm;
|
|
/**
|
|
* 64-bit operand-size promotion or opcode-extension.
|
|
*/
|
|
ZyanU8 W;
|
|
/**
|
|
* `NDS`/`NDD` (non-destructive-source/destination) register
|
|
* specifier (inverted).
|
|
*/
|
|
ZyanU8 vvvv;
|
|
/**
|
|
* Vector-length specifier.
|
|
*/
|
|
ZyanU8 L;
|
|
/**
|
|
* Compressed legacy prefix.
|
|
*/
|
|
ZyanU8 pp;
|
|
/**
|
|
* The offset of the first xop byte, relative to the beginning of
|
|
* the instruction, in bytes.
|
|
*/
|
|
ZyanU8 offset;
|
|
} ZydisDecodedInstructionRawXop;
|
|
|
|
/**
|
|
* Detailed info about the `VEX` prefix.
|
|
*/
|
|
typedef struct ZydisDecodedInstructionRawVex_
|
|
{
|
|
/**
|
|
* Extension of the `ModRM.reg` field (inverted).
|
|
*/
|
|
ZyanU8 R;
|
|
/**
|
|
* Extension of the `SIB.index` field (inverted).
|
|
*/
|
|
ZyanU8 X;
|
|
/**
|
|
* Extension of the `ModRM.rm`, `SIB.base`, or `opcode.reg` field (inverted).
|
|
*/
|
|
ZyanU8 B;
|
|
/**
|
|
* Opcode-map specifier.
|
|
*/
|
|
ZyanU8 m_mmmm;
|
|
/**
|
|
* 64-bit operand-size promotion or opcode-extension.
|
|
*/
|
|
ZyanU8 W;
|
|
/**
|
|
* `NDS`/`NDD` (non-destructive-source/destination) register specifier
|
|
* (inverted).
|
|
*/
|
|
ZyanU8 vvvv;
|
|
/**
|
|
* Vector-length specifier.
|
|
*/
|
|
ZyanU8 L;
|
|
/**
|
|
* Compressed legacy prefix.
|
|
*/
|
|
ZyanU8 pp;
|
|
/**
|
|
* The offset of the first `VEX` byte, relative to the beginning of the instruction, in
|
|
* bytes.
|
|
*/
|
|
ZyanU8 offset;
|
|
/**
|
|
* The size of the `VEX` prefix, in bytes.
|
|
*/
|
|
ZyanU8 size;
|
|
} ZydisDecodedInstructionRawVex;
|
|
|
|
/**
|
|
* Detailed info about the `EVEX` prefix.
|
|
*/
|
|
typedef struct ZydisDecodedInstructionRawEvex
|
|
{
|
|
/**
|
|
* Extension of the `ModRM.reg` field (inverted).
|
|
*/
|
|
ZyanU8 R;
|
|
/**
|
|
* Extension of the `SIB.index/vidx` field (inverted).
|
|
*/
|
|
ZyanU8 X;
|
|
/**
|
|
* Extension of the `ModRM.rm` or `SIB.base` field (inverted).
|
|
*/
|
|
ZyanU8 B;
|
|
/**
|
|
* High-16 register specifier modifier (inverted).
|
|
*/
|
|
ZyanU8 R2;
|
|
/**
|
|
* Opcode-map specifier.
|
|
*/
|
|
ZyanU8 mmm;
|
|
/**
|
|
* 64-bit operand-size promotion or opcode-extension.
|
|
*/
|
|
ZyanU8 W;
|
|
/**
|
|
* `NDS`/`NDD` (non-destructive-source/destination) register specifier
|
|
* (inverted).
|
|
*/
|
|
ZyanU8 vvvv;
|
|
/**
|
|
* Compressed legacy prefix.
|
|
*/
|
|
ZyanU8 pp;
|
|
/**
|
|
* Zeroing/Merging.
|
|
*/
|
|
ZyanU8 z;
|
|
/**
|
|
* Vector-length specifier or rounding-control (most significant bit).
|
|
*/
|
|
ZyanU8 L2;
|
|
/**
|
|
* Vector-length specifier or rounding-control (least significant bit).
|
|
*/
|
|
ZyanU8 L;
|
|
/**
|
|
* Broadcast/RC/SAE context.
|
|
*/
|
|
ZyanU8 b;
|
|
/**
|
|
* High-16 `NDS`/`VIDX` register specifier.
|
|
*/
|
|
ZyanU8 V2;
|
|
/**
|
|
* Embedded opmask register specifier.
|
|
*/
|
|
ZyanU8 aaa;
|
|
/**
|
|
* The offset of the first evex byte, relative to the beginning of the
|
|
* instruction, in bytes.
|
|
*/
|
|
ZyanU8 offset;
|
|
} ZydisDecodedInstructionRawEvex;
|
|
|
|
/**
|
|
* Detailed info about the `MVEX` prefix.
|
|
*/
|
|
typedef struct ZydisDecodedInstructionRawMvex_
|
|
{
|
|
/**
|
|
* Extension of the `ModRM.reg` field (inverted).
|
|
*/
|
|
ZyanU8 R;
|
|
/**
|
|
* Extension of the `SIB.index/vidx` field (inverted).
|
|
*/
|
|
ZyanU8 X;
|
|
/**
|
|
* Extension of the `ModRM.rm` or `SIB.base` field (inverted).
|
|
*/
|
|
ZyanU8 B;
|
|
/**
|
|
* High-16 register specifier modifier (inverted).
|
|
*/
|
|
ZyanU8 R2;
|
|
/**
|
|
* Opcode-map specifier.
|
|
*/
|
|
ZyanU8 mmmm;
|
|
/**
|
|
* 64-bit operand-size promotion or opcode-extension.
|
|
*/
|
|
ZyanU8 W;
|
|
/**
|
|
* `NDS`/`NDD` (non-destructive-source/destination) register specifier
|
|
* (inverted).
|
|
*/
|
|
ZyanU8 vvvv;
|
|
/**
|
|
* Compressed legacy prefix.
|
|
*/
|
|
ZyanU8 pp;
|
|
/**
|
|
* Non-temporal/eviction hint.
|
|
*/
|
|
ZyanU8 E;
|
|
/**
|
|
* Swizzle/broadcast/up-convert/down-convert/static-rounding controls.
|
|
*/
|
|
ZyanU8 SSS;
|
|
/**
|
|
* High-16 `NDS`/`VIDX` register specifier.
|
|
*/
|
|
ZyanU8 V2;
|
|
/**
|
|
* Embedded opmask register specifier.
|
|
*/
|
|
ZyanU8 kkk;
|
|
/**
|
|
* The offset of the first mvex byte, relative to the beginning of the
|
|
* instruction, in bytes.
|
|
*/
|
|
ZyanU8 offset;
|
|
} ZydisDecodedInstructionRawMvex;
|
|
|
|
/**
|
|
* Extended info for `AVX` instructions.
|
|
*/
|
|
typedef struct ZydisDecodedInstructionAvx_
|
|
{
|
|
/**
|
|
* The `AVX` vector-length.
|
|
*/
|
|
ZyanU16 vector_length;
|
|
/**
|
|
* Info about the embedded writemask-register (`AVX-512` and `KNC` only).
|
|
*/
|
|
struct ZydisDecodedInstructionAvxMask_
|
|
{
|
|
/**
|
|
* The masking mode.
|
|
*/
|
|
ZydisMaskMode mode;
|
|
/**
|
|
* The mask register.
|
|
*/
|
|
ZydisRegister reg;
|
|
} mask;
|
|
/**
|
|
* Contains info about the `AVX` broadcast.
|
|
*/
|
|
struct ZydisDecodedInstructionAvxBroadcast_
|
|
{
|
|
/**
|
|
* Signals, if the broadcast is a static broadcast.
|
|
*
|
|
* This is the case for instructions with inbuilt broadcast functionality, which is
|
|
* always active and not controlled by the `EVEX/MVEX.RC` bits.
|
|
*/
|
|
ZyanBool is_static;
|
|
/**
|
|
* The `AVX` broadcast-mode.
|
|
*/
|
|
ZydisBroadcastMode mode;
|
|
} broadcast;
|
|
/**
|
|
* Contains info about the `AVX` rounding.
|
|
*/
|
|
struct ZydisDecodedInstructionAvxRounding_
|
|
{
|
|
/**
|
|
* The `AVX` rounding-mode.
|
|
*/
|
|
ZydisRoundingMode mode;
|
|
} rounding;
|
|
/**
|
|
* Contains info about the `AVX` register-swizzle (`KNC` only).
|
|
*/
|
|
struct ZydisDecodedInstructionAvxSwizzle_
|
|
{
|
|
/**
|
|
* The `AVX` register-swizzle mode.
|
|
*/
|
|
ZydisSwizzleMode mode;
|
|
} swizzle;
|
|
/**
|
|
* Contains info about the `AVX` data-conversion (`KNC` only).
|
|
*/
|
|
struct ZydisDecodedInstructionAvxConversion_
|
|
{
|
|
/**
|
|
* The `AVX` data-conversion mode.
|
|
*/
|
|
ZydisConversionMode mode;
|
|
} conversion;
|
|
/**
|
|
* Signals, if the `SAE` (suppress-all-exceptions) functionality is
|
|
* enabled for the instruction.
|
|
*/
|
|
ZyanBool has_sae;
|
|
/**
|
|
* Signals, if the instruction has a memory-eviction-hint (`KNC` only).
|
|
*/
|
|
ZyanBool has_eviction_hint;
|
|
// TODO: publish EVEX tuple-type and MVEX functionality
|
|
} ZydisDecodedInstructionAvx;
|
|
|
|
/**
|
|
* Instruction meta info.
|
|
*/
|
|
typedef struct ZydisDecodedInstructionMeta_
|
|
{
|
|
/**
|
|
* The instruction category.
|
|
*/
|
|
ZydisInstructionCategory category;
|
|
/**
|
|
* The ISA-set.
|
|
*/
|
|
ZydisISASet isa_set;
|
|
/**
|
|
* The ISA-set extension.
|
|
*/
|
|
ZydisISAExt isa_ext;
|
|
/**
|
|
* The branch type.
|
|
*/
|
|
ZydisBranchType branch_type;
|
|
/**
|
|
* The exception class.
|
|
*/
|
|
ZydisExceptionClass exception_class;
|
|
} ZydisDecodedInstructionMeta;
|
|
|
|
/**
|
|
* Detailed info about different instruction-parts like `ModRM`, `SIB` or
|
|
* encoding-prefixes.
|
|
*/
|
|
typedef struct ZydisDecodedInstructionRaw_
|
|
{
|
|
/**
|
|
* The number of legacy prefixes.
|
|
*/
|
|
ZyanU8 prefix_count;
|
|
/**
|
|
* Detailed info about the legacy prefixes (including `REX`).
|
|
*/
|
|
struct ZydisDecodedInstructionRawPrefixes_
|
|
{
|
|
/**
|
|
* The prefix type.
|
|
*/
|
|
ZydisPrefixType type;
|
|
/**
|
|
* The prefix byte.
|
|
*/
|
|
ZyanU8 value;
|
|
} prefixes[ZYDIS_MAX_INSTRUCTION_LENGTH];
|
|
|
|
/*
|
|
* Copy of the `encoding` field.
|
|
*
|
|
* This is here to allow the Rust bindings to treat the following union as an `enum`,
|
|
* sparing us a lot of unsafe code. Prefer using the regular `encoding` field in C/C++ code.
|
|
*/
|
|
ZydisInstructionEncoding encoding2;
|
|
/*
|
|
* Union for things from various mutually exclusive encodings.
|
|
*/
|
|
union
|
|
{
|
|
ZydisDecodedInstructionRawRex rex;
|
|
ZydisDecodedInstructionRawXop xop;
|
|
ZydisDecodedInstructionRawVex vex;
|
|
ZydisDecodedInstructionRawEvex evex;
|
|
ZydisDecodedInstructionRawMvex mvex;
|
|
};
|
|
|
|
/**
|
|
* Detailed info about the `ModRM` byte.
|
|
*/
|
|
struct ZydisDecodedInstructionModRm_
|
|
{
|
|
/**
|
|
* The addressing mode.
|
|
*/
|
|
ZyanU8 mod;
|
|
/**
|
|
* Register specifier or opcode-extension.
|
|
*/
|
|
ZyanU8 reg;
|
|
/**
|
|
* Register specifier or opcode-extension.
|
|
*/
|
|
ZyanU8 rm;
|
|
/**
|
|
* The offset of the `ModRM` byte, relative to the beginning of the
|
|
* instruction, in bytes.
|
|
*/
|
|
ZyanU8 offset;
|
|
} modrm;
|
|
/**
|
|
* Detailed info about the `SIB` byte.
|
|
*/
|
|
struct ZydisDecodedInstructionRawSib_
|
|
{
|
|
/**
|
|
* The scale factor.
|
|
*/
|
|
ZyanU8 scale;
|
|
/**
|
|
* The index-register specifier.
|
|
*/
|
|
ZyanU8 index;
|
|
/**
|
|
* The base-register specifier.
|
|
*/
|
|
ZyanU8 base;
|
|
/**
|
|
* The offset of the `SIB` byte, relative to the beginning of the
|
|
* instruction, in bytes.
|
|
*/
|
|
ZyanU8 offset;
|
|
} sib;
|
|
/**
|
|
* Detailed info about displacement-bytes.
|
|
*/
|
|
struct ZydisDecodedInstructionRawDisp_
|
|
{
|
|
/**
|
|
* The displacement value
|
|
*/
|
|
ZyanI64 value;
|
|
/**
|
|
* The physical displacement size, in bits.
|
|
*/
|
|
ZyanU8 size;
|
|
// TODO: publish cd8 scale
|
|
/**
|
|
* The offset of the displacement data, relative to the beginning of the
|
|
* instruction, in bytes.
|
|
*/
|
|
ZyanU8 offset;
|
|
} disp;
|
|
/**
|
|
* Detailed info about immediate-bytes.
|
|
*/
|
|
struct ZydisDecodedInstructionRawImm_
|
|
{
|
|
/**
|
|
* Signals, if the immediate value is signed.
|
|
*/
|
|
ZyanBool is_signed;
|
|
/**
|
|
* Signals, if the immediate value contains a relative offset. You can use
|
|
* `ZydisCalcAbsoluteAddress` to determine the absolute address value.
|
|
*/
|
|
ZyanBool is_relative;
|
|
/**
|
|
* The immediate value.
|
|
*/
|
|
union ZydisDecodedInstructionRawImmValue_
|
|
{
|
|
ZyanU64 u;
|
|
ZyanI64 s;
|
|
} value;
|
|
/**
|
|
* The physical immediate size, in bits.
|
|
*/
|
|
ZyanU8 size;
|
|
/**
|
|
* The offset of the immediate data, relative to the beginning of the
|
|
* instruction, in bytes.
|
|
*/
|
|
ZyanU8 offset;
|
|
} imm[2];
|
|
} ZydisDecodedInstructionRaw;
|
|
|
|
/**
|
|
* Information about a decoded instruction.
|
|
*/
|
|
typedef struct ZydisDecodedInstruction_
|
|
{
|
|
/**
|
|
* The machine mode used to decode this instruction.
|
|
*/
|
|
ZydisMachineMode machine_mode;
|
|
/**
|
|
* The instruction-mnemonic.
|
|
*/
|
|
ZydisMnemonic mnemonic;
|
|
/**
|
|
* The length of the decoded instruction.
|
|
*/
|
|
ZyanU8 length;
|
|
/**
|
|
* The instruction-encoding (`LEGACY`, `3DNOW`, `VEX`, `EVEX`, `XOP`).
|
|
*/
|
|
ZydisInstructionEncoding encoding;
|
|
/**
|
|
* The opcode-map.
|
|
*/
|
|
ZydisOpcodeMap opcode_map;
|
|
/**
|
|
* The instruction-opcode.
|
|
*/
|
|
ZyanU8 opcode;
|
|
/**
|
|
* The stack width.
|
|
*/
|
|
ZyanU8 stack_width;
|
|
/**
|
|
* The effective operand width.
|
|
*/
|
|
ZyanU8 operand_width;
|
|
/**
|
|
* The effective address width.
|
|
*/
|
|
ZyanU8 address_width;
|
|
/**
|
|
* The number of instruction-operands.
|
|
*
|
|
* Explicit and implicit operands are guaranteed to be in the front and ordered as they are
|
|
* printed by the formatter in `Intel` mode. No assumptions can be made about the order of
|
|
* hidden operands, except that they always located behind the explicit and implicit operands.
|
|
*/
|
|
ZyanU8 operand_count;
|
|
/**
|
|
* The number of explicit (visible) instruction-operands.
|
|
*
|
|
* Explicit and implicit operands are guaranteed to be in the front and ordered as they are
|
|
* printed by the formatter in `Intel` mode.
|
|
*/
|
|
ZyanU8 operand_count_visible;
|
|
/**
|
|
* See @ref instruction_attributes.
|
|
*/
|
|
ZydisInstructionAttributes attributes;
|
|
/**
|
|
* Information about CPU flags accessed by the instruction.
|
|
*
|
|
* The bits in the masks correspond to the actual bits in the `FLAGS/EFLAGS/RFLAGS`
|
|
* register. See @ref decoder_cpu_flags.
|
|
*/
|
|
const ZydisAccessedFlags* cpu_flags;
|
|
/**
|
|
* Information about FPU flags accessed by the instruction.
|
|
*
|
|
* See @ref decoder_fpu_flags.
|
|
*/
|
|
const ZydisAccessedFlags* fpu_flags;
|
|
/**
|
|
* Extended info for `AVX` instructions.
|
|
*/
|
|
ZydisDecodedInstructionAvx avx;
|
|
/**
|
|
* Meta info.
|
|
*/
|
|
ZydisDecodedInstructionMeta meta;
|
|
/**
|
|
* Detailed info about different instruction-parts like `ModRM`, `SIB` or
|
|
* encoding-prefixes.
|
|
*/
|
|
ZydisDecodedInstructionRaw raw;
|
|
} ZydisDecodedInstruction;
|
|
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
/* Decoder context */
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
|
|
/**
|
|
* The decoder context is used to preserve some internal state between subsequent decode
|
|
* operations for THE SAME instruction.
|
|
*
|
|
* The context is initialized by @c ZydisDecoderDecodeInstruction and required by e.g.
|
|
* @c ZydisDecoderDecodeOperands.
|
|
*
|
|
* All fields in this struct should be considered as "private". Any changes may lead to unexpected
|
|
* behavior.
|
|
*
|
|
* This struct is neither ABI nor API stable!
|
|
*/
|
|
typedef struct ZydisDecoderContext_
|
|
{
|
|
/**
|
|
* A pointer to the internal instruction definition.
|
|
*/
|
|
const void* definition;
|
|
/**
|
|
* Contains the effective operand-size index.
|
|
*
|
|
* 0 = 16 bit, 1 = 32 bit, 2 = 64 bit
|
|
*/
|
|
ZyanU8 eosz_index;
|
|
/**
|
|
* Contains the effective address-size index.
|
|
*
|
|
* 0 = 16 bit, 1 = 32 bit, 2 = 64 bit
|
|
*/
|
|
ZyanU8 easz_index;
|
|
/**
|
|
* Contains some cached REX/XOP/VEX/EVEX/MVEX values to provide uniform access.
|
|
*/
|
|
struct
|
|
{
|
|
ZyanU8 W;
|
|
ZyanU8 R;
|
|
ZyanU8 X;
|
|
ZyanU8 B;
|
|
ZyanU8 L;
|
|
ZyanU8 LL;
|
|
ZyanU8 R2;
|
|
ZyanU8 V2;
|
|
ZyanU8 vvvv;
|
|
ZyanU8 mask;
|
|
} vector_unified;
|
|
/**
|
|
* Information about encoded operand registers.
|
|
*/
|
|
struct
|
|
{
|
|
/**
|
|
* Signals if the `modrm.mod == 3` or `reg` form is forced for the instruction.
|
|
*/
|
|
ZyanBool is_mod_reg;
|
|
/**
|
|
* The final register id for the `reg` encoded register.
|
|
*/
|
|
ZyanU8 id_reg;
|
|
/**
|
|
* The final register id for the `rm` encoded register.
|
|
*
|
|
* This value is only set, if a register is encoded in `modrm.rm`.
|
|
*/
|
|
ZyanU8 id_rm;
|
|
/**
|
|
* The final register id for the `ndsndd` (`.vvvv`) encoded register.
|
|
*/
|
|
ZyanU8 id_ndsndd;
|
|
/**
|
|
* The final register id for the base register.
|
|
*
|
|
* This value is only set, if a memory operand is encoded in `modrm.rm`.
|
|
*/
|
|
ZyanU8 id_base;
|
|
/**
|
|
* The final register id for the index register.
|
|
*
|
|
* This value is only set, if a memory operand is encoded in `modrm.rm` and the `SIB` byte
|
|
* is present.
|
|
*/
|
|
ZyanU8 id_index;
|
|
} reg_info;
|
|
/**
|
|
* Internal EVEX-specific information.
|
|
*/
|
|
struct
|
|
{
|
|
/**
|
|
* The EVEX tuple-type.
|
|
*/
|
|
ZyanU8 tuple_type;
|
|
/**
|
|
* The EVEX element-size.
|
|
*/
|
|
ZyanU8 element_size;
|
|
} evex;
|
|
/**
|
|
* Internal MVEX-specific information.
|
|
*/
|
|
struct
|
|
{
|
|
/**
|
|
* The MVEX functionality.
|
|
*/
|
|
ZyanU8 functionality;
|
|
} mvex;
|
|
/**
|
|
* The scale factor for EVEX/MVEX compressed 8-bit displacement values.
|
|
*/
|
|
ZyanU8 cd8_scale; // TODO: Could make sense to expose this in the ZydisDecodedInstruction
|
|
} ZydisDecoderContext;
|
|
|
|
/* ---------------------------------------------------------------------------------------------- */
|
|
|
|
/* ============================================================================================== */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* ZYDIS_INSTRUCTIONINFO_H */
|