Commit graph

190 commits

Author SHA1 Message Date
MerryMage
276873bf70 Wrap #pragma warning with #ifdef _MSC_VER .. #endif 2016-12-15 21:36:02 +00:00
MerryMage
0e8b626d87 CMakeLists: Globally disable MSVC warning C4592
C4592: Symbol will be dynamically initialized (implementation limitation)
2016-12-15 21:09:55 +00:00
MerryMage
91e851a991 CMakeLists: Enable /W4 on MSVC 2016-12-15 20:52:23 +00:00
MerryMage
63caed7b09 emit_x64: Remove argument names of unused arguments 2016-12-15 20:52:22 +00:00
MerryMage
5bea2e1680 block_of_code: Support stack unwinding on Windows 2016-12-12 07:49:18 +00:00
MerryMage
4962d92b79 block_of_code: Do not regenerate prelude when clearing cache 2016-12-12 07:49:18 +00:00
MerryMage
179a3388f9 block_of_code: Provide an alloc function to allocate space in the code block 2016-12-12 07:49:18 +00:00
Lioncash
f467589346 emit_x64: Remove unnecessary casts 2016-12-05 20:30:19 +00:00
Lioncash
a37631c010 emit_x64: Use reinterpret_cast for pointer casts 2016-12-05 20:30:19 +00:00
Lioncash
fafa845f64 emit_x64: Make GetBasicBlock() const qualified 2016-12-05 12:46:22 +00:00
Lioncash
6a16edc0fb emit_x64: Move implementations into the cpp file
Prevents needing to rebuild everything including the emitter if any
details ever change.
2016-12-05 12:46:22 +00:00
Lioncash
282029f60a emit_x64: Forward declare BlockOfCode 2016-12-05 12:46:22 +00:00
Lioncash
6898b74c78 emit_x64: Get rid of indirect includes 2016-12-05 12:46:22 +00:00
MerryMage
54d051977f emit_x64: Use movdqa instead of movaps in EmitPackedSubU8
While movaps and movdqa are behaviourly equivalent, using movaps may incur
a domain crossing penalty on some microarchitectures. This is because
movaps is an instruction in the floating-point domain while the following
instructions are in the integer domain.
2016-12-05 01:00:51 +00:00
MerryMage
52e1445f43 Implement USUB8 2016-12-05 00:29:15 +00:00
MerryMage
5c1aab1666 Implement CLZ
Includes tests
2016-12-04 22:56:33 +00:00
MerryMage
1a1646d962 Implement UADD8 2016-12-04 20:52:33 +00:00
MerryMage
7cad6949e7 IR: Implement new pseudo-operation GetGEFromOp 2016-12-04 20:52:06 +00:00
MerryMage
25f21b5371 emit_x64: Inline nzcv computation into EmitFPCompare32 and EmitFPCompare64 2016-12-04 11:43:31 +00:00
MerryMage
cede5e442a emit_x64: Use xorps/xorpd when argument to TransferToFP32/TransferToFP64 is an immediate zero 2016-12-03 11:41:10 +00:00
MerryMage
e166965f3e Implement VCMP 2016-12-03 11:41:09 +00:00
MerryMage
f2fe376fc6 Support 64-bit immediates 2016-12-03 11:29:50 +00:00
Mat M
95f34c683c reg_alloc: Remove unnecessary breaks after returns (#54) 2016-12-02 19:14:44 +00:00
Mat M
de1f831d79 microinstruction: Make use_count private (#53)
Makes the operation a part of the direct interface.
2016-11-30 21:51:06 +00:00
MerryMage
3621a925b2 reg_alloc: Register allocator related constraints belong with the rest of the register allocator
HostLocToReg64 contained two DEBUG_ASSERTs invloving constraints that
really belonged to the register allocator.

The register allocator prevents allocation of RSP and R15 because those
are reserved for the stack pointer and the state pointer respectively.
2016-11-30 19:42:41 +00:00
MerryMage
5f11b4f50e HostLoc: R15 is a GPR 2016-11-30 18:38:03 +00:00
Sebastian Valle
14eb70d7e4 VFP: Fixed the VCVT behavior when converting from unsigned 32-bit values. (#51)
Use a 64-bit register to hold the values so that we don't end up interpreting them as signed values.
2016-11-27 23:25:50 +00:00
Merry
0ff8c375af Implement UHSUB8 and UHSUB16 (#48) 2016-11-26 18:27:21 +00:00
Merry
cb17f9a3ed Implement SHADD8 and SHADD16 (#47) 2016-11-26 18:12:29 +00:00
MerryMage
c0c1bb1094 Implemented UHADD16 2016-11-26 11:28:20 +00:00
Sebastian Valle
4d44474ad4 Implemented the ARM UHADD8 instruction. (#45)
The x64 implementation uses the SSSE3 instruction PSHUFB.
A non-SSE fallback is provided in case the CPU doesn't support it.
2016-11-25 20:32:22 +00:00
MerryMage
b6f7b8babd ir: Implement GetGEFlags, SetGEFlags 2016-11-23 19:44:27 +00:00
Mat M
6a2174ebfa Add missing explicit specifiers (#27) 2016-09-07 12:08:48 +01:00
Mat M
6e0f27a500 types: Add helpers for determining single and doubleword extension registers (#26) 2016-09-07 12:08:35 +01:00
Mat M
5bc9ce544f arm_types: Move into arm folder (#25) 2016-09-06 00:52:33 +01:00
MerryMage
1f61a3d7bc jitstate: Rename fields s/guest_FPSCR/FPSCR/ 2016-09-05 14:42:21 +01:00
Mat M
6d53bb6d7e arm_types: Split out LocationDescriptor (#20)
This isn't really an ARM-specific type, since it's used to indicate a
Block location.
2016-09-05 11:54:09 +01:00
Mat M
858796a029 Eliminate variable shadowing warnings with MSVC (#17) 2016-09-04 11:30:57 +01:00
Mat M
7f9a0c3c38 Remove unnecessary explicit includes (#16) 2016-09-03 21:48:03 +01:00
Mat M
26db11cd71 reg_alloc: Use a strongly-typed enum for representing OpArg type (#15) 2016-09-03 18:30:03 +01:00
Mat M
05b189bc26 arm_types: Specialize std::hash for LocationDescriptor (#14)
Same thing, but with the benefit of working with anything that uses
std::hash by default.
2016-09-03 12:48:47 +01:00
Mat M
8c4df46580 FPSCR: Make value constructor explicit (#13)
Maintains consistency between the PSR helper.
2016-09-03 12:48:31 +01:00
Mat M
6ec651498d arm: Add PSR helper type (#3) 2016-09-02 17:34:33 +01:00
Mat M
1e781d911a reg_alloc: const correctness (#8) 2016-09-02 17:30:01 +01:00
MerryMage
711b3e29d3 interface: Allow ClearCache to be called at any time 2016-09-02 10:59:33 +01:00
Mat M
fb6d838bd9 dynarmic: Remove poison_memory ClearCache parameter (#1)
Unused since the switch to Xbyak
2016-09-01 09:47:09 +01:00
MerryMage
4321e829d1 callbacks: Add user_arg argument to InterpreterFallback 2016-09-01 02:00:08 +01:00
MerryMage
3b5c43b427 Optimization: Read page-table directly for memory access 2016-09-01 00:58:02 +01:00
MerryMage
57169ec093 abi: Implement ABI_PushCallerSaveRegistersAndAdjustStack and ABI_PopCallerSaveRegistersAndAdjustStack 2016-09-01 00:57:22 +01:00
MerryMage
702e181b35 backend_x64/abi: Reversing XMM list leads to incorrect ordering 2016-08-31 23:06:49 +01:00