Subv
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fce8f75077
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Added a dummy (always fail) ARM test about Load/Store instructions that write to the PC.
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2016-07-18 16:13:33 -05:00 |
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Subv
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426ffc9971
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Added ARM fuzz tests for LDRD/LDR/LDRT/LDRB/LDRBT/LDRH and STRD/STR/STRT/STRB/STRBT/STRH.
These tests do not test the behavior of writing to the PC.
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2016-07-18 16:13:02 -05:00 |
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Subv
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c330d9e0e3
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Increase the chance of generating instructions without conditions in the REV/REVSH/REV16 tests.
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2016-07-18 16:10:35 -05:00 |
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MerryMage
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dfef65d98f
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Implement thumb POP instruction
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2016-07-18 17:37:48 +01:00 |
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MerryMage
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c18a3eeab4
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Better MSVC support
* Avoiding use of templated variables.
* Now compling on MSVC with /WX (warnings as errors).
* Fixed all MSVC warnings.
* Fixed MSVC source_groups.
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2016-07-18 10:38:22 +01:00 |
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Subv
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0cdf5fe751
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Implemented ARM REV and REVSH instructions, with tests.
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2016-07-17 14:45:42 -05:00 |
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MerryMage
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866dce0f23
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tests/Thumb: Add revsh (thumb) test
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2016-07-16 19:22:57 +01:00 |
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MerryMage
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4b1c27e64f
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Implement arm_ADC_imm
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2016-07-14 20:02:41 +01:00 |
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MerryMage
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07eaf100ba
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Reorganise src/frontend: Add subdirectories disassembler and translate
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2016-07-14 14:39:43 +01:00 |
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MerryMage
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8449deb0bc
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MSVC support
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2016-07-12 13:28:09 +01:00 |
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MerryMage
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65d27f3486
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tests: Add some Arm tests
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2016-07-12 09:12:56 +01:00 |
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