Lioncash
fb829b9525
frontend/microinstruction: Add FPVectorRoundInt types to ReadsFromAndWritesToFPSRCumulativeExceptionBits()
...
All variants were previously missing from this.
2020-04-22 21:01:44 +01:00
Lioncash
5dba99b4f4
frontend/ir_emitter: Add half-precision opcode variant for FPRSqrtEstimate
2020-04-22 21:01:44 +01:00
Lioncash
825a3ea16f
frontend/ir_emitter: Add half-precision opcode for FPVectorRecipEstimate
2020-04-22 21:01:44 +01:00
Merry
d7da53a74b
Merge pull request #472 from lioncash/exception
...
general: Mark hash functions as noexcept
2020-04-22 21:01:44 +01:00
Lioncash
9dcc04e106
A64: Implement SQSHLU's scalar variant
2020-04-22 21:01:44 +01:00
Merry
b91c6c8bae
Merge pull request #471 from lioncash/sqrdmulh
...
A64: Implement SQRDMULH's scalar vector variant
2020-04-22 21:01:44 +01:00
Lioncash
1fdd3ef8a0
A64: Implement FMLA/FMLS' half-precision scalar indexed variants
2020-04-22 21:01:44 +01:00
Lioncash
5b4673da4b
frontend/ir_emitter: Add half-precision variant of FPVectorRoundInt
2020-04-22 21:01:44 +01:00
Lioncash
726b9914c5
common/fp/op/FPRSqrtEstimate: Add half-precision specialization for FPRSqrtEstimate
2020-04-22 21:01:44 +01:00
Lioncash
2184d24e8f
frontend/ir_emitter: Add half-precision opcode for FPRecipEstimate
2020-04-22 21:01:44 +01:00
Lioncash
2d59d10ac8
A64: Implement SQSHLU's vector variant
...
The vector shift by immediate category is now fully implemented.
2020-04-22 21:01:44 +01:00
Merry
b5e25959d9
Merge pull request #470 from lioncash/assert
...
general: Replace unreachable-imitating assertions with UNREACHABLE()
2020-04-22 21:01:44 +01:00
Lioncash
d6606deda2
A64: Implement half-precision vector variants of FMLA/FMLS
2020-04-22 21:01:44 +01:00
Lioncash
ad0c698f89
frontend/ir_emitter: Add half-precision variant of FPRoundInt
2020-04-22 21:01:44 +01:00
Lioncash
af2e5afed6
common/fp/op: Add half-precision specialization for FPRecipEstimate
2020-04-22 21:01:44 +01:00
Lioncash
a4cadf1cd9
frontend/ir_emitter: Add opcodes for signed saturated left shifts with unsigned saturation
2020-04-22 21:01:44 +01:00
Lioncash
ec6b3ae084
ir/frontend: Add half-precision opcode for FPVectorMulAdd
2020-04-22 21:01:44 +01:00
Lioncash
61cec94a19
fp/op/FPRoundInt: Add half-precision specialization of FPRoundInt
2020-04-22 21:01:44 +01:00
Lioncash
5d5c9f149f
frontend/ir_emitter: Add half-precision opcode for FPVectorRecipStepFused
2020-04-22 21:01:44 +01:00
Lioncash
5f74d25bf7
A64: Enable half-precision floating point variants of FP data-processing three register instructions
...
This handles half-precision floating point for:
- FMADD
- FMSUB
- FNMADD
- FNMSUB
2020-04-22 21:01:44 +01:00
Lioncash
6da0411111
frontend/ir_emitter: Add half-precision opcode for FPRecipStepFused
2020-04-22 21:01:44 +01:00
Lioncash
bd82513199
frontend/ir_emitter: Add half-precision opcode for FPMulAdd
2020-04-22 21:01:44 +01:00
Lioncash
68d8cd2b13
common/fp/op: Add half-precision specialization for FPRecipStepFused
2020-04-22 21:01:44 +01:00
Lioncash
79a892d23c
fp/op/FPMulAdd: Add half-precision floating-point specialization
2020-04-22 21:01:44 +01:00
Lioncash
7bb5440507
general: Mark hash functions as noexcept
...
Generally hash functions shouldn't throw exceptions. It's also a
requirement for the standard library-provided hash functions to not
throw exceptions.
An exception to this rule is made for user-defined specializations,
however we can just be consistent with the standard library on this to
allow it to play nicer with it.
While we're at it, we can also make the std::less specializations
noexcpet as well, since they also can't throw.
2020-04-22 21:01:43 +01:00
Lioncash
3b46b4a37d
A64: Implement SQRDMULH's scalar vector variant
...
Implements the scalar variant in terms of the vector variant for the
time being.
2020-04-22 21:01:43 +01:00
Merry
16bea87481
Merge pull request #469 from lioncash/void
...
A64/impl: Reorganize peculiar void use in V_scalar
2020-04-22 21:01:43 +01:00
Lioncash
fe95575b95
general: Replace unreachable-imitating assertions with UNREACHABLE()
...
We can just use the self-documenting assertion for indicating
unreachable paths, instead of manually passing false and providing a
message.
2020-04-22 21:01:43 +01:00
Merry
4a3d808354
Merge pull request #468 from lioncash/const
...
ir_opt: Mark locals as const where applicable
2020-04-22 21:01:43 +01:00
Lioncash
64de80839e
A64/impl: Reorganize peculiar void use in V_scalar
...
To a reader this might look particularly strange, given the function
itself has a void return value, but this is actually valid, given the
function in the return statement also has a void return value.
This instead alters it to be a little easier to parse and potentially be
a little less confusing at a glance.
2020-04-22 21:01:43 +01:00
Merry
9a4e3b24e4
Merge pull request #467 from lioncash/reserved
...
A64: Handle reserved instruction cases more specifically where applicable
2020-04-22 21:01:43 +01:00
Merry
0b794cbcea
Merge pull request #466 from lioncash/fcmla
...
A64: Implement FCMLA's indexed element variant
2020-04-22 21:01:43 +01:00
Merry
994349d154
Merge pull request #465 from neobrain/master
...
CMakeLists: Allow importing dynarmic build trees into other CMake projects
2020-04-22 21:01:43 +01:00
Lioncash
cfd7513a7d
ir_opt/verification_pass: Mark locals as const where applicable
...
Makes our immutable state a little more explicit.
2020-04-22 21:01:40 +01:00
Lioncash
8309d49588
A64: Handle reserved instruction cases more specifically where applicable
...
These are cases that are defined as reserved within the ARMv8 reference
manual, so we can handle them as such instead of as unallocated
encodings.
While this doesn't actually change emulated behavior, it does at least
allow the JIT to generate the more appropriate exception.
2020-04-22 21:00:47 +01:00
Lioncash
6c2c68bce6
A64: Implement FCMLA's indexed element variant
...
With this, all of the instructions introduced with ARMv8.3-CompNum have
an implementation.
2020-04-22 21:00:47 +01:00
Merry
e7361148db
Merge pull request #464 from lioncash/uqshl
...
A64: Implement UQSHL (immediate)'s scalar variant
2020-04-22 21:00:47 +01:00
Tony Wasserka
7d99a6c00f
CMakeLists: Allow importing dynarmic build trees into other CMake projects
2020-04-22 21:00:47 +01:00
Lioncash
1a45f35b9c
ir_opt/a64_callback_config_pass: Mark locals as const where applicable
...
Makes our immutable state a little more explicit.
2020-04-22 21:00:47 +01:00
Merry
55a30ef2cf
Merge pull request #463 from lioncash/sqshl
...
A64: Implement scalar variant of SQSHL (immediate)
2020-04-22 21:00:47 +01:00
Lioncash
7bc7042104
simd_scalar_shift_by_immediate: Change UnallocatedEncoding() path in SaturatingShiftLeft to ReservedValue()
...
Strictly speaking, immh being zero is defined as reserved in the ARMv8
reference manual. This was just an error on my part when introducing the
SQSHL immediate scalar variant.
2020-04-22 21:00:47 +01:00
Lioncash
dc97977576
ir_opt/a32_get_set_elimination_pass: Mark local variables as const where applicable
...
Makes our intended immutable state slightly more explicit.
2020-04-22 21:00:47 +01:00
MerryMage
d5c47fbe29
README: Update README
2020-04-22 21:00:47 +01:00
Lioncash
3649dc6d9a
A64: Implement scalar variant of SQSHL (immediate)
...
This can be handled in terms of the vector variant for the time being.
2020-04-22 21:00:47 +01:00
Lioncash
b1b4487e4d
A64: Implement UQSHL (immediate)'s scalar variant
...
Like SQSHL's immediate scalar variant, we can also implement UQSHL's
immediate scalar variant in terms of the vector variant for the time
being.
2020-04-22 21:00:47 +01:00
Lioncash
7d535eaba6
ir_opt/a32_constant_memory_reads_pass: Apply const where applicable to locals
...
Makes immutable state just slightly more explicit.
2020-04-22 21:00:47 +01:00
Merry
0de471fc1a
Merge pull request #462 from lioncash/undef
...
{common/fp, backend/x64}: Prevent undefined left shifts where applicable
2020-04-22 21:00:47 +01:00
Lioncash
e1b4ff1068
simd_scalar_shift_by_immediate: Migrate SQSHL implementation to file-scope function
...
This will allow it to be reused for the implementation of UQSHL.
2020-04-22 21:00:47 +01:00
Lioncash
b37279f65c
backend/x64/emit_x64_vector: Prevent undefined behavior within VectorSignedSaturatedShiftLeft
...
Avoids undefined behavior by potentially left-shifting a signed negative
value.
2020-04-22 21:00:47 +01:00
Lioncash
46eae8cf2f
common/fp/op/FPRecipExponent: Prevent undefined behavior from shifting a negative value
...
Due to promotion rules (types < int, even if unsigned, get promoted to
int when arithmetic is performed on them), this is a potential spot for
undefined behavior.
2020-04-22 21:00:47 +01:00