Merry
0ff8c375af
Implement UHSUB8 and UHSUB16 ( #48 )
2016-11-26 18:27:21 +00:00
Merry
cb17f9a3ed
Implement SHADD8 and SHADD16 ( #47 )
2016-11-26 18:12:29 +00:00
MerryMage
c0c1bb1094
Implemented UHADD16
2016-11-26 11:28:20 +00:00
Sebastian Valle
4d44474ad4
Implemented the ARM UHADD8 instruction. ( #45 )
...
The x64 implementation uses the SSSE3 instruction PSHUFB.
A non-SSE fallback is provided in case the CPU doesn't support it.
2016-11-25 20:32:22 +00:00
MerryMage
b6f7b8babd
ir: Implement GetGEFlags, SetGEFlags
2016-11-23 19:44:27 +00:00
Mat M
6e0f27a500
types: Add helpers for determining single and doubleword extension registers ( #26 )
2016-09-07 12:08:35 +01:00
Mat M
5bc9ce544f
arm_types: Move into arm folder ( #25 )
2016-09-06 00:52:33 +01:00
MerryMage
1f61a3d7bc
jitstate: Rename fields s/guest_FPSCR/FPSCR/
2016-09-05 14:42:21 +01:00
Mat M
6d53bb6d7e
arm_types: Split out LocationDescriptor ( #20 )
...
This isn't really an ARM-specific type, since it's used to indicate a
Block location.
2016-09-05 11:54:09 +01:00
Mat M
7f9a0c3c38
Remove unnecessary explicit includes ( #16 )
2016-09-03 21:48:03 +01:00
MerryMage
4321e829d1
callbacks: Add user_arg argument to InterpreterFallback
2016-09-01 02:00:08 +01:00
MerryMage
3b5c43b427
Optimization: Read page-table directly for memory access
2016-09-01 00:58:02 +01:00
Lioncash
ea6a4e82b5
block_of_code: Make CallFunction accept function pointers only
2016-08-31 21:51:44 +01:00
Lioncash
f2bf795876
intrusive_list: Interface changes
...
- Remove the root pointer from iterators.
This is unnecessary, since the only way to get a valid iterator is
either from a node itself (it transiently becomes an iterator via the
underlying interface), or through the iterator interface for the list.
This should also result in better code generation, as each increment or
decrement of an iterator is now branchless.
- Remove iterator_to
This is actually a pretty dangerous function, since it would immediately
create an iterator into the list using the given item, even if it's not
actually part of the list. This was only left around due to lack of
type handling around constructors.
- Add other overloads for erase() and remove()
Now handles iterators, pointers, and references.
2016-08-28 20:56:40 +01:00
MerryMage
7912a79fa5
emit_x64: align before emitting blocks
2016-08-27 11:04:43 +01:00
MerryMage
dca3b2f079
Implement VMRS and VMSR
2016-08-26 22:47:54 +01:00
MerryMage
814348371e
emit_x64: EmitX64::Emit: block.Location() returns by value
2016-08-26 19:43:29 +01:00
MerryMage
4f6ea715b2
emit_x64: EmitX64::Emit doesn't need descriptor argument
2016-08-26 19:14:25 +01:00
Lioncash
32c24d2cb3
Use 'false' instead of '0' in asserts
2016-08-26 18:52:08 +01:00
MerryMage
065c53ebfc
emit_x64: Make ZeroIfNaN64 branchless
2016-08-26 15:23:08 +01:00
MerryMage
656d4f7252
emit_x64: inhibit_emission is obsolete
...
Not used anymore; unused ever since intrusive lists were introduced.
2016-08-25 23:24:16 +01:00
MerryMage
4322c0907c
microinstruction: Rename FindUseWithOpcode to GetAssociatedPseudoOperation, encapsulate associated variables
2016-08-25 21:08:47 +01:00
MerryMage
922d1fd198
Merge branch 'xbyak'
2016-08-25 16:54:48 +01:00
MerryMage
e32812cd00
Port x64 backend to xbyak
2016-08-25 16:18:17 +01:00
Lioncash
0e12fb6a56
basic_block: Move all variables behind a public interface
2016-08-25 16:14:37 +01:00
MerryMage
dc26afbd7e
translate_arm: Translate more than one conditional instruction in a block
2016-08-25 13:05:33 +01:00
MerryMage
22cca5ff72
emit_x64: Actually advance RSB pointer
2016-08-24 23:19:47 +01:00
Lioncash
eba3a06d80
frontend: Introduce FPSCR register helper class
...
Encapsulates all of the FPSCR state.
2016-08-24 20:51:14 +01:00
MerryMage
b5a86889cd
Implement VCVT
2016-08-23 22:20:04 +01:00
MerryMage
8d1b9f32ca
Standardize indentation of switch statments
2016-08-23 12:19:27 +01:00
Lioncash
1abe881921
basic_block: Add proxy member functions for the instruction list
...
Currently basic block kind of acts like a 'dumb struct' which makes things
a little more verbose to write (as opposed to keeping it all in one place,
I guess). It's also a little wonky conceptually, considering a block is
composed of instructions (i.e. 'contains' them).
So providing accessors that make it act more like a container can make working
with algorithms a little nicer. It also makes the API a little more
defined.
Ideally, the list would be only available through a function, but
currently, the pool allocator is exposed, which seems somewhat odd,
considering the block itself should manage its overall allocations
(with placement new, and regular new), rather than putting that
sanitizing directly on the IR emitter (it should just care about emission,
not block state). However, recontaining that can be followed up with,
as it's very trivial to do.
2016-08-22 13:44:56 +01:00
MerryMage
269160ef0d
emit_x64: Clear RSB-related caches when ClearCache() is called
2016-08-18 18:18:44 +01:00
MerryMage
1a3f3ac435
emit_x64: Correct behaviour of PackedOperation for immediate argument
...
x64 MOVD_xmm does not support an immediate oparg
2016-08-18 18:17:17 +01:00
MerryMage
b2de47954b
EmitX64: Emit correct cycle count on cond failure
2016-08-18 18:16:18 +01:00
MerryMage
0ebb572e2d
Optimization: Make RSB a ring buffer instead of a stack
2016-08-15 15:48:22 +01:00
MerryMage
7d7ac0af71
Optimization: Make SVC use RSB
2016-08-15 15:02:08 +01:00
MerryMage
6c45619aa1
Optimization: Implement terminal LinkBlockFast
2016-08-15 14:33:17 +01:00
MerryMage
624e84fa09
Optimization: Tweak RSB
2016-08-15 14:08:06 +01:00
MerryMage
070298b948
Optimization: bugfix! Return Stack Buffer location hash calculation was incorrect
2016-08-15 13:21:58 +01:00
MerryMage
e164ede4dc
TranslateArm: Implement MRS, MSR (imm), MSR (reg)
2016-08-15 11:50:49 +01:00
MerryMage
d43d97b990
EmitX64/EmitPushRSB: Assert that patch location is of correct size
2016-08-13 00:52:31 +01:00
MerryMage
960d14d18e
Optimization: Implement Return Stack Buffer
2016-08-13 00:10:23 +01:00
bunnei
8e68e6fdd9
TranslateArm: Implement QADD16/QSUB16/UQADD16/UQSUB16.
2016-08-12 19:00:44 +01:00
bunnei
4b09c0d032
TranslateArm: Implement QADD8 and UQADD8.
2016-08-12 19:00:44 +01:00
bunnei
127fbe99cb
TranslateArm: Implement QSUB8.
2016-08-12 19:00:44 +01:00
bunnei
86fe29c6d2
TranslateArm: Implement UQSUB8.
2016-08-12 19:00:44 +01:00
MerryMage
1029fd27ce
Update documentation (2016-08-12)
2016-08-12 18:17:31 +01:00
MerryMage
df39308e03
TranslateArm: Implement CLREX, LDREX, LDREXB, LDREXD, LDREXH, STREX, STREXB, STREXD, STREXH, SWP, SWPB
2016-08-09 22:57:20 +01:00
Tillmann Karras
5d26899ac9
Add simplified LogicalShiftRight64 IR opcode
2016-08-08 22:27:05 +01:00
Tillmann Karras
ccb2aa96a5
Add support for the APSR.Q flag
2016-08-08 22:27:04 +01:00
